DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin(USPGPUB DOCUMENT: 2019/0109124, hereinafter Lin) in view of Song (USPGPUB DOCUMENT: 2022/0246089, hereinafter Song) and Lowes (USPGPUB DOCUMENT: 2012/0018754, hereinafter Lowes).
Re claim 1 Lin discloses in Fig 9, 10-12 a method of manufacturing a display device, the method comprising: providing a carrier module(110/C1/C2) including a carrier wafer(110) and light emitting elements(C1/C2); disposing the carrier module(110/C1/C2) on a transparent electrode assembly(170/172);
Lin does not disclose inspecting the light emitting elements; and transferring the light emitting elements(C1/C2) onto a pixel-circuit layer after the inspecting the light emitting elements(C1/C2); wherein the carrier wafer has electrical conductivity; wherein the transparent electrode assembly includes electrodes; inspecting the light emitting elements by applying an electrical signal through the electrodes of the transparent electrode assembly and the electrically conductive carrier wafer, wherein the electrical signal flows from the electrodes through the light emitting elements and to the carrier wafer;
Song discloses inspecting the light emitting elements(1200-1/1200-2/1200-3)[0213]; and transferring the light emitting elements[0117] onto a pixel-circuit layer(1110/1150) after the inspecting the light emitting elements[0213].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Song to the teachings of Lin in order to improve manufacturing yield [0003, Song].
Lin and Song and Lowes does not disclose wherein the carrier wafer has electrical conductivity; wherein the transparent electrode assembly includes electrodes; inspecting the light emitting elements by applying an electrical signal through the electrodes of the transparent electrode assembly and the electrically conductive carrier wafer, wherein the electrical signal flows from the electrodes through the light emitting elements and to the carrier wafer;
Lowes disclose wherein the carrier wafer(410) has electrical conductivity[0065]; wherein the transparent electrode[0040] assembly includes electrodes; inspecting the light emitting elements(left/right 10) by applying an electrical signal[0074] through the electrodes of the transparent electrode assembly and the electrically conductive carrier wafer, wherein the electrical signal flows from the electrodes through the light emitting elements and to the carrier wafer[0084];
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Lowes to the teachings of Lin in order to mask appearance when inactive but becoming transparent when the solid state emitter is active [0002, Lowes].
Re claim 2 Lin and Song and Lowes disclose the method of claim 1, wherein the providing the carrier module(110/C1/C2) includes: growing semiconductor layers on a growth substrate; providing the light emitting elements(C1/C2) by etching the semiconductor layers, wherein the light emitting elements(C1/C2) are spaced apart from each other, and each of the light emitting elements(C1/C2) includes a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; coupling the light emitting elements(C1/C2) and the carrier wafer(110) to each other; and separating the light emitting elements(C1/C2) and the growth substrate from each other.
Re claim 3 Lin and Song and Lowes disclose the method of claim 1, wherein the carrier wafer(110) includes silicon[0109 of Song] (Si).
Re claim 5 Lin and Song and Lowes disclose the method of claim 2, wherein the providing the carrier module(110/C1/C2) includes: providing a bonding electrode in a pattern shape on the carrier wafer(110); and providing a reflective electrode in a pattern shape on the semiconductor layers.
Re claim 6 Lin and Song and Lowes disclose the method of claim 1, wherein the transparent electrode assembly(170/172) further includes a glass[0109 of Song] substrate, wherein the electrodes are electrodes disposed on the glass[0109 of Song] substrate, and wherein the electrodes include:first electrodes extending in a first extending direction; and second electrodes extending in a second extending direction different from the first extending direction, wherein the second electrodes are integrally formed with the first electrodes as a single unitary and indivisible part.
Re claim 7 Lin and Song and Lowes disclose the method of claim 6, wherein the first electrodes and the second electrodes intersect each other in intersection areas, and wherein the intersection areas are arranged in a matrix form[0005 of Song] in which a row direction is the first extending direction and a column direction is the second extending direction.
Re claim 8 Lin and Song and Lowes disclose the method of claim 6, wherein the glass[0109 of Song] substrate includes a glass[0109 of Song] material, and the electrodes include a transparent electrode material.
Re claim 9 Lin and Song and Lowes disclose the method of claim 6, wherein the inspecting[0213] the light emitting elements(C1/C2) includes supplying power[0123 of Song] to the electrodes such that the power[0123 of Song] is supplied to the light emitting elements(C1/C2).
Re claim 10 Lin and Song and Lowes disclose the method of claim 9, wherein the supplying the power[0123 of Song] to the electrodes includes supplying, by a power[0123 of Song] apply unit, the power[0123 of Song] simultaneously to pads connected to the first and second electrodes through a power[0123 of Song] supply pin.
Re claim 11 Lin and Song and Lowes disclose the method of claim 7, wherein the inspecting[0213] the light emitting elements(C1/C2) includes allowing the light emitting elements(C1/C2) to emit light.
Re claim 12 Lin and Song and Lowes disclose the method of claim 11, wherein the inspecting[0213] the light emitting elements(C1/C2) includes acquiring visual information on the light emitting elements(C1/C2), and Wherein the visual information includes mapping information of the light emitting elements on the transparent electrode assembly(170/172) and information on whether the light emitting elements(C1/C2) emit light for each of positions at which the light emitting elements(C1/C2) are disposed, respectively.
Re claim 13 Lin and Song and Lowes disclose the method of claim 12, wherein the mapping information is predetermined based on the matrix form[0005 of Song] defined by the intersection areas.
Re claim 14 Lin and Song and Lowes disclose the method of claim 12, further comprising: repairing at least one of the light emitting elements(C1/C2),wherein the repairing is performed after the inspecting[0213] the light emitting elements(C1/C2), and is performed before the transferring the light emitting elements(C1/C2) onto the pixel-circuit layer.
Re claim 15 Lin and Song and Lowes disclose the method of claim 14, wherein the inspecting[0213] the light emitting elements(C1/C2) includes:deciding the at least one of the light emitting elements(C1/C2) as an abnormal light emitting element which abnormally emit light; and deciding others of the light emitting elements(C1/C2) as a normal light emitting element which normally emit light,wherein the repairing the at least one of the light emitting elements(C1/C2) includes individually repairing the at least one of the light emitting elements(C1/C2) determined as the abnormal light emitting element.
Re claim 16 Lin and Song and Lowes disclose the method of claim 14, wherein the inspecting[0213] the light emitting elements(C1/C2) includes: determining the at least one of the light emitting elements(C1/C2) as an abnormal light emitting element which abnormally emit light; and determining others of the light emitting elements(C1/C2) as a normal light emitting element which normally emit light, wherein the repairing includes repairing the at least one of the light emitting elements(C1/C2) determined as the abnormal light emitting element with respect to an area in which the abnormal light emitting element is included at a predetermined rate or higher.
Re claim 17 Lin and Song and Lowes disclose the method of claim 1, wherein the transferring the light emitting elements(C1/C2) onto the pixel-circuit layer includes removing the carrier wafer(110) in the carrier module(110/C1/C2) and disposing the light emitting elements(C1/C2) on the pixel-circuit layer.
Re claim 18 Lin and Song and Lowes disclose a display device manufactured by the method of claim 1.
Re claim 19 Lin and Song and Lowes disclose the display device of claim 18, wherein the pixel-circuit layer includes a pixel circuit[0008 of Song], and the light emitting elements(C1/C2) are electrically connected to the pixel circuit[0008 of Song] ; and wherein each of the light emitting elements is a micro light emitting diode.
Re claim 20 Lin and Song and Lowes disclose an electronic device comprising the display device of claim 18.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-3, 5-20 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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