Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in the Republic of Korea on March 24, 2023. It is noted, however, that applicant has not filed a certified copy of the 10-2023-0039205 application as required by 37 CFR 1.55. The examiner further notes that the electronic retrieval of the certified copy of the 10-2023-0039205 application failed on August 24, 2024 and that if electronic retrieval fails the applicant remains responsible for the submission of the certified copy of the foreign application.
Specification
The amendment filed June 17, 2026 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows: “The at least one inorganic encapsulation layer may include at least one of aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), zinc oxide (ZnO), silicon oxide (SiOX), silicon nitride (SiNX), and silicon oxynitride (SiOXNY),” on page 6 paragraph 124 and “Each of gate electrodes respectively included in Comparative Examples 7 and 8 has compress stress of more than 1,540 MPA, and Comparative Examples 7 and 8 have impact resistance against a pen dropped from a height of 10 cm or less,” on pages 7-8 paragraph 169.
The examiner notes the above amendment to the specification on page 6 paragraph 124 introduces new matter because this amendment changes the disclosed structure of the at least one inorganic encapsulation layer from including at least one inorganic encapsulation layer from encapsulation layers of different materials to including a material from a list of different materials. The examiner notes the above amendment to the specification on pages 7-8 paragraph 169 introduces new matter because comparative examples 7 and 8 do not disclose a range of heights of 10 cm or less but rather disclose two specific heights, 10 cm and 8 cm.
Applicant is required to cancel the new matter in the reply to this Office Action.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sasaki (JP 2002280566 A). The examiner notes that the citations to paragraphs of Sasaki refer to paragraphs in the previously attached English language translation of Sasaki.
Regarding Claim 1:
Sasaki discloses a display apparatus comprising:
a substrate (substrate, See fig. 1, ref. no. 1 and paragraph 19);
a first semiconductor layer (polycrystalline silicon semiconductor film, See fig. 1, ref. no. 2 and paragraph 19) disposed on the substrate;
a first inorganic insulating layer (gate insulating film, See fig. 1, ref. no. 3 and paragraph 19) disposed on the first semiconductor layer;
a first gate layer (first gate electrode film and second gate electrode film with the second gate electrode film being formed using a mixture ratio of Ar and Kr such that the second gate electrode film has a compressive stress of, for example, 500 MPa, See fig. 1, ref. nos. 4, 5, fig. 5, paragraphs 8, 10, 14, and 19. The examiner also notes that the left end point of the graph shown in figure 5, shows the second gate electrode film being formed using a mixture ratio of Ar100:0Kr such that the second gate electrode film has a compressive stress of, for example, approximately 715 MPa. The examiner notes that the compressive stress of approximately 715 MPa was calculated as follows (ratio of the distance between graph line for -500MPa and center of left end point / distance between graph lines for -500MPa and -1000MPa) x 500 + 500 = 715.90 MPa.) disposed on the first inorganic insulating layer, having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less (compressive stress of, for example, 500 MPa, See fig. 5), and comprising molybdenum (molybdenum-tungsten alloy, See paragraphs 14-15 and 20-21), wherein the first gate layer is in contact with the first inorganic insulating layer (the first gate electrode film is in contact with the gate insulating film, See fig. 1, ref. nos. 3 and 4); and
a second inorganic insulating layer (interlayer insulating film, See fig. 1, ref. no. 7 and paragraph 21) disposed on the first gate layer and being in contact with the first gate layer (the interlayer insulating film is in contact with the first gate electrode film and the second gate electrode film, See fig. 1, ref. nos. 4, 5, and 7).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-5 are rejected under 35 U.S.C. 103 as being unpatentable over Sasaki (JP 2002280566 A) in view of Kim et al. (CN 107978232 A). The examiner notes that the citations to paragraphs of Sasaki refer to paragraphs in the previously attached English language translation and the citations to paragraphs of Kim refer to paragraphs in the previously attached English language translation of Kim.
Regarding Claim 2:
Sasaki discloses the above stated display apparatus.
Sasaki does not disclose the first inorganic insulating layer has compressive stress.
Kim discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Sasaki to include the first inorganic insulating layer has compressive stress as taught by Kim in order to inhibit the initiation and propagation of cracks. (See Kim paragraph 86).
Regarding Claim 3:
Sasaki discloses wherein the first inorganic insulating layer comprises at least one of silicon oxide (SiO2, See paragraph 19), silicon nitride, and silicon oxynitride.
Regarding Claim 4:
Sasaki discloses the above stated display apparatus.
Sasaki does not disclose the second inorganic insulating layer has compressive stress.
Kim discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Sasaki to include the second inorganic insulating layer has compressive stress as taught by Kim in order to inhibit the initiation and propagation of cracks. (See Kim paragraph 86).
Regarding Claim 5:
Sasaki discloses wherein the first inorganic insulating layer comprises at least one of silicon oxide (SiO2, See paragraph 21), silicon nitride, and silicon oxynitride.
Claims 1, 6-7, 10-11, 16-17, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2022/0069021) in view of Sasaki (JP 2002280566 A). The examiner notes that the citations to paragraphs of Sasaki refer to paragraphs in the previously attached English language translation of Sasaki.
Regarding Claim 1:
Kim discloses a display apparatus comprising:
a substrate (substrate, See fig. 8, ref. no. 100 and paragraph 103);
a first semiconductor layer (first semiconductor layer, See fig. 8, ref. no. Act and paragraph 107) disposed on the substrate;
a first inorganic insulating layer (first gate insulating layer, See fig. 8, ref. no. 203 and paragraph 107) disposed on the first semiconductor layer;
a first gate layer (first gate electrode, See fig. 8, ref. no. GE and paragraph 107) disposed on the first inorganic insulating layer, and comprising molybdenum (molybdenum, See paragraph 109), wherein the first gate layer is in contact with the first inorganic insulating layer (the first gate electrode is in contact with the first gate insulating layer, See fig. 8, ref. nos. GE and 203); and
a second inorganic insulating layer (second gate insulating layer, See fig. 8, ref. no. 205, paragraphs 110 and 115) disposed on the first gate layer and being in contact with the first gate layer (the second gate insulating layer is in contact with the first gate electrode, See fig. 8, ref. nos. GE and 205).
Kim does not disclose the first gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less.
Sasaki discloses the first gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less (second gate electrode film formed using a mixture ratio of Ar and Kr such that the second gate electrode film has a compressive stress of, for example, 500 MPa, See fig. 1, ref. no. 5, fig. 5, paragraphs 8, 10, and 14. The examiner also notes that the left end point of the graph shown in figure 5, shows the second gate electrode film being formed using a mixture ratio of Ar100:0Kr such that the second gate electrode film has a compressive stress of, for example, approximately 715 MPa.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim to include the first gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less as taught by Sasaki in order to inhibit the initiation and propagation of cracks.
Regarding Claim 6:
Kim discloses a second semiconductor layer (second semiconductor layer, See fig. 8, ref. no. Act’ and paragraph 117) disposed over the second inorganic insulating layer; a third inorganic insulating layer (third gate insulating layer, See fig. 8, ref. no. 206 and paragraph 119) disposed on the second semiconductor layer; a second gate layer (second gate electrode, See fig. 8, ref. no. GE’ and paragraph 117) disposed on the third inorganic insulating layer; and a fourth inorganic insulating layer (second interlayer insulating layer, See fig. 8, ref. no. 207b) disposed on the second gate layer.
Regarding Claim 7:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus. Kim further discloses the second gate layer comprises molybdenum (molybdenum, See paragraph 121).
The above stated combination of Kim and Sasaki does not disclose the second gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less.
Sasaki discloses the second gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less (second gate electrode film formed using a mixture ratio of Ar and Kr such that the second gate electrode film has a compressive stress of, for example, 500 MPa, See fig. 1, ref. no. 5, fig. 5, paragraphs 8, 10, and 14. The examiner also notes that the left end point of the graph shown in figure 5, shows the second gate electrode film being formed using a mixture ratio of Ar100:0Kr such that the second gate electrode film has a compressive stress of, for example, approximately 715 MPa.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the second gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less as taught by Sasaki in order to inhibit the initiation and propagation of cracks.
Regarding Claim 10:
Kim discloses wherein the first semiconductor layer comprises a silicon semiconductor (the first semiconductor layer may include polysilicon, See paragraph 108), and the second semiconductor layer comprises an oxide semiconductor (the second semiconductor layer may include an oxide semiconductor, See paragraph 118).
Regarding Claim 11:
Kim discloses a display apparatus comprising:
a substrate (substrate, See fig. 8, ref. no. 100 and paragraph 103);
a pixel circuit layer (pixel circuit, See fig. 8, ref. no. PC and paragraph 105) disposed on the substrate;
a display element layer (second planarization layer and OLED, See fig. 8, ref. nos. OLED, 209b, paragraphs 100-101 and 128) disposed on the pixel circuit layer and comprising a display element (organic light-emitting diode, See fig. 8, ref. no. OLED and paragraphs 100-101); and
an encapsulation layer (thin film encapsulation layer covering the OLED, See fig. 8, ref. no. 300 and paragraph 137) disposed on the display element layer and comprising at least one inorganic encapsulation layer (first inorganic encapsulation layer, See fig. 8, ref. no. 310 and paragraph 137) and at least one organic encapsulation layer (organic encapsulation layer, See fig. 8, ref. no. 320 and paragraph 137),
wherein the pixel circuit layer comprises:
a first semiconductor layer (first semiconductor layer, See fig. 8, ref. no. Act and paragraph 107) disposed on the substrate;
a first inorganic insulating layer (first gate insulating layer, See fig. 8, ref. no. 203 and paragraph 107) disposed on the first semiconductor layer;
a first gate layer (first gate electrode, See fig. 8, ref. no. GE and paragraph 107) disposed on the first inorganic insulating layer, and comprising molybdenum (molybdenum, See paragraph 109), wherein the first gate layer is in contact with the first inorganic insulating layer (the first gate electrode is in contact with the first gate insulating layer, See fig. 8, ref. nos. GE and 203); and
a second inorganic insulating layer (second gate insulating layer, See fig. 8, ref. no. 205, paragraphs 110 and 115) disposed on the first gate layer and being in contact with the first gate layer (the second gate insulating layer is in contact with the first gate electrode, See fig. 8, ref. nos. GE and 205).
Kim does not disclose the first gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less.
Sasaki discloses the first gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less (second gate electrode film formed using a mixture ratio of Ar and Kr such that the second gate electrode film has a compressive stress of, for example, 500 MPa, See fig. 1, ref. no. 5, fig. 5, paragraphs 8, 10, and 14. The examiner also notes that the left end point of the graph shown in figure 5, shows the second gate electrode film being formed using a mixture ratio of Ar100:0Kr such that the second gate electrode film has a compressive stress of, for example, approximately 715 MPa.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim to include the first gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less as taught by Sasaki in order to inhibit the initiation and propagation of cracks.
Regarding Claim 16:
Kim discloses a second semiconductor layer (second semiconductor layer, See fig. 8, ref. no. Act’ and paragraph 117) disposed over the second inorganic insulating layer; a third inorganic insulating layer (third gate insulating layer, See fig. 8, ref. no. 206 and paragraph 119) disposed on the second semiconductor layer; a second gate layer (second gate electrode, See fig. 8, ref. no. GE’ and paragraph 117) disposed on the third inorganic insulating layer; and a fourth inorganic insulating layer (second interlayer insulating layer, See fig. 8, ref. no. 207b) disposed on the second gate layer.
Regarding Claim 17:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus. Kim further discloses the second gate layer comprises molybdenum (molybdenum, See paragraph 121).
The above stated combination of Kim and Sasaki does not disclose the second gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less.
Sasaki discloses the second gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less (second gate electrode film formed using a mixture ratio of Ar and Kr such that the second gate electrode film has a compressive stress of, for example, 500 MPa, See fig. 1, ref. no. 5, fig. 5, paragraphs 8, 10, and 14. The examiner also notes that the left end point of the graph shown in figure 5, shows the second gate electrode film being formed using a mixture ratio of Ar100:0Kr such that the second gate electrode film has a compressive stress of, for example, approximately 715 MPa.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the second gate layer having a compressive stress of 470 megapascals (MPa) or more and 1,540 MPa or less as taught by Sasaki in order to inhibit the initiation and propagation of cracks.
Regarding Claim 20:
Kim discloses wherein the first semiconductor layer comprises a silicon semiconductor (the first semiconductor layer may include polysilicon, See paragraph 108), and the second semiconductor layer comprises an oxide semiconductor (the second semiconductor layer may include an oxide semiconductor, See paragraph 118).
Claims 2-5, 8-9, 12-15, and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2022/0069021) in view of Sasaki (JP 2002280566 A) further in view of Kim et al. (CN 107978232 A) hereafter Kim ‘232. The examiner notes that the citations to paragraphs of Sasaki refer to paragraphs in the previously attached English language translation and the citations to paragraphs of Kim ‘232 refer to paragraphs in the previously attached English language translation of Kim ‘232.
Regarding Claim 2:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus.
The above stated combination of Kim and Sasaki does not disclose wherein the first inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the first inorganic layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 3:
Kim discloses wherein the first inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 110), silicon nitride (silicon nitride, See paragraph 110), and silicon oxynitride (silicon oxynitride, See paragraph 110).
Regarding Claim 4:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus.
The above stated combination of Kim and Sasaki does not disclose wherein the second inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the second inorganic insulating layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 5:
Kim discloses wherein the first inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 110), silicon nitride (silicon nitride, See paragraph 110), and silicon oxynitride (silicon oxynitride, See paragraph 110. The examiner notes that inorganic materials for the first gate insulating layer may also be applied to the second gate insulating layer.).
Regarding Claim 8:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus. Kim further discloses the third inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 121), silicon nitride (silicon nitride, See paragraph 121), and silicon oxynitride (silicon oxynitride, See paragraph 121).
The above stated combination of Kim and Sasaki does not disclose the third inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the third inorganic insulating layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 9:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus. Kim further discloses the fourth inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 122), silicon nitride (silicon nitride, See paragraph 122), and silicon oxynitride (silicon oxynitride, See paragraph 122).
The above stated combination of Kim and Sasaki does not disclose the fourth inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the fourth inorganic insulating layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 12:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus.
The above stated combination of Kim and Sasaki does not disclose wherein the first inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the first inorganic layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 13:
Kim discloses wherein the first inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 110), silicon nitride (silicon nitride, See paragraph 110), and silicon oxynitride (silicon oxynitride, See paragraph 110).
Regarding Claim 14:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus.
The above stated combination of Kim and Sasaki does not disclose wherein the second inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the second inorganic insulating layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 15:
Kim discloses wherein the first inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 110), silicon nitride (silicon nitride, See paragraph 110), and silicon oxynitride (silicon oxynitride, See paragraph 110. The examiner notes that inorganic materials for the first gate insulating layer may also be applied to the second gate insulating layer.).
Regarding Claim 18:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus. Kim further discloses the third inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 121), silicon nitride (silicon nitride, See paragraph 121), and silicon oxynitride (silicon oxynitride, See paragraph 121).
The above stated combination of Kim and Sasaki does not disclose the third inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the third inorganic insulating layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Regarding Claim 19:
The above stated combination of Kim and Sasaki discloses the above stated display apparatus. Kim further discloses the fourth inorganic insulating layer comprises at least one of silicon oxide (silicon oxide, See paragraph 122), silicon nitride (silicon nitride, See paragraph 122), and silicon oxynitride (silicon oxynitride, See paragraph 122).
The above stated combination of Kim and Sasaki does not disclose the fourth inorganic insulating layer has compressive stress.
Kim ‘232 discloses inorganic insulating layers containing a residual compress stress (See paragraph 86).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display apparatus of Kim and Sasaki to include the fourth inorganic insulating layer has compressive stress as taught by Kim ‘232 in order to inhibit the initiation and propagation of cracks. (See Kim ‘232 paragraph 86).
Response to Arguments
Applicant's arguments filed June 17, 2026, with respect to the rejection of claim 1 under 35 U.S.C. 102(a)(1) as being anticipated by Sasaki, have been fully considered but they are not persuasive.
The applicant’s arguments that Sasaki does not disclose “the first gate layer is in contact with the first inorganic insulating layer” and “a second inorganic insulating layer disposed on the first gate layer and being in contact with the first gate layer,” are not persuasive because Sasaki discloses these limitations. The examiner first notes that a first gate layer is not limited to a single layer structure but rather a first gate layer may be made up of multiple layers. The examiner next notes that Sasaki discloses “the first gate layer is in contact with the first inorganic insulating layer” and “a second inorganic insulating layer disposed on the first gate layer and being in contact with the first gate layer,” when reading the first gate electrode film and the second gate electrode film on a first gate electrode. Therefore, applicant’s arguments that Sasaki does not disclose “the first gate layer is in contact with the first inorganic insulating layer” and “a second inorganic insulating layer disposed on the first gate layer and being in contact with the first gate layer,” are not persuasive.
The applicant’s arguments that Sasaki does not disclose the first gate layer has a compressive stress of 470 MPa or more and 1,540 MPa or less are not persuasive because Sasaki discloses this limitation. The examiner first notes that “A reference may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art, including nonpreferred embodiments.” See MPEP 2123 Section I. See also Merck & Co. v. Biocraft Labs., Inc. 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir. 1989), cert. denied, 493 U.S. 975 (1989). The examiner next notes that applicant’s arguments attempt to limit the disclosure of Sasaki to the single point on the graph shown in figure 5 is contrary to what is disclosed by Sasaki. The examiner notes that Sasaki discloses each point on the graph in figure 5 including, for example, the point corresponding to -500 MPa. The examiner also notes that Sasaki states “the second gate electrode film being formed by sputtering using a gas consisting of Ar or a gas obtained by mixing Ar with an inert gas having an atomic number greater than that of Ar at a ratio of 50% by volume or less as a discharge gas,” in paragraph 10. The examiner further notes that a gas consisting of Ar has a mixture ratio of Ar100:0Kr and this mixture ratio is the left end point on the graph shown in figure 5 and corresponds with a second gate electrode film having a compressive stress of approximately 715 MPa. The examiner additionally notes the Sasaki states “The mixture ratio of Kr and Ar is not limited to 50:50, but may be determined taking into consideration factors related to substrate warpage and film peeling, such as the thickness of the substrate and the quality of the gate insulating film.” See Sasaki paragraph 21. Therefore, the applicant’s arguments that Sasaki does not disclose the first gate layer has a compressive stress of 470 MPa or more and 1,540 MPa or less are not persuasive.
The applicant’s arguments regarding Kim ‘232 not curing the deficiencies of Sasaki with respect to the rejection of independent claim 1 under 35 U.S.C. 102 as being anticipated by Sasaki are not persuasive because Kim ‘232 is not relied upon for this rejection. The examiner notes that applicant’s arguments regarding Kim ‘232 amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. The examiner also notes applicant does not consider what the disclosures of Kim ‘232 would teach to one of ordinary skill in the art and that Kim ‘232 teaches using inorganic layers in a flexible display to inhibit the initiation and propagation of cracks.
Applicant's arguments filed June 17, 2026, with respect to the rejection of claims 2-5 under 35 U.S.C. 103 as being unpatentable over Sasaki in view Kim ‘232, have been fully considered but they are not persuasive.
The applicant’s arguments that Kim ‘232 fails to teach or suggest a compressive stress according to the range recited in claim 1 is not persuasive because Kim ‘232 is not being relied on to teach the compressive stress according to the range recited in claim 1. The examiner notes that, as discussed above, the compressive stress according to the range recited in claim 1 is taught by Sasaki.
Applicant's arguments filed June 17, 2026, with respect to the rejection of claims 1, 6-7, 10-11, 16-17 and 20 under 35 U.S.C. 103 as being unpatentable over Kim ‘021 in view Sasaki, have been fully considered but they are not persuasive.
The applicant’s arguments that the Office action fails to provide an adequate articulated reason why a person of ordinary skill in the art would have modified the single film gate structure of Kim ‘021 to adopt a multi-film gate structure of Sasaki are not persuasive because the references are not being combined in the manner argued by the applicant. The examiner first notes that applicant’s arguments are directed toward a bodily incorporation of Sasaki into Kim ‘021. The examiner next notes that the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). The examiner now points out that Kim ‘021 is being modified such the first gate electrode shown in figure 8 of Kim ‘021 has a compressive stress between 470 MPa and 1,540 MPa, which is taught by Sasaki as discussed above, to inhibit initiation and propagation of cracks in the first gate electrode. Therefore, the applicant’s assertions that the Office action fails to provide an adequate articulated reason why a person of ordinary skill in the art would have modified the single film gate structure of Kim ‘021 to adopt a multi-film gate structure of Sasaki are not persuasive.
The applicant’s arguments regarding Kim ‘232 not curing the deficiencies of Kim ‘021 and Sasaki with respect to the rejection of independent claim 11 under 35 U.S.C. 103 as being unpatentable over Kim ‘021 in view of Sasaki are not persuasive because Kim ‘232 is not relied upon for this rejection. The examiner notes that applicant’s arguments regarding Kim ‘232 amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. The examiner also notes applicant does not consider what the disclosures of Kim ‘232 would teach to one of ordinary skill in the art and that Kim ‘232 teaches using inorganic layers in a flexible display to inhibit the initiation and propagation of cracks.
Applicant’s arguments, see page 16 paragraph 2, filed June 17, 2026, with respect to the rejection of claims 1, 6-7, 10-11, 16-17, and 20 under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2022/0069021) in view of Terai et al. (US 8,816,352) have been fully considered and are persuasive. Therefore, the rejection of claims 1, 6-7, 10-11, 16-17, and 20 under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2022/0069021) in view of Terai et al. (US 8,816,352) and the rejection of claims 2-5, 8-9, 12-15, and 18-19 under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2022/0069021) in view of Terai et al. (US 8,816,352) further in view of Kim et al (CN 107978232 A) have been withdrawn.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
/B.S./Examiner, Art Unit 2899
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