Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18414500 filed on 01/17/2024.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of claims 1-7 in the reply filed on 5/27/2026 is acknowledged.
Applicant argues that the burden in supporting the restriction requirement has not been met but does not point out any specific reasoning. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 6-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Meyer et al. (US 2010/0001396).
Regarding independent claim 1, Meyer et al. teach a method for making a semiconductor device, comprising:
providing a semiconductor assembly comprising a first semiconductor die (Fig. 3B, element 16, paragraph 0019) and a second semiconductor die (Fig. 3B, element 12, paragraph 0018),
wherein a first interconnection structure (Fig. 3B, element 25, paragraph 0024) is electrically coupled to the first semiconductor die and a second interconnection structure (Fig. 3B, element 24, paragraph 0024) is electrically coupled to the second semiconductor die;
depositing an encapsulant layer (paragraph 0034 discloses depositing electrically insulating polymer foil) over the semiconductor assembly to encapsulate the first interconnection structure and the second interconnection structure,
wherein the encapsulant layer comprises an additive activatable by laser (paragraph 0034);
forming an interconnection channel (paragraph 0032-0034, location where metal layer 13 is formed) in the encapsulant layer and activating the additive of the encapsulant layer in the interconnection channel as a seed layer by laser patterning,
wherein the interconnection channel exposes and interconnects the first and the second interconnection structures (Figs. 3E-3F, paragraph 0032-0034);
forming a conductive layer (Fig. 3F, element 13, paragraph 0032-0034) in the interconnection channel of the encapsulant layer; and
forming an outer layer (Fig. 3G, element 28, paragraph 0029) on the encapsulant layer to cover the conductive layer.
Regarding claim 6, Meyer et al. teach wherein the first interconnection structure and the second interconnection structure are contact pads (paragraph 0024) formed on the first semiconductor die and the second semiconductor die, respectively.
Regarding claim 7, Meyer et al. teach wherein the first interconnection structure and the second interconnection structure are conductive structures (paragraph 0024) on redistribution layers (Fig. 3F, elements 27, 28, 13 comprise the redistribution layer, paragraph 0029) formed on the first semiconductor die and the second semiconductor die, respectively.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-5 are rejected under 35 U.S.C. 103 as being unpatentable over Meyer et al. (US 2010/0001396) in view of Vincent et al. (US 2024/0105660).
Regarding claim 2, Meyer et al. teach wherein the semiconductor assembly further comprises a plurality of connection structures (Fig. 3B, elements 24 & 25, paragraph 0024) electrically coupled to the first semiconductor die and the second semiconductor die, the outer layer is a redistribution layer (Fig. 3F, elements 27, 28, 13 comprise the redistribution layer, paragraph 0029); and the method further comprising:
Meyer et al. do not explicitly disclose forming openings in the encapsulant layer to expose the plurality of connection structures; and forming conductive vias in the openings electrically coupled to the plurality of connection structures.
Vincent et al. teach a method comprising forming openings (Fig. 2, element 202, paragraph 0010) in the encapsulant layer (Fig. 2, element 108, paragraph 0008) to expose the plurality of connection structures (Fig. 2, element 104, paragraph 0009); and forming conductive vias (Fig. 3, element 302, paragraph 0011) in the openings electrically coupled to the plurality of connection structures (Fig. 2, element 104, paragraph 0009).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Meyer et al. according to the teachings of Vincent et al. with the motivation to improve reliability, performance, and costs (paragraph 0002).
Regarding claim 3, Meyer et al. teach wherein the semiconductor assembly further comprises a plurality of connection structures (Fig. 3B, elements 24 & 25, paragraph 0024) electrically coupled to the first semiconductor die and the second semiconductor die, the outer layer is a redistribution layer (Fig. 3F, elements 27, 28, 13 comprise the redistribution layer, paragraph 0029); and the method further comprising:
Meyer et al. do not explicitly disclose the outer layer is an outer encapsulant layer comprising an additive activatable by laser; and the method further comprising: forming openings in the encapsulant layer and the outer encapsulant layer to expose the plurality of connection structures; and forming conductive vias in the openings electrically coupled to the plurality of connection structures.
Vincent et al. teach a method comprising the outer layer is an outer encapsulant layer comprising an additive activatable by laser (paragraph 0035); forming openings (Figs. 2 & 8, 202 & 804, paragraph 0010, 0017) in the encapsulant layer (Fig. 2, element 108, paragraph 0008) and the outer encapsulant layer (Fig. 8, element 802, paragraph 0017) to expose the plurality of connection structures; and forming conductive vias (Figs. 3 & 9, element 302 & 902, paragraph 0011, 0018) in the openings electrically coupled to the plurality of connection structures (Fig. 2, element 104, paragraph 0009).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Meyer et al. according to the teachings of Vincent et al. with the motivation to improve reliability, performance, and costs (paragraph 0002).
Regarding claim 4, Meyer et al. modified by Vincent et al. teach wherein the openings of the conductive vias are formed by laser ablation (paragraph 0010 of Vincent).
Regarding claim 5, Meyer et al. modified by Vincent et al. teach wherein the openings of the conductive vias are formed by laser ablation (paragraph 0010 of Vincent).
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813
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