Prosecution Insights
Last updated: August 17, 2026
Application No. 18/416,779

Low-Leakage NEDMOS and LDMOS Devices

Non-Final OA §102§103§112§Other
Filed
Jan 18, 2024
Examiner
PARTHASARATHY, ROHIT
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
pSemi Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
35 granted / 38 resolved
+24.1% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
23 currently pending
Career history
64
Total Applications
across all art units

Statute-Specific Performance

§103
56.8%
+16.8% vs TC avg
§102
21.4%
-18.6% vs TC avg
§112
18.9%
-21.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 38 resolved cases

Office Action

§102 §103 §112 §Other
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species A in the reply filed on )6/05/2026 is acknowledged. Claims 1-15 are pending. Claims 14 and 15 are withdrawn. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding Claims 1-5, the claims recite “a channel region having one or more hole-collection stripes interdigitated with at least one well region”. Examiner is unclear regarding how one hole collection stripe can be interdigitated with one well region. Perhaps Applicant meant to claim both the stripes and well regions in plurality, which is the interpretation that Examiner is using for this application. Regarding Claim 5, Applicant claims at least two hole collection stripes, but Claim 4 allows for one or more. Again, this inconsistency can be resolved if Applicant claims only a plurality of hole collection stripes. Claims 6-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In Claims 6-7, Applicant recites “a source region interdigitated by multiple body contact regions.” Again, Examiner is unclear as to what this means. Does Applicant mean that there are a plurality of source regions alternating with body contact regions? Claims 8-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding Claim 8, Applicant recites “one or more P- hole collections stripes interdigitated with at least one P-well region”. This claim is rejected under 112(b) for the same reasons above. Regarding Claim 9, Applicant recites “multiple P+ body contact regions”, but Claim 8 allows for one or more body contact regions. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5 are rejected under 35 U.S.C. 102a1 as being anticipated by US20040104424A1 (Yamazaki). Regarding Claim 1, Yamakazi discloses a MOSFET (see Figs. 1A-1D) including a channel region (Fig. 1A, el. 106, Para. [0053]) having one or more hole-collection stripes (Fig. 1A, el. 105, Para. [0053] – see US6232642B1 for similar stripes, which can be used to extract holes – Col. 9 ll. 1-4) interdigitated with at least one well region (Fig. 1A, el. 101 and 106, Para. [0045]). Regarding Claim 2, Yamakazi discloses the MOSFET of claim 1, wherein the one or more hole-collection stripes are P- hole collection stripes (Para. [0045] – the region 105 is formed by adding boron, for example, to the P-type substrate, thus increasing the doping concentration). Regarding Claim 3, Yamakazi discloses the MOSFET of claim 2, wherein a first P- hole-collection stripe is positioned at a first lateral edge of the channel region and a second P- hole-collection stripe is positioned at a second lateral edge of the channel region (Para. [0054]). Regarding Claim 4, Yamakazi discloses the MOSFET of Claim 1, wherein the one or more hole-collection stripes have a higher voltage threshold VTH than the least one well region (Para. [0081]). Regarding Claim 5, Yamakazi discloses the MOSFET of Claim 4, wherein a first hole-collection stripe is positioned at a first lateral edge of the channel region and a second hole-collection stripe is positioned at a second lateral edge of the channel region (Para. [0054]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Yamakazi in view of US20060231894A1 (Kitagawa). Regarding Claims 6 and 7, Yamakazi discloses a MOSFET (see Figs. 1A-1D) including a channel region (Fig. 1A, el. 106, Para. [0053]) having multiple VTH regions (Para. [0081]). Yamakazi does not disclose a source region interdigitated by multiple body contacts regions, and does not disclose that the multiple body contact regions are P+ and the source region is an N+ region. Kitagawa discloses a MOSFET (Figs. 1A and 1B) that has a source region interdigitated by multiple body contact regions (Fig. 1B, where el. 6 is a base contact region – see Para. [0045])), where the body contact regions are P+ contact regions, and the source region is an N+ source region (Fig. 1B, Para. [0045]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to have a source region interdigitated by multiple body contact regions, as disclosed by Kitagawa. This has the advantage of increasing the breakdown voltage of the transistor (Kitagawa, Para. [0044]). Further, it would have been obvious to make the body contact regions P+ and the source region N+. This has the well known benefit of providing a low resistance body contact by using a heavily doped P region in contact with a P body. Claims 8 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Yamakazi in view of Kitagawa. Regarding Claim 8, Yamakazi discloses a MOSFET including: a channel region (Fig. 1A, el. 106, Para. [0053]) having one or more P- hole-collection stripes interdigitated with at least one P-well region ((Para. [0045] – the region 105 is formed by adding boron, for example, to the P-type substrate, thus increasing the doping concentration). Yamakazi does not disclose an N+ source region interdigitated by one or more P+ body contact regions. Kitagawa discloses a MOSFET (Figs. 1A and 1B) that has a N+ source region interdigitated by multiple P+ body contact regions (Fig. 1B, where el. 6 is a base contact region – see Para. [0045])), where the body contact regions are P+ contact regions, and the source region is an N+ source region (Fig. 1B, Para. [0045]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to have a source region interdigitated by multiple body contact regions, as disclosed by Kitagawa. This has the advantage of increasing the breakdown voltage of the transistor (Kitagawa, Para. [0044]). Further, it would have been obvious to make the body contact regions P+ and the source region N+. This has the well known benefit of providing a low resistance body contact by using a heavily doped P region in contact with a P body. Regarding Claim 13, Yamakazi in view of Kitagawa discloses the MOSFET of Claim 8, wherein a first P- hole-collection stripe is positioned at a first lateral edge of the channel region and a second P- hole-collection stripe is positioned at a second lateral edge of the channel region (Yamakazi, Para. [0054]). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Yamakazi in view of Kitagawa. Regarding Claim 9, Yamakazi in view of Kitagawa discloses the MOSFET of claim 8, wherein the one or more P- hole collection stripes are aligned with the multiple P+ body contacts (this will be the case when the embodiment in Fig. 1A of Yamakazi is combined with Kitagawa’s Fig. 1A). Yamakazi in view of Kitagawa does not disclose that the they are in electrical contact. However, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to electrically contact the P- hole collection stripes with the multiple P+ body contacts. Since the two regions would already by aligned, and are of the same conductivity type, it would be clear to electrically connect them so as to form a continuous circuit path for the holes as well as lowering resistance. Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Yamakazi in view of Kitagawa. Regarding Claims 10 and 11, Yamakazi discloses the MOSFET of claim 8, further including a drain region (Fig. 1A, el. 104, Para. [0055]) that is N+ (this can be inferred from Para. [0044]). Yamakazi does not disclose an N- drift region between the channel region and the drain region. Kitagawa discloses an N- drift region between the channel region and the drain region (Fig. 1B, el. 18, Para. [0039]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to add the drift region of Kitagawa to the device of Yamakazi for the purpose of to increase the breakdown voltage (Para. [0042]). Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Yamakazi in view of Kitagawa. Regarding Claim 12, Yamakazi in view of Kitagawa discloss the MOSFET of Claim 8. Yamakaxi in view of Kitagaw does not disclose the use of germanium in the collection stripes and body contact regions. However, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to use germanium in the collection stripes and body contact regions. The use of germanium has the well-known benefit of providing higher carrier mobility. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHIT PARTHASARATHY whose telephone number is (571)272-2572. The examiner can normally be reached Monday-Friday 8:30a-5p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Jan 18, 2024
Application Filed
Apr 05, 2024
Response after Non-Final Action
Jul 15, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+11.1%)
3y 2m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 38 resolved cases by this examiner. Grant probability derived from career allowance rate.

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