DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1 and 6-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2021/0159213 A1) in view of Zollo et al. (US 2005/0016763 A1).
Pertaining to claim 1, Kim et al. discloses A package structure (10, see figs. 1-5B), comprising: a substrate (100, see figs. 1-5B) defining the chip (210, 220, see fig. 5B) having a top surface and a bottom surface opposite to the top surface (see fig. 5B); and an adhesive layer (217, 237 and 317, see fig. 5B), wherein the top surface and the bottom surface of the chip (210, 220) are exposed by the adhesive layer (217, 237 and 317), and the chip is protruded beyond the substrate (see fig. 5B).
But, Kim et al. does not explicitly teach a through hole; a chip disposed in the through hole, connecting the chip to the through hole.
However, Zollo et a. teaches a through hole (24, see fig. 2B); a chip (25, see fig.4-5) disposed in the through hole (24), connecting the chip to the through hole (24, see paragraph [0027], lines 23-25).
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide a through hole; a chip disposed in the through hole, connecting the chip to the through hole in the device of Kim et al. based on the teachings of Zollo et al. in order to
provide superior mechanical strength and improved heat dissipation, making it ideal for high-power, high-vibration applications. This method offers a robust, space-saving connection that handles harsh thermal cycles and improves durability compared to surface-mounted components.
Pertaining to claim 6, Kim et al. discloses, further comprising: a wire-bonding structure (315, see fig. 2) connecting at least one of the top surfaces and the bottom surface of the chip (300) to a surface of the substrate (100); and a protective structure configured to prevent the wire-bonding structure from impacts from outside of the package structure (100).
Pertaining to claim 7, Kim et al. discloses, wherein the protective structure (see paragraph [0036]) and the surface of the substrate collectively define a space (see fig. 2), and the top surface of the chip is exposed to the space, and a top end of the wire-bonding structure (315) is lower than a top surface of the protective structure.
Pertaining to claim 8, Kim et al. discloses A package structure (10), comprising: a substrate (100), wherein a first gap between the chip (210, 220).
But, Kim et al. does not explicitly teach a through hole; a chip disposed in the through hole, connecting the chip to the through hole.
However, Zollo et a. teaches a through hole (24, see fig. 2B); a chip (25, see fig.4-5) disposed in the through hole (24), connecting the chip to the through hole (24, see paragraph [0027], lines 23-25).
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide a through hole; a chip disposed in the through hole, connecting the chip to the through hole in the device of Kim et al. based on the teachings of Zollo et al. in order to
provide superior mechanical strength and improved heat dissipation, making it ideal for high-power, high-vibration applications. This method offers a robust, space-saving connection that handles harsh thermal cycles and improves durability compared to surface-mounted components.
Kim et al. discloses all claimed limitations except wherein a first gap between the chip and a sidewall of the through hole comprises an upper portion and a lower portion having different widths.
However, it would have been on obvious matter of design choice to arranged
a first gap between the chip and a sidewall of the through hole comprises an upper portion and a lower portion having different widths since such modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Pertaining to claim 9, Kim et al. as modified by Xu further discloses, wherein the substrate (100 of Kim et al.) has a top surface and a bottom surface opposite to the top surface (see fig. 2), a first corner portion of the chip (108 of Xu) is lower than an elevation of the bottom surface of the substrate (21 of Zollo et al.) with respect to the top surface, and a second corner portion of the chip (111 of Xu) is higher than the elevation of the bottom surface of the substrate with respect to the top surface (see fig. 1).
Pertaining to claim 10, Kim et al. as modified by Xu further discloses, wherein the chip (108 of Xu) comprises a sensing element (107 of Xu) adjacent to a bottom surface of the chip (108 of Xu), and an elevation of a surface of the sensing element (111 of Xu) is lower than the elevation of the bottom surface of the substrate (100 of Kim et al.) with respect to the top surface.
Pertaining to claim 11, Kim et al. as modified by Xu further discloses, wherein in a cross-sectional view perspective, a second gap is at an opposite side of the chip to the first gap, the first gap tapers toward a first direction, and the second gap tapers toward a second direction opposite to the first direction (see figs. 1-2).
Pertaining to claim 12, Kim et al. as modified by Zollo et al. further discloses, further comprising an adhesive (217, 237 and 317 of Kim et al.) layer disposed in the first gap within the through hole (24 of Zollo et al.).
Pertaining to claim 13, Kim et al. as modified by Zollo et al. further discloses, wherein the adhesive layer (217, 237 and 317 of Kim et al.) is filled in the first gap (see figs. 3-4).
Pertaining to claim 14, Kim et al. as modified by Zollo et al. further discloses, wherein the adhesive layer (217, 237 and 317 of Kim et al.) is comprises a first part protruded out of the through hole (24 of Zollo et al.) and a second part in the through hole (see figs. 3-4 of Zollo et al.).
Pertaining to claim 15, Kim et al. discloses all claimed limitations except, wherein a width of the first part of the adhesive layer is greater than a width of the second part of the adhesive layer.
However, it would have been on obvious matter of design choice to arranged
wherein a width of the first part of the adhesive layer is greater than a width of the second part of the adhesive layer, since such modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Pertaining to claim 16, Kim et al. discloses A package structure (10), comprising: a substrate (100) defining; and the chip (210, 220) having a top surface and a bottom surface opposite to the top surface, wherein the top surface of the chip (210, 220) is protruded beyond the top surface of the substrate, and the bottom surface of the chip is substantially aligned with the bottom surface of the substrate (100).
But, Kim et al. does not explicitly teach a through hole extending between a top surface and a bottom surface of the substrate.
However, Zollo et a. teaches a through hole (24) extending between a top surface and a bottom surface of the substrate (22)
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide a through hole extending between a top surface and a bottom surface of the substrate in the device of Kim et al. based on the teachings of Zollo et al. in order to
provide superior mechanical strength and improved heat dissipation, making it ideal for high-power, high-vibration applications. This method offers a robust, space-saving connection that handles harsh thermal cycles and improves durability compared to surface-mounted components.
Pertaining to claim 17, Kim et al. discloses, further comprising a first wire (315, see fig. 2) connecting a first pad (103A, see fig. 2) of the chip (210, 220) to the top surface of the substrate (100) and a second wire (215, see fig. 2) connecting a second pad (105, see fig. 2) of the chip to the bottom surface of the substrate(100) , wherein a curvature change of the first wire (315) is greater than a curvature changes of the second wire (215).
Pertaining to claim 18, Kim et al. discloses, further comprising an adhesive layer (217, 237 and 317) around the chip (210, 220).
Pertaining to claim 19, Kim et al. as modified by Zollo et al. further discloses, wherein the adhesive layer (217, 237 and 317 of Kim et al.) comprises a first part in the through hole (24 of Zollo et al.) and a second part extending over at least a portion of the top surface of the substrate (100 of Kim et al.).
Pertaining to claim 20, Kim et al. as modified by Zollo et al. further discloses, wherein the second part of the adhesive layer (217, 237 and 317 of Zollo et al.) has a curved surface (see fig. 2) in a cross-sectional view perspective.
Claim 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2021/0159213 A1) in view of Zollo et al. (US 2005/0016763 A1) as applied to claim 1 above, and further in view of Xu (CN 116465490 A).
Pertaining to claim 2, Kim et al. discloses all claimed limitations except, wherein the chip comprises a first sensing element adjacent to the top surface of the chip and a second sensing element adjacent to the bottom surface of the chip.
However, Xu teaches wherein the chip (108) comprises a first sensing element (111) adjacent to the top surface of the chip and a second sensing element (107) adjacent to the bottom surface of the chip (108).
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide wherein the chip comprises a first sensing element adjacent to the top surface of the chip and a second sensing element adjacent to the bottom surface of the chip in the device of Kim et al. based on the teachings of Xu in order to provide improved accuracy, differential measurements, and comprehensive environmental monitoring.
Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2021/0159213 A1) in view of Zollo et al. (US 2005/0016763 A1) and Xu (CN 116465490 A) as applied to claim 1 above, and further in view of Wang (CN 103904094 B).
Pertaining to claim 3, Kim et al. discloses all claimed limitations except, wherein the first sensing element or the second sensing element is exposed by the adhesive layer.
However, Wang discloses wherein the first sensing element or the second sensing element (101, see fig. 13) is exposed by the adhesive layer (202, see fig. 13) .
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide wherein the first sensing element or the second sensing element is exposed by the adhesive layer in the device of Kim et al. based on the teachings of Wang in order to provide an adhesive layer provides several key advantages in sensor design, is improved, direct interaction between the sensing material and the target environment (e.g., skin, fluid, or surface), which improves sensitivity, response time, and measurement accuracy.
Pertaining to claim 4, Kim et al. as modified by Wang further discloses, wherein the bottom surface of the chip (101 of Wang) is substantially aligned with a bottom surface of the adhesive layer (202 of Wang).
Pertaining to claim 5, Kim et al. discloses, wherein at least one of the first sensing element and the second sensing element is an acoustic sensor (101).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al. (7,633,144 B1) and Kunimoto et al. (2010/0155925 A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDARGIE M AYCHILLHUM whose telephone number is (571)270-1607. The examiner can normally be reached M-F 9-5.
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/ANDARGIE M AYCHILLHUM/Primary Examiner, Art Unit 2847
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