Notice of Pre-AIA or AIA Status
he present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of group I, claims 1-7, 15-27 in the reply filed on 5/18/26 is acknowledged. Claims 8-14 are withdrawn from further consideration by the examiner, 37 C.F.R. 1.142(b) as being drawn to a non-elected invention.
Oath/Declaration
Oath/Declaration filed on 1/23/24 has been considered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 5-7, 15, 18-24, 26-27 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by XIA et al. (U.S. Patent Publication No. 2021/0050506).
Referring to figures 1-3M, XIA et al. teaches a semiconductor structure, comprising:
at least one dielectric support (307/130); and
a piezo-membrane (120) comprising a plurality of piezo-electric layers (121/124/127) interleaved with a plurality of electrode layers (122/126/128), wherein the piezo-membrane includes:
a first portion supported by the at least one dielectric support (307), and a second portion arranged to move in response to sound waves, wherein the second portion includes an approximate S-shape relative to the first portion (see figure 3M).
Regarding to claim 5, the plurality of piezo- electric layers comprises a nitride material (see paragraph# 22).
Regarding to claim 6, the plurality of electrode layers comprises molybdenum (see paragraph# 22).
Regarding to claim 7, a silicon-based region supporting (105) the at least one dielectric support (307, see paragraph# 19).
Regarding to claim 15, a semiconductor device, comprising:
a sensing portion (115), of the semiconductor device, comprising a stationary portion of a piezo-membrane; and
a non-sensing portion (117), of the semiconductor device, comprising a flexible portion of the piezo-membrane, wherein the non-sensing portion includes a semiconductor stack having a lower portion at a first point that is at least 1 micrometer below the lower portion at a second point (see, paragraph# 33, figure 1).
Regarding to claim 18, an electrode layer (122/126/128) in the piezo-membrane is non-continuous between the stationary portion and the flexible portion (see figure 1)
Regarding to claim 19, the lower portion of the non-sensing portion at a third point is at least 1 pm below the lower portion at the second point (see figure 1, paragraph# 33).
Regarding to claim 20, a plurality of contacts (160/162) that contact the sensing portion of the piezo-membrane (see figure 1).
Regarding to claim 21, a semiconductor device, comprising:
a dielectric layer (307) having an approximate S-shape (see figure 1); and
a piezo-membrane (120) comprising a semiconductor stack, wherein a portion of the dielectric layer under a portion of the semiconductor stack is absent (see figures 1, 3M).
Regarding to claim 22, the piezo-membrane comprises:
a first piezo-electric layer (121);
a bottom electrode (122) over the first piezo-electric layer;
a second piezo-electric layer (124) over the bottom electrode;
a top electrode (126) over the second piezo-electric layer; and
a third piezo-electric layer (127) over the top electrode (see figures 1, 3M).
Regarding to claim 23, the first piezo-electric layer (121) and the second piezo-electric layer (124) are continuous at a break in the bottom electrode (122, see figures 1, 3M).
Regarding to claim 24, the second piezo-electric layer (124) and the third piezo-electric layer (127) are continuous at a break in the top electrode (126, see figure 1, 3M).
Regarding to claim 26, a plurality of contacts (160/162), in a portion of the semiconductor stack that is configured to be stationary, that contact a plurality of electrode layers (122/126/128) in the semiconductor stack (see figures 1, 3M).
Regarding to claim 27, the approximate S-shape includes an inflection point (see figures 1, 3M).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-4, 16-17, 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over XIA et al. (U.S. Patent Publication No. 2021/0050506) as applied to claims 1, 5-7, 15, 18-24, 26-27 above, and further in view of Chen et al. (U.S. Patent Publication No. 2022/0272459).
Referring to figures 1-3M, XIA et al. teaches a semiconductor structure, comprising:
at least one dielectric support (307/130); and
a piezo-membrane (120) comprising a plurality of piezo-electric layers (121/124/127) interleaved with a plurality of electrode layers (122/126/128), wherein the piezo-membrane includes:
a first portion supported by the at least one dielectric support (307), and a second portion arranged to move in response to sound waves, wherein the second portion includes an approximate S-shape relative to the first portion (see figure 3M).
However, the reference does not clearly teach piezo-member comprises a plurality of petals (in claims 2, 4, 25), a mismatch associated with the plurality of petals is in a range from 0.0 micrometers (pm) to approximately 5.0 pm (in claim 3); circular dielectric region (in claim 16), circular silicon-based region (in claim 17).
Chen et al. teaches piezo-member comprises a plurality of petals (see figures 3-4, meeting claims 2, 4, 25), a mismatch associated with the plurality of petals is in a range from 0.0 micrometers to approximately 5.0 (see paragraph# 70, meeting claim 3), a circular dielectric region supporting the non-sensing portion of the semiconductor device and, a circular silicon-based region supporting the circular dielectric region (see figures 3a, 4a, 8a, 9a, meeting claims 16-17).
Therefore, it would have been obvious to a person of ordinary skill in the requisite art at the time of the invention was filed would from a plurality of piezo-member petals in Xia et al. as taught by Chen et al. because it is known in the semiconductor art to provide more reliable performance MEMs device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thanh Nguyen whose telephone number is (571) 272-1695, or by Email via address Thanh.Nguyen@uspto.gov. The examiner can normally be reached on Monday-Thursday from 6:00AM to 3:30PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yara Green, can be reached on (571) 270-3035. The fax phone number for this Group is (571) 273-8300.
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/THANH T NGUYEN/Primary Examiner, Art Unit 2893
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