Prosecution Insights
Last updated: October 02, 2026
Application No. 18/420,694

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Non-Final OA §102
Filed
Jan 23, 2024
Priority
Dec 11, 2023 — TW 112148110
Examiner
MILLER, JAMI VALENTINE
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
United Microelectronics Corp.
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
1040 granted / 1096 resolved
+26.9% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 12m
Avg Prosecution
35 currently pending
Career history
1111
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
31.1%
-8.9% vs TC avg
§102
41.6%
+1.6% vs TC avg
§112
25.3%
-14.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1096 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-20 are pending in this application. Acknowledgement is made of the amendment received 7/23/26 withdrawing claims 11-20. Transfer of Application This application has been transferred within the Office as a result of Examiner Collins’ separation from the Office. Applicant is invited to contact the undersigned to schedule a telephonic interview to discuss and resolve the issues set forth in this Office Action. Election/Restrictions Applicant’s election with traverse of Group I (Claims 1-10) in the reply filed on 7/23/26 is acknowledged. The traversal is on the ground(s) that these particular structural relationships are the direct, inseparable consequence of the specific manufacturing sequence defined in Claim 11 is not persuasive because the produce of claim 1 can be created by the example provided in the restriction dated 5/28/26. Further, additional materially different processes exist, such as, for example forming a first memory gate disposed on a substrate; forming a second memory gate disposed on the substrate; forming a select gate disposed on the substrate and between the first memory gate and the second memory gate; and forming an inner spacer disposed on a side surface of the select gate, wherein each of the first memory gate and the second memory gate comprises a capping layer disposed at a top end thereof, each of the capping layers has a curved side surface facing the select gate, and a top end of the inner spacer is adjacent to a bottom end of each of the capping layers. This method does not necessitate the formation and subsequent removal of portions of the first gate material stack. The examiner agrees that selective deposition of, for example, the first gate stack is a reasonable materially different process. The requirement is still deemed proper and is therefore made FINAL. Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected inventions, there being no allowable generic or linking claim. Foreign Priority Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Information Disclosure Statement Acknowledgment is made that the information disclosure statement has been received and considered by the examiner. If the applicant is aware of any prior art or any other co-pending applications not already of record, he/she is reminded of his/her duty under 37 CFR 1.56 to disclose the same. Drawings There are no objections or rejections to the drawings. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public beYou’e fore the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 6-8 and 10 are rejected under pre-AIA 35 U.S.C. 102(a)(1) as being anticipated by Park et al. (US Patent Application Publication No 6,486,506) hereinafter referred to as Park. Per Claim 1 Park discloses a semiconductor device, comprising a first memory gate (24, left) disposed on a substrate; The examiner notes that the term "on" includes "directly on" (no intermediate materials, elements or space disposed therebetween) and "indirectly on" (intermediate materials, elements or space disposed therebetween) a second memory gate (24, right) disposed on the substrate; a select gate (46) disposed on the substrate and between the first memory gate and the second memory gate; (as in figure 1) and an inner spacer (40, outer portion) disposed on a side surface of the select gate, wherein each of the first memory gate and the second memory gate comprises a capping layer (42) disposed at a top end thereof, each of the capping layers has a curved side surface facing the select gate (as in fig. 1), and a top end of the inner spacer (40) is adjacent to a bottom end of each of the capping layers (42) (as shown in figure 1) Per Claim 6 Hung discloses the device of claim 1 including where the select gate comprises a gate insulating layer (inner portions of 38/40) and a conductive gate layer (46). Additionally, claim 1 recites limitations that are "product-by-process" limitations (i.e. sequentially disposed on the substrate). While product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Hirao, 190 USPQ 15 at 17(footnote 3). The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See also in re Brown, 173 USPQ 685: In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324: In re Avery, 186 USPQ 116 in re Wertheim, 191 USPQ 90 (209 USPQ 254 does not deal with this issue); and In re Marosi et al, 218 USPQ 289 final product per se which must be determined in a "product by, all of" claim, and not the patentability of the process, and that an old or obvious product, whether claimed in "product by process" claims or not. Note that Applicant has the burden of proof in such cases, as the above case law makes clear. Per Claim 7 Hung discloses the device of claim 1 including where each of the capping layers (42) has an asymmetrical cross-sectional shape. ( as shown in figure 1) Per Claim 8 Hung discloses the device of claim 1 including where each of the capping layers (42) has a vertical side surface opposite to the curved side surface. ( as shown in figure 1) Per Claim 10 Hung discloses the device of claim 1 including where a top surface of the select gate (46) is higher than the top end of the inner spacer (40, outer portion) (as shown in figure 1) Allowable Subject Matter Claims 2-5 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Cited Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicants are directed to consider additional pertinent prior art included on the Notice of References Cited (PTOL 892) attached herewith. Wu (US 9,450,057) is provided as a reference for teaching an analogous device including the first and second memory gates, select gate and inner spacer. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMI VALENTINE MILLER whose telephone number is (571)272-9786. The examiner can normally be reached on Monday-Thursday 7am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jami Valentine Miller/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jan 23, 2024
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+3.9%)
1y 12m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1096 resolved cases by this examiner. Grant probability derived from career allowance rate.

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