Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Status of the Claims
Applicant’s remarks/amendments of claims 1-20 in the reply filed on June 23rd, 2026, are acknowledged. Claims 1 and 11 have been amended. Claims 1-20 are pending.
Action on merits of claims 1-20 as follows.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1-10, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Disney (US 2013/0020632, hereinafter as Disn ‘632) in view of Oh (US 2002/0182810, hereinafter as Oh ‘810) and further in view of Chin (US 2017/0317208, hereinafter as Chin ‘208).
Regarding Claim 1 Disn ‘632 teaches a high-voltage semiconductor device, comprising:
a substrate (Fig. 1, (101); [0017]), having a first conductivity type (P-type);
a first well region (Fig. 1, (104); [0018]), having the first conductivity type (P-type) and disposed in the substrate;
a second well region (Fig. 1, (103); [0018]), having a second conductivity type (N-type) and disposed in the substrate;
a first doped top layer (Fig. 1, (102); [0017]), having the first conductivity type (P-type) and disposed between the first well region (104) and the second well region (103);
an isolation region (114; [0020], disposed on the first doped top layer (102);
a gate electrode (108; [0021]), disposed on the isolation region (114) and extended laterally onto the second well region (103); and a field plate (109; [0021]), disposed on the isolation region (114) and extended laterally onto the first well region (see Fig. 1).
Thus, Disn ‘632 is shown to teach all the features of the claim with the exception of explicitly the limitations: “a drain contact region, disposed in the first well region; a source contact region, disposed in the second well region”.
Oh ‘810 teaches a drain contact region (Fig. 4, (308b); [0033]), disposed in the first well region (303b); a source contact region (Fig. 4, (308a); [0033]), disposed in the second well region (303c).
Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Disn ‘632 by having a drain contact region, disposed in the first well region; a source contact region, disposed in the second well region for the purpose of providing a high voltage transistor for a smart power device having a high breakdown voltage (see para. [0015]) as suggested by Oh ‘810.
Thus, Disn ‘632 and Oh ‘810 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a bottom surface of the first doped top layer is higher than a bottom surface of the first well region; a deep well region, having the second conductivity type and disposed directly below the first well region, the first doped top layer, and the second well region”.
Chin ‘208 teaches a bottom surface of the first doped top layer (Fig. 3C, (222); [0017]) is higher than a bottom surface of the first well region (212a; [0017]); a deep well region (202; [0027]), having the second conductivity type and disposed directly below the first well region (212a), the first doped top layer (222), and the second well region (212b).
Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Disn ‘632 and Oh’ 810 by having a bottom surface of the first doped top layer is higher than a bottom surface of the first well region; a deep well region, having the second conductivity type and disposed directly below the first well region, the first doped top layer, and the second well region for the purpose of reducing or eliminating body effect (see para. [0001]) as suggested by Chin ‘208.
Regarding Claim 2 Disn ‘632 teaches the first conductivity type is a p-type and the second conductivity type is an n-type (see Fig. 1).
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Fig. 1 (Disn ‘632)
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Fig. 4 (Oh ‘810)
Regarding Claim 3, Disn ‘632 teaches the first doped top layer (102) is in direct contact with one side surface of the first well region (104).
Oh ‘810 teaches the first well region (303b; [0030]) and the first doped top layer (304; [0028]) construct a continuous structure having the first conductivity type (P-type) to be a drain region (see para. [0028]).
Regarding Claim 4, Oh ‘810 teaches a doping concentration (heavily doped p-type) of the first well region (303b; [0030]) is higher than a doping concentration (lightly doped p-type) of the first doped top layer (304; [0028]).
Regarding Claim 5, Oh ‘810 teaches a second doped top layer (310; [0027]) having the second conductivity type (n-type) and disposed directly below the first doped top layer (304), wherein the second doped top layer (310) is laterally separated from the first well region (303b).
Regarding Claim 6, Oh ‘810 teaches a top surface of the second doped top layer (310) is in direct contact with a bottom surface of the first doped top layer (304).
Regarding Claim 7, Disn ‘632, Oh ‘810 and Chin ‘208 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a portion of the substrate is located between the first well region and the second doped top layer”.
However, it has been held to be within the general skill of a worker in the art to have a portion of the substrate is located between the first well region and the second doped top layer on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have a portion of the substrate is located between the first well region and the second doped top layer in order to improve the performance of the semiconductor device.
Regarding Claim 8, Disn ‘632, Oh ‘810 and Chin ‘208 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a doping concentration of the second doped top layer is the same as a doping concentration of the first doped top layer”.
However, it has been held to be within the general skill of a worker in the art to have a doping concentration of the second doped top layer is the same as a doping concentration of the first doped top layer on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have a doping concentration of the second doped top layer is the same as a doping concentration of the first doped top layer in order to improve the performance of the semiconductor device.
Regarding Claim 9, Oh ‘810 teaches a side of the second doped top layer (310) is vertically aligned with a side of the first doped top layer (304),
Disn ‘632, Oh ‘810 and Chin ‘208 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a portion of the substrate is located between the first well region and the side of the first doped top layer, and the portion of the substrate is located between the first well region and the side of the second doped top layer”.
However, it has been held to be within the general skill of a worker in the art to have a portion of the substrate is located between the first well region and the side of the first doped top layer, and the portion of the substrate is located between the first well region and the side of the second doped top layer on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have a portion of the substrate is located between the first well region and the side of the first doped top layer, and the portion of the substrate is located between the first well region and the side of the second doped top layer in order to improve the performance of the semiconductor device.
Regarding Claim 10, Oh ‘810 teaches the first well region, the portion of the substrate and the first doped top layer having the first conductivity type (p-type).
Disn ‘632, Oh ‘810 and Chin ‘208 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the first well region, the portion of the substrate and the first doped top layer construct a continuous structure having the first conductivity type to be a drain region”.
However, it has been held to be within the general skill of a worker in the art to have the first well region, the portion of the substrate and the first doped top layer construct a continuous structure having the first conductivity type to be a drain region on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have the first well region, the portion of the substrate and the first doped top layer construct a continuous structure having the first conductivity type to be a drain region in order to improve the performance of the semiconductor device.
Regarding Claim 16, Disn ‘632 teaches a bulk contact region (117; [0019]) having the second conductivity type, disposed in the second well region (104) and laterally separated from the source contact region (106).
Regarding Claim 20, Disn ‘632 teaches the field plate (109; [0021]) and the gate electrode (108; [0021]) are two laterally separated portions of a polysilicon layer.
Claims 11-15 are rejected under 35 U.S.C. 103 as being unpatentable over Disn ‘632, Oh ‘810 and Chin ‘208 as applied to claim 5 above, and further in view of Lao (US 9343572, hereinafter as Lao ‘572).
Regarding Claim 11, Disn ‘632, Oh ‘810 and Chin ‘208 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a third well region, having the second conductivity type, disposed on the deep well region, and surrounding the first well region, the first doped top layer, the second doped top layer and the second well region”.
Lao ‘572 teaches a third well region (110b; col. 5, lines 21-30), having the second conductivity type, disposed on the deep well region (104), and surrounding the first well region, the first doped top layer, the second doped top layer and the second well region (see Fig. 13).
Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Disn ‘632, Oh ‘810 and Chin ‘208 by having a third well region, having the second conductivity type, disposed on the deep well region, and surrounding the first well region, the first doped top layer, the second doped top layer and the second well region in order to decrease the electric field density of the channel in the epitaxial layer, which in turn decreases the on-resistance of the high-voltage semiconductor device (see col. 12, lines 20-25) as suggested by Lao ‘572.
Regarding Claim 12, Lao ‘572 teaches the second doped top layer (108) is in direct contact with the top surface of the deep well region (104).
Disn ‘632, Oh ‘810, Chin ‘208 and Lao ‘572 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a bottom surface of the first well region is in direct contact with a top surface of the deep well region”.
However, it has been held to be within the general skill of a worker in the art to have a bottom surface of the first well region is in direct contact with a top surface of the deep well region on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. (see Figs. 1 and 7M of Chan (US 2016/0064494; a bottom surface of the first well region (173; [0022]) is in direct contact with a top surface of the deep well region (120; [0019])) as evidence. A person of ordinary skills in the art is motivated to have a bottom surface of the first well region is in direct contact with a top surface of the deep well region in order to improve the performance of the semiconductor device.
Regarding Claim 13, Lao ‘572 teaches a side of the second doped top layer (108) is vertically aligned with a side of the first doped top layer (14b),
Disn ‘632, Oh ‘810, Chin ‘208 and Lao ‘572 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a portion of the third well region is located between the second well region and the side of the first doped top layer, and the portion of the third well region is located between the second well region and the side of the second doped top layer”.
However, it has been held to be within the general skill of a worker in the art to have a portion of the third well region is located between the second well region and the side of the first doped top layer, and the portion of the third well region is located between the second well region and the side of the second doped top layer on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. (see Figs. 1 and 7M of Chan (US 2016/0064494; a portion of the third well region (130; [0019]) is located between the second well region (171; [0022]) and the side of the first doped top layer (143; [0028]), and the portion of the third well region (130) is located between the second well region (171) and the side of the second doped top layer ( 141; [0028])) as evidence. A person of ordinary skills in the art is motivated to have a bottom surface of the first well region is in direct contact with a top surface of the deep well region in order to improve the performance of the semiconductor device.
Regarding Claim 14, Disn ‘632, Oh ‘810, Chin ‘208 and Lao ‘572 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the second well region is located in the third well region, and a doping concentration of the second well region is higher than a doping concentration of the third well region”.
However, it has been held to be within the general skill of a worker in the art to have the second well region is located in the third well region, and a doping concentration of the second well region is higher than a doping concentration of the third well region on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. (see Figs. 1 and 7M of Chan (US 2016/0064494), the second well region (171) is located in the third well region (130)) as evidence. A person of ordinary skills in the art is motivated to have the second well region is located in the third well region, and a doping concentration of the second well region is higher than a doping concentration of the third well region in order to improve the performance of the semiconductor device.
Regarding Claim 15, Disn ‘632, Oh ‘810, Chin ‘208 and Lao ‘572 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a doping concentration of the third well region is the same as a doping concentration of the deep well region”.
However, it has been held to be within the general skill of a worker in the art to have a doping concentration of the third well region is the same as a doping concentration of the deep well region on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have a doping concentration of the third well region is the same as a doping concentration of the deep well region in order to improve the performance of the semiconductor device.
Allowable Subject Matter
Claims 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Claim 17 includes allowable subject matter since the prior art made of record and considered pertinent to the applicants’ disclosure, taken individually or in combination, does not teach or suggest the claimed invention having: “an interconnect structure, comprising a plurality of metal layers disposed above the source electrode, the bulk electrode and the drain electrode, wherein the plurality of metal layers comprises a first portion, a second portion and a third portion laterally separated from each other and electrically connected to the drain electrode, the source electrode and the bulk electrode, respectively, the first portion comprises a plurality of drain field plates, and the second portion comprises a plurality of source field plates”.
Claims 18-19 depend from claim 17.
Response to Arguments
Applicant’s arguments with respect to claims 1-20, filed on June 23rd, 2026, have been considered but are moot in view of the new ground of rejection.
Interviews After Final
Applicants note that an interview after a final rejection is permitted in order to place the application in condition for allowance or to resolve issues prior to appeal. However, prior to the interview, the intended purpose and content of the interview should be presented briefly, preferably in writing. Upon review of the agenda, the Examiner may grant the interview if the examiner is convinced that disposal or clarification for appeal may be accomplished with only nominal further consideration. Interviews merely to restate arguments of record or to discuss new limitations will be denied. See MPEP § 714.13
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner Dzung Tran whose telephone number is (571) 270-3911. The examiner can normally be reached on M-F 8 AM-5PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Supervisor Sue Purvis can be reached on 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DZUNG TRAN/
Primary Examiner, Art Unit 2893
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