DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Claims 1-4, 7-13, 19-27 are pending in this application. Acknowledgement is made of the amendment received 5/28/24 cancelling claims 5-6 and 14-18 and adding new claims 21-27.
Information Disclosure Statement
Acknowledgment is made that the information disclosure statement has been received and considered by the examiner. If the applicant is aware of any prior art or any other co-pending applications not already of record, he/she is reminded of his/her duty under 37 CFR 1.56 to disclose the same.
Drawings
There are no objections or rejections to the drawings.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 22 is are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 22 recites the limitation “wherein the sidewall spacer is disposed over the top electrode, and wherein the top electrode and magnetic tunnel junction include sloping sidewalls”. It is unclear what is meant by the sidewall spacer. Claim 22 depends on claim 10 which depends on claim1. Neither claim 10 nor claim 1 include a sidewall spacer. The recitation lacks antecedent basis. One of ordinary skill in the relevant art would not know what structures/steps are covered by the limitation. For these reasons, the claim is indefinite.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 10, 13, 19-20 and 24-25 are rejected under pre-AIA 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US Patent Application Publication No 2019/0013353) hereinafter referred to as Lee.
Per Claim 1 Lee discloses a memory device, comprising (see figure 1)
a bottom connection structure (including 110, 124): and
a memory cell (including 116, 128, 130, 132), comprising:
a bottom electrode (116) on the bottom connection structure, wherein a peripheral portion of the bottom electrode is disposed above a peripheral portion of the bottom connection structure; (as shown in figure 2J)
a memory element (including 128, 130, 132) on the bottom electrode (116); and
dielectric structure (120) on a sidewall of the memory element and on an upper surface of the bottom electrode. (see figure 1)
Per Claim 2 Lee discloses the device of claim 1 including where a sidewall spacer (126) on the sidewall of the memory element, and on the upper surface of the bottom electrode (116), wherein the peripheral portion of the bottom electrode extends beyond the sidewall spacer. (see figure 1)
Per Claim 10 Lee discloses the device of claim 1 including where the memory element (including 224, 226, 230) comprises a magnetic tunnel junction comprising: a reference magnetization layer (228); a nonmagnetic tunnel barrier layer (226) on the reference magnetization layer; and a free magnetization layer (224) on the nonmagnetic tunnel barrier layer.
Per Claim 13 Lee discloses the device of claim 10 including where the memory element further comprises a capping layer (138) on the free magnetization layer
Per Claim 19 Lee discloses a memory device, comprising (see figure 1)
a bottom connection structure (including 110, 124); and
a memory cell (including 116, 128, 130, 132), comprising:
a bottom electrode (116) on the bottom connection structure; (as shown in figure 2J)
a memory element (including 128, 130, 132) on the bottom electrode (116);
wherein a width of the bottom electrode and a width of the bottom connection structure (including 110, 124) are longer than a width of the memory element (including 128, 130, 132); (see figure 1) and
a dielectric structure (120) on a sidewall of the memory element and an upper surface of the bottom electrode (see figure 1)
Per Claim 20 Lee discloses the device of claim 19 including where a sidewall of the bottom electrode connection structure (including 110, 124) is substantially aligned with a sidewall of the bottom electrode (116). (see figure 1)
Per Claim 24 Lee discloses a memory device, comprising (see figure 1)
a bottom connection structure (including 110, 124); and
a memory cell (including 116, 128, 130, 132), comprising:
a bottom electrode (116) on the bottom connection structure; (as shown in figure 2J)
a memory element (including 128, 130, 132) on the bottom electrode (116);
wherein a width of the bottom electrode and a width of the bottom connection structure (including 110, 124) are longer than a width of the memory element (including 128, 130, 132); (see figure 1) and
wherein the bottom electrode (116) and the bottom connection structure (including 110, 124) extend horizontally from the memory element; (see figure 1) and
a dielectric structure (120) on a sidewall of the memory element and on an upper surface of the bottom electrode. (see figure 1)
Per Claim 25 Lee discloses the device of claim 24 including a sidewall spacer (126) on a sidewall of the memory element, and on the upper surface of the bottom electrode, wherein the peripheral portion of the bottom electrode (116) extends beyond the sidewall spacer. (see fig. 1)
Allowable Subject Matter
Claims 3-4, 7-9, 11-12, 21-23 and 26-27 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 22 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Cited Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicants are directed to consider additional pertinent prior art included on the Notice of References Cited (PTOL 892) attached herewith.
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMI VALENTINE MILLER whose telephone number is (571)272-9786. The examiner can normally be reached on Monday-Thursday 7am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Jami Valentine Miller/Primary Examiner, Art Unit 2818