Prosecution Insights
Last updated: April 19, 2026
Application No. 18/426,925

PLASMA PROCESSING SYSTEM AND PLASMA PROCESSING METHOD

Final Rejection §103
Filed
Jan 30, 2024
Examiner
SATHIRAJU, SRINIVAS
Art Unit
2844
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tokyo Electron Limited
OA Round
2 (Final)
89%
Grant Probability
Favorable
3-4
OA Rounds
2y 2m
To Grant
94%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
715 granted / 806 resolved
+20.7% vs TC avg
Moderate +5% lift
Without
With
+5.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
30 currently pending
Career history
836
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
43.6%
+3.6% vs TC avg
§102
17.6%
-22.4% vs TC avg
§112
16.7%
-23.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 806 resolved cases

Office Action

§103
FINAL REJECTION NOTICE Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed on 11/18/2025 have been fully considered but they are not persuasive. Amendments to claims submitted on 11/18/2025 still reads on the same prior art. However, examiner identified that claim 22 is allowable if combined with independent claims 1, 19, 20, 21, and 24. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-21, 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over US20140003086 A1 by Schaffer et al (Schaffer). Referring to claim 1, Schaffer Fig 1-9 teaches, a plasma processing system comprising: a source RF signal generator (item 112 RF source paragraph [0032])configured to generate a source RF signal for plasma generation (paragraph [0033]); a first matching circuit (item 110) coupled to the source RF signal generator (item 112 and paragraph [0034]); a bias RF signal generator (item 116) configured to generate a bias RF signal (paragraph [0034]); a second matching circuit (item 118) coupled to the bias RF signal generator paragraph [0034]); a phase control circuit (item 114) coupled to the second matching circuit (item 118) and configured to shift a phase of the bias RF signal supplied from the bias RF signal generator through the second matching circuit (paragraphs [0035] –[0037]); a first plasma processing apparatus (Fig 2 item 202 paragraph [0039]) including a first plasma processing chamber and a first substrate support, the first substrate support being disposed in the first plasma processing chamber and including one or a p plurality of one or more first lower electrodes, the source RF signal being supplied to the first plasma processing apparatus through the first matching circuit, and the bias RF signal being supplied to at least one of the one or the plurality of one or more first lower electrodes of the first plasma processing apparatus through the second matching circuit (See paragraph [0039] where Schaffer teaches configuration of n plasma reactors connected to the controller which are similar to Fig 1 item 100); and a second plasma processing apparatus including a second plasma processing chamber and a second substrate support, the second substrate support being disposed in the second plasma processing chamber and including one or a plurality of one or more second lower electrodes, the one or more second lower electrodes being coupled to the phase control circuit, the source RF signal being supplied to the second plasma processing apparatus through the first matching circuit, the bias RF signal being supplied to the phase control circuit through the second matching circuit, the phase control circuit shifting the phase of the bias RF signal, and the bias RF signal of which the phase is shifted in the phase control circuit being supplied to at least one of the one or the plurality of one or more second lower electrodes of the second plasma processing apparatus (See paragraphs [0039]-[0041] and where Schaffer suggests the obvious variations of the plasma system with n number of processing systems being controlled with same generator or several generators with one controller.) Hence, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the instant application to incorporate the Schaffer’s suggestions in to fig 1 in order to process several processing systems at a time. Referring to claim 2, Schaffer’s modified reference teaches the plasma processing system according to claim 1, wherein the phase control circuit includes at least one inductor and at least one capacitor. (See abstract and paragraphs [0029], [0036] where Schaffer teaches a tunable capacitor and inductor for controlling the phase and match). Referring to claim 3, Schaffer’s modified reference teaches the plasma processing system according to the claim 1, wherein the phase control circuit includes at least one of a variable inductor or a variable capacitor. (See paragraph [0039] where Schaffer suggests these variations). Hence, it is obvious to a person with ordinary skill in the art. Referring to claim 4, Schaffer’s modified reference teaches the plasma processing system according to claim 3, further comprising: a sensor (Fig 1 item 150 detector) configured to monitor the source RF signal between the source RF signal generator (item 112 )and the first matching circuit and output a monitoring result, wherein the phase control circuit is configured to control one or both of inductance of the variable inductor and capacitance of the variable capacitor based on the monitoring result (See paragraph [0036]). Referring to claim 5, Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein the sensor is a VI sensor configured to monitor a phase difference of a voltage and a current of the source RF signal. (See paragraphs [0010], [0036] and [0049]). Referring to claim 6 Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein the sensor is a directional coupler configured to monitor a reflected wave of the source RF signal. Referring to claim 7, Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein the phase control circuit is configured to control one or both of inductance of the variable inductor and capacitance of the variable capacitor before or after plasma processing in the second plasma processing apparatus. (See Fig 2 and paragraphs [0039] –[0041]) Referring to claim 8, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to wherein the phase control circuit is configured to control inductance of the variable inductor and capacitance of the variable capacitor during plasma processing in the second plasma processing apparatus. (See paragraph [0036] where Schaffer suggests capacitors and inductors). Referring to claim 9, Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein a phase difference between the bias RF signal and the bias RF signal of which the phase is shifted is 180 degrees. (paragraphs [0050] –[0052]). Referring to claim 10, Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein the first plasma processing apparatus includes a first upper electrode disposed above the first substrate support, the second plasma processing apparatus includes a second upper electrode disposed above the second substrate support, the first matching circuit is coupled to at least one of the one or the plurality of one or more first lower electrodes or the first upper electrode and to at least one of the one or the plurality of one or more second lower electrodes or the second upper electrode, the second matching circuit is coupled to at least one of the one or the plurality of one or more first lower electrodes, and the phase control circuit is coupled to at least one of the one or the plurality of one or more second lower electrodes. (See Paragraphs [0039] –[0044] where Schaffer suggests these variations and hence it is obvious to a person with ordinary skill). Referring to claim 11, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to wherein the first plasma processing apparatus includes a first antenna (Fig 1 item 104) disposed above the first plasma processing chamber (Fig 1 and item 101 plasma chamber and paragraph [0033]), the second plasma processing apparatus includes a second antenna disposed above the second plasma processing chamber, the first matching circuit is coupled to the first antenna and to the second antenna, the second matching circuit is coupled to at least one of the one or the plurality of one or more first lower electrodes, and the phase control circuit is coupled to at least one of the one or plurality of one or more second lower electrodes. (From Fig 2 and paragraphs [0039]-[0044] it would have been obvious to a person with ordinary skill in the art). Referring to claim 12, Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein the source RF signal has a frequency within a range of 10 MHz to 120 MHz (See paragraph [0066]). Referring to claim 13, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to claim 1, wherein the bias RF signal has a frequency within a range of 100 kHz to 20 MHz (See paragraph [0066]). Referring to claim 14, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to claim 1 but silent on wherein the bias RF signal has a frequency within a range of 400 kHz to 4 MHz. However, it is within the scope of a person with ordinary skill in the art as varying bias power for minimizing the reflected power is known skill of the art. Referring to claim 15, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to claim 1wherein the source RF signal is a continuous wave having a first frequency. (See paragraph [0034]). Referring to claim 16, Schaffer’s modified reference teaches the plasma processing system according to The plasma processing system according to wherein the source RF signal is a pulse wave periodically including a plurality of first electrical pulses, and each of the plurality of first electrical pulses includes a continuous wave having a first frequency. (See paragraph [0034] where Schaffer teaches it can be a continuous wave on pulsed mode power). Referring to claim 17, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to claim 1 but silent on wherein the bias RF signal is a continuous wave having a second frequency. However, it is within the scope of the art and a person with ordinary skill in the art. Referring to claim 18, Schaffer’s modified reference teaches the plasma processing system according to the plasma processing system according to claim 1 but silent on wherein the bias RF signal is a pulse wave periodically including a plurality of second electrical pulses, and each of the plurality of second electrical pulses includes a continuous wave having a second frequency. However, Schaffer teaches it as pulsed frequency power or continuous wave form (paragraph [0034]). However, it is within the scope of a person with ordinary skill in the art. Referring to claim 19, Schaffer’s reference teaches a plasma processing method executed in a plasma processing system (Fig 1 item 100 and paragraph [0032]) including a first plasma processing apparatus and a second plasma processing apparatus, the plasma processing method comprising: generating a first RF signal having a first frequency; generating a second RF signal having a second frequency lower than the first frequency; shifting a phase of the second RF signal; supplying, through a first matching circuit, the first RF signal to the first plasma processing apparatus and to the second plasma processing apparatus; supplying, through a second matching circuit, the second RF signal to the first plasma processing apparatus; [[and]] shifting a phase of the second RF signal by a phase control circuit, the second RF signal being supplied to the phase control circuit through the second matching circuit; and supplying the second RF signal of which the phase is shifted to the second plasma processing apparatus. (See Fig 1 and paragraphs [0032]-[0038]). Hence, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the instant application to incorporate the Schaffer’s teachings of several embodiments in to fig 1 in order to process several processing systems at a time. Referring to claim 20, Schaffer’s reference teaches A plasma processing system (Fig 1 item 100) comprising: an RF signal generator (item 112) configured to generate an RF signal; a matching circuit (110) coupled to the RF signal generator (item 112); a voltage pulse generator configured to generate a sequence of voltage pulses; a phase control circuit (item 114) configured to shift phases of the sequence of voltage pulses supplied from the voltage pulse generator; a first plasma processing apparatus (Fig 1 or Fig 2 item 202 paragraph [0039]) including a first plasma processing chamber and a first substrate support, the first substrate support being disposed in the first plasma processing chamber (item 101) and including one or a plurality of one or more first lower electrodes, the RF signal being supplied to the first plasma processing apparatus through the matching circuit, and the sequence of voltage pulses being supplied to the one or the plurality of one or more first lower electrodes of the first plasma processing apparatus from the voltage pulse generator ([0035] –[0047]); and a second plasma processing apparatus (Fig 2 item 202)including a second plasma processing chamber and a second substrate support, the second substrate support being disposed in the second plasma processing chamber and including one or a plurality of one or more second lower electrodes, the one or more second lower electrodes being coupled to the phase control circuit, the RF signal being supplied to the second plasma processing apparatus through the matching circuit, the sequence of voltage pulses being supplied to the phase control circuit from the voltage pulse generator, the phase control circuit shifting the phase of the sequence of voltage pulses, and the sequence of voltage pulses of which the phases are shifted in the phase control circuit being supplied to at least one of the one or the plurality of one or more second lower electrodes of the second plasma processing apparatus. (Fig 2 and paragraphs [0039]-[0046] where Schaffer teaches phase shift and adjustment of phase differences not only for single plasma system but also plurality of plasma processing systems) Hence, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the instant application to incorporate the Schaffer’s teachings of several embodiments in to fig 1 in order to process several processing systems at a time. Referring to claim 21, Schaffer’s reference teaches a plasma processing system (Fig 1 item 100) comprising: a source RF signal generator (item 112) configured to generate a source RF signal for plasma generation (paragraphs [0032] –[0033]); a first matching circuit (110) coupled to the source RF signal generator (112); a bias RF signal generator (item 116) configured to generate a bias RF signal; a second matching circuit (item 118) coupled to the bias RF signal generator’s plasma processing apparatuses (n is an integer greater than or equal to 2) coupled in parallel to the first matching circuit; and(n - 1) phase control circuits, wherein the (n - 1) phase control circuits are coupled in series between the second matching circuit and an n-the plasma processing apparatus among the n plasma processing apparatuses and are configured to sequentially shift a phase of the bias RF signal supplied from the bias RF signal generator through the second matching circuit, a k-th (k is an integer of 1 to n - 1) phase control circuit among the (n - 1) phase control circuits is coupled to a k-th plasma processing apparatus and to a (k + 1)-th plasma processing apparatus among the n plasma processing apparatuses,a first plasma processing apparatus among the n plasma processing apparatuses includes a first plasma processing chamber and a first substrate support, in which the first substrate support is disposed in the first plasma processing chamber and includes one or a plurality of one or more first lower electrodes, the source RF signal is supplied to the first plasma processing apparatus through the first matching circuit, and the bias RF signal is supplied to at least one of the one or the plurality of one or more first lower electrodes of the first plasma processing apparatus through the second matching circuit, and the (k + 1)-th plasma processing apparatus among the n plasma processing apparatuses includes a (k + 1)-th plasma processing chamber and a (k + 1)-th substrate support, the (k + 1)-th substrate support being disposed in the (k + 1)-th plasma processing chamber and including one or a plurality of one more (k + 1)-th lower electrodes, the one or more (k + 1)-th lower electrodes being coupled to the k-th phase control circuit, the source RF signal being supplied to the (k + 1)-th plasma processing apparatus through the first matching circuit, the bias RF signal being supplied to the k-th phase control circuit through the second matching circuit, the k-th phase control circuit shifting the phase of the bias RF signal, and the bias RF signal of which the phase is shifted in the k-th phase control circuit among the (n - 1) phase control circuits being supplied to at least one of the one or the plurality of one or more (k + 1)-th lower electrodes of the (k + 1)- th plasma processing apparatus. (See Fig 2-15 and paragraphs [0039] –[0063]) Hence, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the instant application to incorporate the Schaffer’s several embodiments in to fig 1 in order to process several processing systems at a time. Referring to claim 23, Schaffer’s modified reference teaches the plasma processing system according to claim 21, further comprising: but silent on n first switches that switch whether or not each of the n plasma processing apparatuses is coupled to the first matching circuit; and n second switches that switch whether or not each of the n plasma processing apparatuses is coupled to the second matching circuit. However, Schaffer teaches in paragraphs [0036] direction couplers 150 and 152 which are connected to several plasma processors Fig 2 to Fig 9 and paragraphs [0039] –[0052] suggests in several embodiments these limitations. Hence, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the instant application to incorporate the Schaffer’s several embodiments in to fig 1 in order to process several processing systems simultaneously. Referring to claim 24, Schaffer’s reference teaches : A plasma processing system (Fig 1 item 100 paragraph [0032])comprising: a source RF signal generator (112) configured to generate a source RF signal for plasma generation (paragraph [0033]); a first matching circuit (110) coupled to the source RF signal generator (116); a voltage pulse generator configured to generate n (n is an integer greater than or equal to 2) sequences of voltage pulses, the phases of the n sequences of voltage pulses are different from each other, the voltage pulse generator shifting the phases of the n sequences of voltage pulses based on the number n; and n plasma processing apparatuses, wherein a k-th (k is an integer of 1 to n) plasma processing apparatus among the n plasma processing apparatuses includes a k-th plasma processing chamber and a k-th substrate support, the k-th substrate support is disposed in the k-th plasma processing chamber and includes one or a plurality of one or more the k-th lower electrodes, the source RF signal is supplied to the k-th plasma processing apparatus through the first matching circuit, and a k-th sequence of voltage pulses in the n sequences of voltage pulses is supplied to at least one of the one or the plurality of one or more k-th lower electrodes of the k-th plasma processing apparatus. (See Fig 2 to 9 and paragraphs [0039] –[0051]). Hence, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the instant application to incorporate the Schaffer’s several embodiments in to fig 1 in order to process several processing systems at a time. Allowable Subject Matter Claim 22 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Referring to claim 22 the closest prior art of record fails to teach or reasonably suggest the plasma processing system according to a plasma processing system according to wherein the (n - 1) phase control circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees/n. Hence claim 22 may be allowable subject matter. Conclusion Claims 1-21, 23, 24 are rejected. Claim 22 is objected. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SRINIVAS SATHIRAJU whose telephone number is (571)272-4250. The examiner can normally be reached 8:30AM-5.30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis J Betsch can be reached at 571-270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SRINIVAS SATHIRAJU/Examiner, Art Unit 2844 02/17/2026
Read full office action

Prosecution Timeline

Jan 30, 2024
Application Filed
Aug 21, 2025
Non-Final Rejection — §103
Nov 18, 2025
Response Filed
Feb 12, 2026
Examiner Interview (Telephonic)
Feb 17, 2026
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603248
PLASMA PROCESSING APPARATUS
2y 5m to grant Granted Apr 14, 2026
Patent 12604387
PLASMA CONFINEMENT SYSTEM AND METHODS FOR USE
2y 5m to grant Granted Apr 14, 2026
Patent 12598689
ROTATING CORE PLASMA COMPRESSION SYSTEM
2y 5m to grant Granted Apr 07, 2026
Patent 12598691
BEAM TRANSPORT SYSTEM AND METHOD, ACCELERATOR INCLUDING BEAM TRANSPORT SYSTEM, AND ION SOURCE INCLUDING THE ACCELERATOR
2y 5m to grant Granted Apr 07, 2026
Patent 12592362
PLASMA PROCESSING APPARATUS
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
89%
Grant Probability
94%
With Interview (+5.2%)
2y 2m
Median Time to Grant
Moderate
PTA Risk
Based on 806 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month