DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Applicant is advised that should claim 1 be found allowable, claim 17 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7, 11-13, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Suda et al. (US 20220285169 A1) in view of Katsunuma (US 20230420263 A1).
As to claim 1, Suda discloses a method for etching a pattern in a layer of a substrate [Abstract], the method comprising:
holding the substrate in a plasma chamber [para. 0050], the substrate comprising a patterned tungsten silicon nitride (WxSiyNz) layer MSK [para. 0052, “tungsten”] over a dielectric layer IL1/IL2/SF formed on an underlayer IL1/IL2/UL, the dielectric layer being a stack of alternating layers of silicon oxide and silicon nitride [Fig. 3, para. 0051-52] ;
flowing a gas over the substrate in the plasma chamber to provide a first flow of carbonyl sulfide (COS) at a first flow rate [para. 0059], a second flow of a perfluorocarbon (CxFy) at a second flow rate [para. 0056], and a third flow of oxygen (O2) at a third flow rate [para. 0057];
ionizing the gas in the plasma chamber to generate a plasma [para. 0053, 0061]; and
exposing the substrate to the plasma, the exposing selectively etching the dielectric layer with the pattern of the patterned WxSiyNz, layer to form a patterned dielectric layer [para. 0064; Fig. 3-4].
Suda discloses the patterned mask layer MSK may contain tungsten [Fig. 3, para. 0052], but fails to explicitly disclose (emphasis added):
a patterned tungsten silicon nitride (WxSiyNz) layer.
However, Katsunuma (US 20230420263 A1) teaches a patterned tungsten silicon nitride layer be used as a hard mask in patterning a dielectric layer stack [para. 0085-86].
Therefore, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the patterned tungsten mask, of Suda, to include the patterned tungsten silicon nitride mask, of Katsunuma, because it would be an effective hard mask for patterning a dielectric layer stack, as taught by Katsunuma [para. 0085-86].
Suda fails to explicitly disclose an example comprising each of the recited gases, but nonetheless provides motivation to combine each of the gases in the first process gas, as follows:
COS, to protect the side wall during etching [para. 0059];
perfluorocarbon (CxFy), to improve selectivity in etching the silicon-containing film during etching [para. 0056]; and
oxygen (O2) to suppress closing of the mask during etching [para. 0057].
Therefore, it would have been prima facie obvious to one of ordinary skill in the art to include each of the above gases for the intended purpose of each gas, see above, with predictable result of providing a dielectric etch with reduced side wall etching, improved selectivity in etching the silicon-containing film, and suppress closure of the mask, as taught by Suda [para. 0056-57, 0059].
As to claim 2, modified Suda discloses the method of claim 1, but fails to explicitly disclose:
wherein a ratio of the first flow rate to the second flow rate is between 1:10 and 1:30, and
wherein a ratio of the first flow rate to the third flow rate is between 1:5 and 1:15.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the etching method of modified Suda to include the claimed flowrates because Suda teaches to use COS to protect the side wall during etching [para. 0059], perfluorocarbon (CxFy) to improve selectivity in etching the silicon-containing film during etching [para. 0056], and oxygen (O2) to suppress closing of the mask during etching [para. 0057], and one of ordinary skill in the art would know to use as much or as little as necessary to achieve the desired result and it is not inventive to discover the optimum or workable ranges by routine experimentation, see MPEP 2144.05.
As to claim 3, modified Suda discloses the method of claim 1, but fails to explicitly disclose:
wherein the first flow rate is greater than or equal to 3 sccm and less than or equal to 5 sccm.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the etching method of modified Suda to include the claimed flowrate of COS because Suda teaches to use COS to protect the side wall during etching, and one of ordinary skill in the art would know to use as much or as little as necessary to achieve the desired result and it is not inventive to discover the optimum or workable ranges by routine experimentation, see MPEP 2144.05.
As to claim 4, modified Suda discloses the method of claim 1, wherein selectively etching the dielectric layer comprises etching the dielectric layer with a first etch rate and etching the patterned WxSiyNz layer with a second etch rate, a ratio of the first etch rate to the second etch rate being greater than or equal to 4 and less than or equal to 10 [para. 0068; Fig. 5].
As to claim 5, modified Suda discloses the method of claim 1, wherein the underlayer IL1/IL2/UL comprises silicon nitride [para. 0051].
As to claim 6, modified Suda discloses the method of claim 1,
wherein selectively etching the dielectric layer IL1/IL2/SF exposes a surface of the underlayer IL1/IL2/UL [Figs. 3-4], and
wherein, after a surface of the underlayer is exposed IL1/IL2/UL, a ratio of an etch rate of the dielectric layer to an etch rate of the underlayer is greater than or equal to 1 and less than or equal to 100 [para. 0068; Fig. 5].
As to claim 7, modified Suda discloses the method of claim 6, wherein exposing a surface of the underlayer generates an endpoint signal which, when detected, initiates a termination of etching the dielectric layer [para. 0064].
As to claim 11, modified Suda discloses a method for etching a pattern in a layer of a substrate [Abstract], the method comprising:
holding the substrate in a plasma chamber [para. 0050], the substrate comprising a patterned tungsten silicon nitride (WxSiyNz) layer MSK [para. 0052, “tungsten”] over a dielectric layer IL1/IL2/SF formed on an underlayer IL1/IL2/UL, the dielectric layer being a stack of alternating layers of silicon oxide and silicon nitride [Fig. 3, para. 0051-52];
flowing a gas over the substrate in the plasma chamber to provide a first flow of a halogen-free sulfur compound at a first flow rate [para. 0059, “sulfur-containing gas such as COS”], a second flow of a fluorocarbon at a second flow rate [para. 0056], and a third flow of oxygen (O2) at a third flow rate [para. 0057];
ionizing the gas in the plasma chamber to generate a plasma [para. 0053, 0061]; and
exposing the substrate to the plasma, the exposing selectively etching the dielectric layer with the pattern of the patterned WxSiyNz, layer to form a patterned dielectric layer [para. 0064; Fig. 3-4].
Suda discloses the patterned mask layer MSK may contain tungsten [Fig. 3, para. 0052], but fails to explicitly disclose (emphasis added):
a patterned tungsten silicon nitride (WxSiyNz) layer.
However, Katsunuma (US 20230420263 A1) teaches a patterned tungsten silicon nitride layer be used as a hard mask in patterning a dielectric layer stack [para. 0085-86].
Therefore, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the patterned tungsten mask, of Suda, to include the patterned tungsten silicon nitride mask, of Katsunuma, because it would be an effective hard mask for patterning a dielectric layer stack, as taught by Katsunuma [para. 0085-86].
Suda fails to explicitly disclose an example comprising each of the recited gases, but nonetheless provides motivation to combine each of the gases in the first process gas, as follows:
COS, to protect the side wall during etching [para. 0059];
perfluorocarbon (CxFy), to improve selectivity in etching the silicon-containing film during etching [para. 0056]; and
oxygen (O2) to suppress closing of the mask during etching [para. 0057].
Therefore, it would have been prima facie obvious to one of ordinary skill in the art to include each of the above gases for the intended purpose of each gas, see above, with predictable result of providing a dielectric etch with reduced side wall etching, improved selectivity in etching the silicon-containing film, and suppress closure of the mask, as taught by Suda [para. 0056-57, 0059].
As to claim 12, modified Suda discloses the method of claim 11, wherein the fluorocarbon is a perfluorocarbon (CxFy) [para. 0056].
As to claim 13, modified Suda discloses the method of claim 11, wherein the fluorocarbon is a hydrofluorocarbon (CxHyF1-x-y) [para. 0056].
As to claim 16, modified Suda discloses a method for etching a pattern in a layer of a substrate [Abstract], the method comprising:
holding the substrate in a plasma chamber [para. 0050], the substrate comprising a patterned tungsten silicon nitride (WxSiyNz) layer MSK [para. 0052, “tungsten”] over a dielectric layer IL1/IL2/SF formed on an underlayer IL1/IL2/UL [Fig. 3, para. 0051-52];
flowing a gas over the substrate in the plasma chamber to provide a first flow of carbonyl sulfide (COS) at a first flow rate [para. 0059], a second flow of a perfluorocarbon (CxFy) at a second flow rate [para. 0056], and a third flow of oxygen (O2) at a third flow rate [para. 0057];
ionizing the gas in the plasma chamber to generate a plasma [para. 0053, 0061]; and
exposing the substrate to the plasma, the exposing selectively etching the dielectric layer with the pattern of the patterned WxSiyNz, layer to form a patterned dielectric layer [para. 0064; Fig. 3-4].
As to claim 17, modified Suda discloses the method of claim 16, wherein the dielectric layer is a stack of alternating layers of silicon oxide and silicon nitride [Fig. 3, para. 0051-52].
As to claim 18, modified Suda discloses the method of claim 16, wherein the dielectric layer is an interlayer dielectric (ILD) layer comprising a low dielectric constant (low-k) silicon oxide [para. 0051].
As to claim 19, modified Suda discloses the method of claim 18, wherein etching the dielectric layer exposes a surface of a conductor disposed below the dielectric layer [para. 0051, “underlayer UL may be a polycrystalline silicon layer”].
As to claim 20, modified Suda discloses the method of claim 16, wherein the underlayer IL1/IL2/UL is an insulator [para. 0051].
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Suda et al. (US 20220285169 A1) in view of Katsunuma (US 20230420263 A1), as applied to claims above 1-7, 11-13, and 16-20, and further in view of Iwase et al. (US 20200227270 A1).
As to claim 8, modified Suda discloses the method of claim 1, but fails to explicitly disclose:
wherein an opening in the patterned dielectric layer has a width dimension and a depth dimension, the width being between 10 nm and 100 nm, and a ratio of the depth to the width being greater than 50 and less than 200.
However, Iwase et al. (US 20200227270 A1) discloses a plasma process method [Abstract] for forming patterned dielectric layer with patterned holes to form a 3D NAND stack or DRAM[para. 0224, 0258] using a tungsten hardmask layer [para. 0227], comprising:
wherein an opening in the patterned dielectric layer has a width dimension and a depth dimension, the width being between 10 nm and 100 nm, and a ratio of the depth to the width being greater than 50 and less than 200 [para. 0228].
As to claim 9, modified Suda discloses the method of claim 1, wherein the patterned dielectric layer has a plurality of openings, each opening shaped like a circle having a circularity defined as a ratio of a minimum diameter to a maximum diameter of the opening, the plurality of openings having an average circularity greater than or equal to 0.9 and less than or equal to 1 [Iwase, para. 0224, 0258].
As to claim 10, modified Suda discloses the method of claim 1, wherein the patterned dielectric layer has a plurality of openings, each opening having a fixed designed width, the plurality of openings having a local critical dimension uniformity (LCDU) greater than or equal to 1 nm and less than or equal to 2 nm [Iwase, para. 0224, 0258].
Claims 14 is rejected under 35 U.S.C. 103 as being unpatentable over Suda et al. (US 20220285169 A1) in view of Katsunuma (US 20230420263 A1), as applied to claims 1-7, 11-13, and 16-20 above, and further in view of Zhou et al. (US 20110079918 A1).
As to claim 14, modified Suda discloses the method of claim 11, but fails to explicitly disclose:
wherein the halogen-free sulfur compound is sulfur dioxide (SO2).
However, Zhou teaches a plasma-based etching method [Abstract; claim 1], wherein sulfur dioxide may be used in place of COS as an etchant for removing fluorocarbon etch product [claims 1 and 4].
It would have been prima facie obvious to one of ordinary skill in the before the effective filing date of the claimed invention to modify the sulfur containing compound to protect the side wall during etching, of Suda, to include sulfur dioxide, of Zhou, in order to remove fluorocarbon etch product from the etched pattern, as taught by Zhou [claims 1 and 4].
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Suda et al. (US 20220285169 A1) in view of Katsunuma (US 20230420263 A1), as applied to claims above 1-7, 11-13, and 16-20, and further in view of Wu et al. (US 20220051938 A1).
As to claim 15, modified Suda discloses the method of claim 11, but fails to explicitly disclose:
wherein the halogen-free sulfur compound is hydrogen sulfide (H2S).
However, Wu teaches a silicon nitride plasma etching gas composition comprising COS or hydrogen sulfide [para. 0057].
Therefore, would have been prima facie obvious to one of ordinary skill in the before the effective filing date of the claimed invention to modify the plasma etching gas comprising COS to protect the side wall during etching of silicon nitride and silicon oxide layers, of Suda, to include COS and/or hydrogen sulfide, of Wu, because both are effective in etching silicon nitride layers, as taught by Wu et al. [para. 0057].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure; The additionally cited references are cited to show methods of plasma etching a dielectric layer or stack thereof with a patterned tungsten-containing hardmask layer, and utilizing plasma chemistry comprising oxygen, fluorocarbons, and/or sulfur-containing compounds [Abstract].
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER M REMAVEGE whose telephone number is (571)270-5511. The examiner can normally be reached Monday-Friday 10:00 AM - 3:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Allen can be reached at 571-270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTOPHER REMAVEGE/Examiner, Art Unit 1713
Prosecution Insights