Prosecution Insights
Last updated: July 17, 2026
Application No. 18/431,275

SUBSTRATE SUPPORT

Non-Final OA §103
Filed
Feb 02, 2024
Priority
Feb 21, 2023 — JP 2023-025033
Examiner
AHMED, SHAHED
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tokyo Ohka Kogyo Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
895 granted / 987 resolved
+22.7% vs TC avg
Minimal -0% lift
Without
With
+-0.1%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
55 currently pending
Career history
1027
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
79.3%
+39.3% vs TC avg
§102
10.4%
-29.6% vs TC avg
§112
5.6%
-34.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 987 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This action is responsive to application No. 18431275 filed on 02/02/2024. Information Disclosure Statement Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered. Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Election/Restrictions Applicant’s election without traverse of claims 1-2, 14-19 in the reply filed on 4/23/2026 is acknowledged. Allowable subject matter Claim 19 is objected to as being dependent upon a rejected base claim (independent claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Tomoji (JP H0661388 A). With respect to dependent claim 19, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the adhesive layer has lower adhesion to the semiconductor substrate compared to another adhesive layer that bonds the semiconductor substrate and the another support in the laminate”. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 14-15, 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Tomoji (JP H0661388 A) in view of Takuro et al. (JP 2006007210 A). Regarding Independent claim 1, Tomoji teaches a substrate support comprising: a base material (Fig. 3a, element 2, specification discloses support plate 20) having a bonding surface (top surface) to which a semiconductor substrate (Fig. 3a, element 1a, specification discloses substrate 1a) is bonded; and an adhesive layer (Fig. 3a, element 3a, specification discloses adhesive with negative resist 3a) formed in at least a portion of the bonding surface. Tomoji does not explicitly disclose the adhesive layer having a pattern of dots. Takuro et al. teach an adhesive layer comprising negative resist having a pattern of dots (see abstract, and Figs. 5a- 6c and associated specification). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Tomoji according to the teachings of Takuro et al. with the motivation to provide “high-precision pattern manufacturing techniques”. Regarding claim 14, Tomoji modified by Takuro et al. teach wherein the adhesive layer uses a material (Fig. 3a, element 3a, specification of Tomoji discloses adhesive with negative resist 3a which the same material as the instant application) with adhesive properties that allows partial or complete debonding of the semiconductor substrate from the base material. Regarding claim 15, Tomoji modified by Takuro et al. teach wherein the adhesive layer is formed of a negative resist (Fig. 3a, element 3a, specification of Tomoji discloses adhesive with negative resist 3a). Regarding claim 17, Tomoji modified by Takuro et al. teach wherein the base material is a silicon wafer (Takura discloses element 1 as silicon wafer). Regarding claim 18, Tomoji modified by Takuro et al. teach wherein the semiconductor substrate is a laminate (Fig. 2c discloses adding a laminate) with another support bonded to a first surface, and wherein the bonding surface is bonded to a second surface of the laminate that is opposite to the first surface, to which the another support is bonded. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Tomoji (JP H0661388 A) in view of Takuro et al. (JP 2006007210 A) and further in view of Toshimi et al. (WO 2020105482 A1). Regarding claim 2, Tomoji modified by Takuro et al. teach all of the limitations as discussed above. Tomoji modified by Takuro et al. do not explicitly disclose wherein each of the dots in the pattern of dots has a same area in plan view. Toshimi et al. teach adhesive with do patterns comprising the same area (Fig. 2B, elements 16a are the adhesive dot patterns). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Tomoji and Takuro et al. according to the teachings of Toshimi et al. with the motivation to provide “improve connection reliability of the wiring layer”. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Tomoji (JP H0661388 A) in view of Takuro et al. (JP 2006007210 A) and further in view of Haruna (JP 2013182055 A). Regarding claim 16, Tomoji modified by Takuro et al. teach all of the limitations as discussed above. Tomoji modified by Takuro et al. do not explicitly disclose wherein the negative resist is a cationic-polymerization-type negative resist, a radical-polymerization-type negative resist, or a photo-crosslinking-type negative resist. Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to a radical-polymerization-type negative resist as disclosed in Haruna, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Cited Prior Art The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHED AHMED/ Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Feb 02, 2024
Application Filed
Jun 09, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
91%
With Interview (-0.1%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 987 resolved cases by this examiner. Grant probability derived from career allowance rate.

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