DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Restriction/Election
Pursuant to the election without traverse on July 13, 2026, non-elected claims 7-20 are withdrawn from consideration.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, and 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Figuet, US 2026/0209990 A1, in view of Cheng, US 2020/0373206 A1.
Claim 1: Figuet discloses
and source/drain (S/D) regions (Dop, FIG. 8) disposed over the substrate at opposite sides of the gate structure and connecting the plurality of channel layers, wherein a material of the S/D regions comprises a high thermal conductivity material with a single crystal structure (boron arsenide (BAs)).
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316
548
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Chiang discloses
a substrate (106);
a plurality of channel layers (120) stacked over the substrate;
a gate structure (112) wrapping the plurality of channel layers.
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636
456
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Figuet shows that it was known in the art to have a boron arsenide-source/drain transistor. Cheng discloses that the stacked channels with wrapped gates (e.g. gate-all-around transistors) were known in the art. It would have been obvious to have used the a GAA device such as Cheng in the device of Figuet in order to allow for smaller devices (Cheng [0002]). Alternatively, it would have been obvious to have used boron arsenide in Cheng in order to improve the heat dissipation and reliability ([0003]).
Claim 2: the high thermal conductivity material comprises boron arsenide (BAs) with a thermal conductivity greater than 1000 W/mK (Figuet ([0005]).
Claim 4: the S/D regions is free of silicon or silicon-containing material (boron arsenide).
Claim 5: Cheng discloses a plurality of inner spacers (Cheng 113) respectively disposed between the S/D regions and the gate structure (Cheng FIG. 1C).
Claim 6: in Cheng, the gate structure comprises:
an interface layer (127) wrapping the plurality of channel layers;
a gate dielectric layer (128) overlying the interface layer;
a work function metal layer (130) overlying the gate dielectric layer;
and a gate electrode (135) overlying the work function metal layer.
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Conclusion
Claims 1, 2, and 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Figuet in view of Cheng and Hu, US 2021/0035885 A1. Figuet does not disclose that the boron arsenide has a cubic structure. However, Hu discloses the formation of semiconductor devices in boron arsenide ([0027]) and the structure can be cubic ([0049]). It would have been obvious to have used this structure of boron arsenide as known for the formation of semiconductor devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER BRADFORD whose telephone number is (571)270-1596. The examiner can normally be reached 10:30-6:30.
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/PETER BRADFORD/Primary Examiner, Art Unit 2897
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