DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-7 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-7 of U.S. Patent No. 16/658,355. Although the claims at issue are not identical, they are not patentably distinct from each other because
Regarding Claim 1, both the instant claim 1 and claim 1 of ‘355 recite, a device comprising: a first image sensor element having a first photosensitive region and a first surface that includes a first dielectric portion; a second image sensor element having a second photosensitive region and a second surface that includes a second dielectric portion; an interconnect structure disposed between the first and second image sensor elements, the interconnect structure including a third surface that includes a third dielectric portion and a fourth surface that includes a fourth dielectric portion, the third dielectric portion directly interfacing with the first dielectric portion and the fourth dielectric portion directly interfacing with the second dielectric portion; and a first conductive feature at least partially embedded within the first photosensitive region
and extending to a first conductive element of the interconnect structure; and a second conductive feature at least partially embedded within the second photosensitive region and extending to the first conductive element of the interconnect structure.
Regarding Claim 2, both the instant claim 2 and claim 2 of ‘355 recite, the interconnect structure further includes a substrate and an active region disposed in the substrate, and wherein the second conductive feature extends through the active region.
Regarding Claim 3, both the instant claim 3 and claim 3 of ‘355 recite, the active region includes a component selected from the group consisting of a field effect transistor (FET), a complementary metal-oxide semiconductor (CMOS) transistor, a FinFET, a bipolar junction transistor, a resistor, a capacitor, a diode, and a fuse.
Regarding Claim 4, both the instant claim 4 and claim 4 of ‘355 recite, the first conductive feature decreases in width as the first conductive feature extends from the first photosensitive region to the first conductive element of the interconnect structure.
Regarding Claim 5, both the instant claim 5 and claim 5of ‘355 recite, the entirety of the third surface of the interconnect structure is formed of a first dielectric material, and wherein the entirety of the fourth surface of the interconnect structure is formed of a second dielectric material.
Regarding Claim 6, both the instant claim 6 and claim 6 of ‘355 recite, the first surface of the first image sensor is formed of the same material as the second surface of the second image sensor.
Regarding Claim 7, both the instant claim 7 and claim of ‘355 recite, the first surface of the first image sensor and the second surface of the second image sensor are formed of a material selected from the group consisting of silicon oxide, silicon oxynitride and silicon nitride.
Claims 8-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-7 of U.S. Patent No. 17/347,001. Although the claims at issue are not identical, they are not patentably distinct from each other because
Regarding Claim 8, both the instant claim 8 and claims 1-7 of ‘001 recite a device comprising: a first image sensor, wherein the first image sensor includes a first interconnect structure, the first interconnect structure including a first conductive portion having a first width and a first dielectric portion; a second image sensor, wherein the second image sensor includes a second interconnect structure, the second interconnect structure including a second conductive portion having a second width and a second dielectric portion; and a third element disposed between the first image sensor and the second image sensor, the third element having a first side surface an opposing second side surface, the first side surface formed of a redistribution material layer and a third conductive portion having a third width that is different than the first width, the second side surface formed of a fourth conductive portion and a third dielectric portion, wherein the third conductive portion directly interfaces with the first conductive portion and the
redistribution material layer directly interfaces with the first dielectric portion, wherein
the third dielectric portion directly interfaces with second dielectric portion.
Regarding Claim 9, both the instant claim 9 and claims 1-7 of ‘001 recite, the third conductive portion directly interfaces with the first dielectric portion
Regarding Claim 10, both the instant claim 10 and claims 1-7 of ‘001 recite, the third width of the third conductive portion is greater than the first width of the first conductive portion.
Regarding Claim 11, both the instant claim 11 and claims 1-7 of ‘001 recite, the third element further includes a third interconnect structure, and wherein the second image sensor includes a substrate having a photosensitive region therein.
Regarding Claim 12, both the instant claim 12 and claims 1-7 of ‘001 recite, a conductive feature extending through the photosensitive region, the second interconnect structure, and to the third interconnect structure such that the conductive feature electrically couples the second interconnect structure to the third interconnect structure.
Regarding Claim 13, both the instant claim 13 and claims 1-7 of ‘001 recite, the third element further includes a substrate having an active region, and wherein the conductive feature extends through the active region.
Regarding Claim 14, both the instant claim 14 and claims 1-7 of ’001 recite, the active region includes a component selected from the group consisting of a field effect transistor (FET), a complementary metal-oxide semiconductor (CMOS) transistor, a FinFET, a bipolar junction transistor, a resistor, a capacitor, a diode, and a fuse.
Regarding Claim 15, both the instant claim 15and claims 1-7 of ‘001 recite, the first image sensor has a first number of image pixels and the second image sensor has a second number of image pixels that is different than the first number.
Claims 16-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-7 of U.S. Patent No. 15/651,402. Although the claims at issue are not identical, they are not patentably distinct from each other because
Regarding Claim 16, both the instant claim 16 and claims 1-20 ‘402 recite, a device comprising: a first image sensor element having a first photosensitive region and a first surface that includes a first dielectric portion; a second image sensor element having a second photosensitive region and a second surface that includes a second dielectric portion; a processing element disposed between the first image sensor and the second image sensor, the processing element including: a substrate having an active region that includes an active circuit component, the substrate having a third surface that includes a third dielectric portion directly interfacing with the first dielectric portion; a first interconnect structure disposed on the substrate, the first interconnect
structure having a fourth surface that includes a fourth dielectric portion directly interfacing with the second dielectric portion; and a first conductive feature extending from the second photosensitive region through the active region and to the first interconnect structure.
Regarding Claim 17, both the instant claim 17 and claims 1-20 of ‘402 recite, a second conductive feature extending from the first photosensitive region to the first interconnect structure.
Regarding Claim 18, both the instant claim 18 and claims 1-20 of ‘402 recite, first interconnect structure includes a first conductive feature having a first surface facing the first image sensor and an opposing second surface facing the second image sensor, and wherein the first conductive feature directly interfaces with the second surface of the first conductive feature and the second conductive feature directly interfaces with the first surface of the first conductive feature.
Regarding Claim 19, both the instant claim 19 and claims 1-20 of ‘402 recite, the second image sensor further includes a second interconnect structure, and wherein the first conductive feature extends through the second interconnect structure.
Regarding Claim 20, both the instant claim 20 and claims 1-20 of ‘402 recite, first photosensitive region has a first number of image pixels and the second photosensitive region has a second number of image pixels that is different than the first number.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm.
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/FAZLI ERDEM/ Primary Examiner, Art Unit 2812 5/23/2026
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