Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
Applicant’s election with traverse of Group II (claims 10-20) in the reply filed on 6/22/26 is acknowledged. Claims 1-9 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim.
Applicant's traversal of the restriction requirement has been considered but is not persuasive.
Applicant argues that a search of the subject matter of Group II (claims 10–20, directed to a semiconductor device) would encompass a search of the subject matter of Group I (claims 1–9, directed to a method of forming a semiconductor device), and therefore examination of both groups would not impose an undue burden. The Examiner respectfully disagrees.
The claimed inventions require materially different searches because the method claims and device claims are directed to different aspects of the disclosed technology. Group I requires a search directed to fabrication techniques and process sequences, including formation of a recess in a first dielectric layer, conformal formation of a protection layer, trench formation through multiple layers, lateral etching of first and second dielectric layers to enlarge the trench, and subsequent formation of a bottom electrode in the enlarged trench. Dependent claims further require particular etchants, etch selectivity, supporting-layer formation, hard-mask arrangements, and sequential removal of hard-mask layers.
In contrast, Group II is directed to the resulting semiconductor-device structure and requires a search directed principally to structural relationships and geometries, including the relative arrangement of the first dielectric layer, protection layer, second dielectric layer, capacitor contact pad, bottom electrode layer, and, in certain claims, a laterally protruding supporting layer, dimensional relationships between layers, and particular sidewall profiles.
Accordingly, a search sufficient to determine whether the claimed device structure of Group II is anticipated or rendered obvious would not necessarily locate references teaching the particular fabrication sequence required by Group I. A reference may disclose the claimed or substantially similar final capacitor structure without disclosing how that structure was fabricated, or may disclose fabrication by a materially different process. Conversely, references directed to trench formation, selective lateral etching, etch chemistry, etch selectivity, hard-mask removal, and process integration may be highly relevant to Group I even though they do not disclose the completed structural relationships required by Group II.
The present disclosure itself confirms that the resulting structure is not limited to a single fabrication condition. For example, the disclosure states that the concentration and action time of the etchant may be modified to alter the profile of the stacked-capacitor trench, including producing a vertical lower sidewall. Thus, the structural configuration ultimately obtained is not coextensive with one particular process sequence or process condition.
The searches therefore require different search strategies and materially different fields of inquiry. Examination of Group I requires searching process-oriented concepts such as trench patterning and enlargement, lateral wet etching, etch selectivity, dielectric-removal sequences, hard-mask processing, and capacitor-process integration. Examination of Group II requires searching structure-oriented concepts such as stacked-capacitor geometry, protection-layer placement, relative layer widths and thicknesses, electrode/layer relationships, supporting-layer geometry, and sidewall configuration. References pertinent to one inquiry would not necessarily be pertinent to, or retrieved by, the other.
Moreover, the product of Group II is not limited by its claims to a device produced by the process of Group I. The claimed structural arrangement may be produced by another materially different fabrication sequence, including processes that establish the claimed geometry by selective deposition, selective growth, patterning, masking, or other fabrication techniques without employing the particular lateral-etching sequence required by Group I. Thus, a complete search of Group II cannot be treated as inherently encompassing the process limitations of Group I.
Accordingly, examination of both groups would require additional search queries directed to different limitations, different combinations of technical concepts, and different bodies of prior art. This constitutes a serious search and examination burden. Applicant's assertion that a search of Group II would encompass Group I therefore does not overcome the reasons supporting restriction.
The requirement for restriction between Group I, claims 1–9, and Group II, claims 10–20, is maintained. Applicant's election of Group II with traverse is acknowledged, and examination will proceed on the elected Group II claims.
Accordingly, the requirement is still deemed proper and is therefore made FINAL. Applicant timely traversed the restriction (election) requirement in the reply filed on 6/22/26.
Specification
Number of figures submitted does not match the number of figures listed under Brief Description of Drawings in the specification. All of the figures with alphabets should be listed separately. For example, ‘Figs. 1A-1C’ should be ‘Figs. 1A, 1B and 1C’.
In particular, ‘FIGs. 1A-1E’ in the paragraph [0008] is objected.
See MPEP 500 - Receipt and Handling of Mail and Papers, MPEP 507 - Drawing Review in the Office of Patent Application Processing (OPAP). This labeling convention ensures clarity and consistency in referencing figures throughout the patent application and publication. Improper labeling may result in an objection from OPAP and require correction.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 20 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
First, claim 20 recites “the vertical projection area of the capacitor contact pad.” However, there is insufficient antecedent basis for “the vertical projection area” in the claim.
Second, even assuming for purposes of examination that “the vertical projection area” refers to a vertical projection area defined by the capacitor contact pad, it is unclear what structural relationship is intended by the limitation that “the first dielectric layer is not within” that area. The specification does not appear to describe the first dielectric layer, as a whole, as being outside the vertical projection area of the capacitor contact pad. Rather, the specification states that “each protruding portion 120a may be not within the vertical projection area of the capacitor contact pad 116.” Accordingly, it is unclear whether claim 20 is intended to require that the entire first dielectric layer be outside the vertical projection area of the capacitor contact pad, or instead that only a protruding portion of the first dielectric layer be outside the vertical projection area.
For purposes of examination and application of the prior art, the Examiner interprets the limitation as requiring that the first dielectric layer, as presently recited, does not vertically overlap the capacitor contact pad.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 10-14 and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 20140134839).
Regarding claim 10, Kim discloses a semiconductor device comprising:
a capacitor contact pad 180 disposed in an isolation layer comprising interlayer insulating film 150 and etch-stop film 202, wherein etch-stop film 202 is disposed directly on interlayer insulating film 150 (Fig. 7; ¶[0063]);
a first dielectric layer 214 disposed over the isolation layer;
a protection layer 212 covering a top portion of the first dielectric layer 214 (Fig. 7; ¶[0065]);
a second dielectric layer 230 disposed over the protection layer 212 (Fig. 7; ¶¶[0063], [0067]); and
a bottom electrode layer 262 covering the first dielectric layer 214, the protection layer 212, and the second dielectric layer 230 (Fig. 7; ¶[0079]).
Regarding claim 11, Kim further discloses a capping layer 252 disposed over the second dielectric layer 230; and a supporting layer 222 disposed in a bottom portion of the second dielectric layer 230 and extending transversely therethrough (Figs. 6 and 7; ¶¶[0066]-[0067]), wherein supporting layer 222 laterally protrudes from the second dielectric layer 230 into contact hole 250 (Fig. 7; ¶[0077]). Kim further discloses that bottom electrode layer 262 covers a sidewall and a top surface of capping layer 252 (Fig. 7; ¶[0079]).
Regarding claim 12, Kim discloses that the protection layer 212 and the supporting layer 222 are made of a same dielectric material, i.e., oxide. Kim discloses that protection layer 212 includes an undoped oxide (¶[0065]) and that supporting layer 222 may include tantalum oxide (¶[0066]). Thus, both layers are made of an oxide dielectric material. (Note that: the Examiner interprets the limitation “made of a same dielectric material” as encompassing two discrete dielectric layers made of the same class of dielectric material, such as oxide, because claim 12 does not further require the dielectric layers to have an identical chemical composition or to comprise the same particular oxide species).
Regarding claim 13, Kim discloses the semiconductor device as claimed in claim 10, wherein a lower portion of the first dielectric layer 214 has a vertical sidewall (Fig. 7: the lower portion of first dielectric layer 214 has a vertically extending, linear and flat sidewall).
Regarding claim 14, Kim discloses the semiconductor device as claimed in claim 10, wherein a top surface of the capacitor contact pad 180 is lower than a top surface of the isolation layer 150/202 (Fig. 7).
Regarding claim 16, Kim discloses the semiconductor device as claimed in claim 10, wherein the protection layer 212 covers a top portion of the first dielectric layer 214 (Fig. 7; ¶[0065]).
Regarding claim 17, Kim discloses the semiconductor device as claimed in claim 10, wherein a maximum width of the protection layer 212 is greater than a minimum width of the second dielectric layer 230 (Fig. 7: the maximum lateral width of protection layer 212 is greater than the minimum lateral width of second dielectric layer 230).
Regarding claim 18, Kim discloses the semiconductor device as claimed in claim 10, wherein a width of a bottom surface of the first dielectric layer 214 is greater than a width of a top surface of the first dielectric layer 214 (Fig. 7: first dielectric layer 214 has a downwardly widening profile).
Regarding claim 19, Kim discloses the semiconductor device as claimed in claim 10, wherein a sidewall of the protection layer 212 is vertical (Fig. 7: protection layer 212 has a vertically extending, linear and flat sidewall).
Regarding claim 20, Kim discloses the semiconductor device as claimed in claim 10, wherein the first dielectric layer 214 is not within the vertical projection area of the capacitor contact pad 180 (Fig. 7: first dielectric layer 214 and capacitor contact pad 180 do not vertically overlap).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20140134839).
Regarding claim 15, Kim discloses the semiconductor device as claimed in claim 10, including first dielectric layer 214 and second dielectric layer 230 (Fig. 7), but does not expressly disclose that a maximum thickness of the first dielectric layer is equal to a maximum thickness of the second dielectric layer. Kim nevertheless shows first dielectric layer 214 and second dielectric layer 230 as having similar thickness dimensions (Fig. 7).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select the respective thicknesses of first dielectric layer 214 and second dielectric layer 230, including making their maximum thicknesses equal, through routine optimization of the dimensions of the known dielectric layers according to the desired dimensions of the stacked capacitor structure. No criticality or unexpected result associated with the claimed equal maximum thicknesses is disclosed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Changhyun Yi whose telephone number is (571)270-7799. The examiner can normally be reached Monday-Friday: 10A-3P.
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/Changhyun Yi/Primary Examiner, Art Unit 2812
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