Prosecution Insights
Last updated: July 17, 2026
Application No. 18/439,688

DISPLAY DEVICE

Non-Final OA §102§103
Filed
Feb 12, 2024
Priority
Apr 05, 2023 — RE 10-2023-0044952
Examiner
NORRIS, JEREMY C
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
857 granted / 991 resolved
+18.5% vs TC avg
Minimal +4% lift
Without
With
+4.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
15 currently pending
Career history
1008
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
58.5%
+18.5% vs TC avg
§102
37.9%
-2.1% vs TC avg
§112
1.8%
-38.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 991 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 4-6, 8-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2016/0218305 A1 (Kim). Kim discloses, referring primarily to figure 1-3, a display device, comprising: a display panel (200) that includes a plurality of display pads (E1); and a circuit board electrically connected to the display panel, wherein the circuit board includes: a base layer (100); a first circuit wiring (adjacent AL, not specifically referenced) disposed on the base layer and that at least partially extends in a first direction; a first insulating layer (IL2) that covers the first circuit wiring; a second circuit wiring (GE) disposed on the first insulating layer and that at least partially extends in the first direction; a second insulating layer (IL1) that covers the second circuit wiring; and a plurality of circuit pads (SE, DE) disposed on the second insulating layer and electrically connected to the plurality of display pads, wherein a first side of the first circuit wiring overlaps at least a portion of an upper surface of the second circuit wiring, or a second side of the second circuit wiring overlaps at least a portion of an upper surface of the first circuit wiring [claim 1] wherein the first side is not vertically aligned with the corresponding second side (figure 1) [claim 2], wherein an imaginary center line of the first circuit wiring parallel to the first direction does not overlap an imaginary center line of the second circuit wiring parallel to the first direction [claim 4], wherein a width in a second direction that crosses the first direction of the first circuit wiring differs from a width in a second direction of the second circuit wiring [claim 5], wherein the circuit board further comprises a lower insulating layer (IL3) disposed between the base layer and the first insulating layer, and a third circuit wiring (WL) disposed on the lower insulating layer, wherein a third side of the lower insulating layer is not vertically aligned with the first side or the second side (figure 1) [claim 6], wherein one end of each of the first circuit wiring and the second circuit wiring is connected to the circuit pad [claim 8]. Similarly, Kim discloses, a display device, comprising: a display panel (200); and a circuit board electrically connected to the display panel, wherein the circuit board includes: a base layer (100); a first circuit wiring (adjacent AL, not specifically referenced) disposed on the base layer and that extends in a first direction; a first insulating layer (IL2) that covers the first circuit wiring; a second circuit wiring (DE) disposed on the first insulating layer and that extends in the first direction; and a second insulating layer (IL1) that covers the second circuit wiring, wherein an imaginary center line of the first circuit wiring that extends parallel to the first direction does not overlap an imaginary center line of the second circuit wiring that extends parallel to the first direction [claim 20]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of US 2022/0109081 A1 (Asada). Kim discloses the claimed invention as described above and including the first insulating layer and the second insulating layer comprises polyimide (PI) ([0059], [0114]). Kim does not specifically state that each of the first circuit wiring and the second circuit wiring comprises copper [claim 19]. Kim teaches that each of these may comprise the same material ([0086]). It is well known in the art to use copper as the material for such layers in display devices as evidenced by Asada ([0116]). Therefore, it would have been obvious, to one having ordinary skill in the art, use copper as claimed in the invention of Kim. The motivation for doing so would have been to use a known material for reliable electrical transmission. Allowable Subject Matter Claims 3, 7, and 9-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 3 states the limitation “wherein the first side comprises a (1-1)-th side and a (1-2)-th side that faces the (1-1)-th side in a second direction that crosses the first direction, the second side comprises a (2-1)-th side and a (2-2) side that faces the (2-1)-th side in the second direction, the (1-1)-th side and the (2-1)-th side are not vertically aligned, and the (1-2)-th side and the (2-1)-th are not vertically aligned.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Claim 7 states the limitation “wherein the third side overlaps at least a portion of the upper surface of the first circuit wiring or the upper surface of the second circuit wiring.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Claims 9 and 10 state the limitation “wherein the circuit board further comprises a planarization layer disposed between the first insulating layer and the second insulating layer.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Claims 11 and 12 state “the limitation “wherein the first circuit wiring comprises a (1-1)-th circuit wiring and a (1-2)-th circuit wiring spaced apart from the (1-1)-th circuit wiring in a second direction that crosses the first direction, and the second circuit wiring comprises a (2-1)-th circuit wiring and a (2-2)-th circuit wiring spaced apart from the (2-1)-th circuit wiring in the second direction.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Claim 13-17 state the limitation “wherein the circuit board further comprises: a first ground wiring disposed on the base layer and spaced apart from the first circuit wiring; and a second ground wiring disposed on the first insulating layer and spaced apart from the second circuit wiring.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Claim 18 states the limitation “wherein the display panel comprises a first non-bendable region that includes a display region, a second non-bendable region, and a bendable region disposed between the first non-bendable region and the second non-bendable region and that has a predetermined radius of curvature, and the circuit board overlaps the second non-bendable region.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEREMY C NORRIS whose telephone number is (571)272-1932. The examiner can normally be reached 7:15-15:15 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571)272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JEREMY C. NORRIS Examiner Art Unit 2847 /JEREMY C NORRIS/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Feb 12, 2024
Application Filed
Jun 03, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
91%
With Interview (+4.5%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 991 resolved cases by this examiner. Grant probability derived from career allowance rate.

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