Prosecution Insights
Last updated: July 17, 2026
Application No. 18/440,823

DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

Non-Final OA §102§103
Filed
Feb 13, 2024
Priority
Mar 15, 2023 — RE 10-2023-0033679
Examiner
ONUTA, TIBERIU DAN
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
63 granted / 83 resolved
+7.9% vs TC avg
Strong +24% interview lift
Without
With
+24.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
26 currently pending
Career history
120
Total Applications
across all art units

Statute-Specific Performance

§103
92.6%
+52.6% vs TC avg
§102
5.8%
-34.2% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 83 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office action responds to Applicant’s election filed on 05/27/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Amendment Status The Applicant’s response on 05/27/2026 in reply to the restriction mailed on 03/27/2026 has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-23. Election/Restriction The Applicant’s response on 05/27/2026 in reply to the restriction/election requirements mailed on 03/27/2026 has been entered. Applicant’s election of Invention I/Group I (claims 1-17, drawn to a display device) is acknowledged. Group I’s election was made without traverse in the reply filed on 05/27/2026. Claims 18-23 are withdrawn by corresponding to a non-elected invention. Applicant’s election without traverse of Species A1 corresponding to fig. 4, and Modification A1 corresponding to fig. 4, is acknowledged. Applicant considers that claims 1-5, 7-11, and 14-17 correspond to Species A1 and Modification A1. Examiner agrees. Claims 6, and 12-13 are withdrawn by corresponding to non-elected species. Claims 18-23 are withdrawn by corresponding to non-elected invention. Claims 6, and 12-13 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 05/27/2026. Information Disclosure Statement (IDS) Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. The IDS has been considered. Specification Objection The specification has been checked to the extend necessary to determine the presence of possible minor errors. However, the Applicant’s cooperation is requested in correcting any errors of which Applicant may become aware in the specification. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (US 2017/0104035). Regarding claim 1, Lee shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) all aspects of a display device 1000, comprising: A semiconductor circuit substrate TL having a display area and a non-display area and comprising a plurality of pixel circuit units PC1, PC2, and PC3 A plurality of light emitting element layers IL1/SED1, IL2/SED2, and IL3/SED3 comprising two or more layers stacked on the display area of the semiconductor circuit substrate TL wherein: The plurality of light emitting elements SED1, SED2, and SED3 at a same layer of the plurality of light emitting element layers IL1/SED1, IL2/SED2, and IL3/SED3 is configured to emit a same color light Red, Green, or Blue The light emitting elements SED1, SED2, and SED3 at different layers of the plurality of light emitting element layers IL1/SED1, IL2/SED2, and IL3/SED3 are configured to emit different color lights Red, Green, or Blue The plurality of light emitting elements SED1, SED2, and SED3 at the same layer of the plurality of light emitting element layers IL1/SED1, IL2/SED2, and IL3/SED3 is connected to a same common electrode UE1, UE2, or UE3 The light emitting elements SED1, SED2, and SED3 at the different layers of the plurality of light emitting element layers IL1/SED1, IL2/SED2, and IL3/SED3 is connected to different common electrodes UE1, UE2, or UE3 Regarding claim 14, Lee shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) that the common electrodes UE1, UE2, or UE3 at the different layers IL1/SED1, IL2/SED2, and IL3/SED3 are connected to each other, are separated from each other, or are partially connected to each other in the non-display area. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 2-5, 7-10, and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Ogawa (US 11538959). Regarding claim 2, Lee shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) most aspects of the display device 1000, comprising: Contact electrodes LE1, LE2, and LE3 on one surfaces of the light emitting elements SED1, SED2, and SED3 However, Lee fails (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) to show that the contact electrodes LE1, LE2, and LE3 are connected to the pixel electrodes. Ogawa, in a similar device to Lee, shows (see, e.g., Ogawa: figs. 4-5) as the contact electrodes 112/52 are connected to the pixel electrodes 50f/50e (see, e.g., Ogawa: col.9/II.52-59). Ogawa also shows that the pixel electrodes 50f/50e couples the contact electrodes 112/52 of the light emitting element 100 with the driving transistor Tr(DTR). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the pixel electrode of Ogawa in the device of Lee in order to couples the contact electrodes of the light emitting element with the driving transistor. Regarding claim 3, Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B, and see, e.g., Ogawa: figs. 4-5): Each of the plurality of light emitting element layers IL1/SED1, IL2/SED2, and IL3/SED3 (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) comprises the pixel electrode 50f/50e (see, e.g., Ogawa: figs. 4-5) The plurality of light emitting elements SED1, SED2, and SED3 (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) on the pixel electrode 50f/50e (see, e.g., Ogawa: figs. 4-5) A contact electrode LE1, LE2, and LE3 on one surface of each of the plurality of light emitting elements SED1, SED2, and SED3 A first insulating layer IL1 covering side surfaces of the plurality of light emitting elements SED1, SED2, and SED3 between the plurality of light emitting elements SED1, SED2, and SED3 A common electrode 90e on upper surfaces of the light emitting elements 100 and an upper surface of the first insulating layer 80 (see, e.g., Ogawa: figs. 4-5) Regarding claim 4, Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) that the common electrode UE1, UE2, or UE3 is on the upper surfaces of the plurality of light emitting elements SED1, SED2, or SED3 of the same layer IL1/SED1, IL2/SED2, or IL3/SED3. Regarding claim 5, Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) shows that a second insulating layer IL2 between the plurality of the light emitting element layers IL1/SED1, IL2/SED2, or IL3/SED3. Regarding claim 7, Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B, and see, e.g., Ogawa: figs. 4-5) shows the pixel electrodes 50f/50e are electrically connected to corresponding pixel circuit units PC1, PC2, and PC3 through contact holes CNT1, CNT2, and CNT4 in the first insulating layer BI and the second insulating layer IL2 located below the pixel electrodes. Regarding claim 8, Lee in view of Ogawa shows (see, e.g., Ogawa: figs. 4-5) that: Protective electrodes 43d are on the contact holes in the insulating layers 42 located below the pixel electrodes 50f/50e The pixel electrodes 50f/50e cover the protective electrodes 43d Regarding claim 9, Lee in view of Ogawa shows (see, e.g., Ogawa: figs. 4-5) that the protective electrode 43d (see, e.g., Ogawa: col.9/II.1-3) has an etching selectivity different from that of the pixel electrode 50f/50e and comprises a conductive material (see, e.g., Ogawa: col.9/II.52-57). Regarding claim 10, Lee in view of Ogawa shows (see, e.g., Ogawa: figs. 4-5) that the contact electrode 112/52 is on the pixel electrode 50f/50e. Regarding claim 15, Lee shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) most aspects of a display device 1000, comprising: A semiconductor circuit substrate TL comprising a plurality of pixel circuit units PC1, PC2, and PC3 A first insulating layer IL1 on a display area of the semiconductor circuit substrate TL A first light emitting element layer IL1/SED1 However, Lee fails (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B) to show that the first light emitting element layer IL1/SED1 comprises a first pixel electrode. Ogawa, in a similar device to Lee, shows (see, e.g., Ogawa: figs. 4-5) that first light emitting element layer 66/80 comprises the pixel electrode 50f/50e (see, e.g., Ogawa: col.9/II.52-59). Ogawa also shows that the pixel electrodes 50f/50e couples the contact electrodes 112/52 of the light emitting element 100 with the driving transistor Tr(DTR). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the pixel electrode of Ogawa in the device of Lee in order to couples the contact electrodes of the light emitting element with the driving transistor. Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B, and see, e.g., Ogawa: figs. 4-5) that: A first light emitting element SED1 configured to emit first light RED A first common electrode UE1 that are sequentially arranged on the first insulating layer IL1 A second insulating layer IL2 on the first light emitting element layer IL1/SED1 A second light emitting element layer IL2/SED2 comprising a second pixel electrode 50f/50e A second light emitting element SED1 configured to emit second light GREEN A second common electrode UE2 that are sequentially arranged on the second insulating layer IL2 Regarding claim 16, Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B, and see, e.g., Ogawa: figs. 4-5) that: A third insulating layer IL3 on the second light emitting element layer IL2/SED2 A third light emitting element layer IL3/SED3 comprising a third pixel electrode 50f/50e A third light emitting element SED3 configured to emit third light BLUE A third common electrode UE3 that are sequentially arranged on the third insulating layer IL3 A fourth insulating layer 92 on the third light emitting element layer 100 (see, e.g., Ogawa: figs. 4-5) Regarding claim 17, Lee in view of Ogawa shows (see, e.g., Lee: figs. 1, 2A-2C, 3A-3B, and see, e.g., Ogawa: figs. 4-5) that: The first insulating layer IL3 includes contact holes CNT1, CNT2, and CNT4 overlapping the first pixel electrode 50f/50e, the second pixel electrode 50f/50e, and the third pixel electrode 50f/50e and penetrating through the first insulating layer IL1 wherein: The second insulating layer IL2 includes contact holes CNT2, and CNT4 overlapping the second pixel electrode 50f/50e and the third pixel electrode 50f/50e and penetrating through the second insulating layer IL2 wherein: The third insulating layer IL3 includes a contact hole overlapping the third pixel electrode 50f/50e and penetrating through the third insulating layer IL3 wherein: The display device 1000 further comprises first protective electrodes 43d on the first insulating layer 42 and covering the contact holes penetrating through the first insulating layer 42 (see, e.g., Ogawa: figs. 4-5) Second protective electrodes 43d on the second insulating layer 42 and covering the contact holes penetrating through the second insulating layer 42 (see, e.g., Ogawa: figs. 4-5) A third protective electrode 43d on the third insulating layer 42 and covering the contact hole penetrating through the third insulating layer 42 (see, e.g., Ogawa: figs. 4-5) Allowable Subject Matter Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for objecting to claim 11: The prior art of record neither anticipates nor renders obvious light emitting elements that are randomly arranged on a pixel electrode. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA whose telephone number is (571) 270-0074 and between the hours of 9:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone or email are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000. /TIBERIU DAN ONUTA/Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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Prosecution Timeline

Feb 13, 2024
Application Filed
Jun 22, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+24.4%)
3y 4m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 83 resolved cases by this examiner. Grant probability derived from career allowance rate.

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