Prosecution Insights
Last updated: April 19, 2026
Application No. 18/446,707

PIXEL SENSOR INCLUDING A LAYER STACK TO REDUCE AND/OR BLOCK THE EFFECTS OF PLASMA PROCESSING AND ETCHING ON THE PIXEL SENSOR

Non-Final OA §103
Filed
Aug 09, 2023
Examiner
GARCES, NELSON Y
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
5 (Non-Final)
80%
Grant Probability
Favorable
5-6
OA Rounds
2y 6m
To Grant
83%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
459 granted / 572 resolved
+12.2% vs TC avg
Minimal +3% lift
Without
With
+2.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
41 currently pending
Career history
613
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
48.7%
+8.7% vs TC avg
§102
32.8%
-7.2% vs TC avg
§112
14.2%
-25.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 572 resolved cases

Office Action

§103
DETAILED ACTION This action is responsive to the application No. 18/446,707 filed on August 09, 2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/03/2026 with the associated claims filed on 01/02/2026 responding to the Office action mailed on 11/03/2025 has been entered. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1, 3-6, 8-10, 12, 14-22, and newly added claims 23-24. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5, 6, 21, 23, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Mori (US 2013/0134536) in view of Chien (US 2015/0155320) and further in view of Wu (US 2015/0115382). Regarding Claim 1, Mori (see, e.g., Fig. 8), teaches a pixel sensor 200, comprising: a photodiode 111 in a substrate 101 of the pixel sensor 200 (see, e.g., pars. 0077, 0124); an oxide-nitride-oxide layer stack 115/116/117, configured to protect the photodiode 111 from radiation damage (see, e.g., pars. 0085-0088); a grid structure 221/227, over the oxide-nitride-oxide layer stack 115/116/117, including a plurality of interconnected columns surrounding an opening (i.e., opening for accommodating color filters 122a/122b/122c, see, e.g., Fig. 9(c)), extending through an entirety of the grid structure 221/227, and the photodiode 111 (see, e.g., pars. 0126, 0146); a color filter region 122 in the opening and directly on a surface of the oxide-nitride-oxide layer stack 115/116/117 (see, e.g., par. 0084); and wherein the plurality of interconnected columns includes a tungsten layer 227 and a silicon oxide layer 221 (see, e.g., pars. 0133, 0136) Mori does not teach a high constant (high-k) dielectric layer directly on the photodiode, and a passivation liner directly on a sidewall of each of the plurality of interconnected columns, wherein the passivation liner is between the plurality of interconnected columns and the color filter region. Chien (see, e.g., Fig. 4E) and Wu (see, e.g., Fig. 19), in similar image sensors to Mori, on the other hand, teach a high constant (high-k) dielectric layer 302 directly on the photodiode 106, used to reduce optical reflection from the surface of the semiconductor substrate 300 to ensure that most of an incident light enters the photodetector and is sensed (see, e.g., Chien, par. 0026) and a passivation liner 138 directly on a sidewall of each of the plurality of interconnected columns 112/132, wherein the passivation liner 138 is between the plurality of interconnected columns 112/132 and the color filter region 118 and is capable of reflecting light (see, e.g., Wu, par. 0042). It would have been obvious to one of ordinary skill in the art at the time of filing to include in Mori’s device, a high constant (high-k) dielectric layer directly on the photodiode, such that the oxide-nitride-oxide layer stack is directly on the high-k dielectric layer, and a passivation liner capable of reflecting light, directly on a sidewall of each of the plurality of interconnected columns, wherein the passivation liner is between the plurality of interconnected columns and the color filter region, as taught by Chien and Wu, to reduce optical reflection from the surface of the semiconductor substrate to ensure that most of an incident light enters the photodetector and is sensed and to form a reflective guide capable of reflecting light. The recitation calling for the “oxide-nitride-oxide layer stack being configured to protect the photodiode from radiation damage”, does not distinguish over the cited reference regardless of the function allegedly performed by the claimed device, because only the device per se is relevant, no matter which of the device’s functions is referred to in the claim, and if the prior art structure is capable of performing the intended function, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967). In the instant application, the claimed layer stack does not differentiate the claimed device from Mori’s device, since Mori, teaches all of the claimed structural features as required by claim 1 and functional features as required by a standard oxide-nitride-oxide layer stack in an image sensor over a photodiode, which would inherently function, or has the property or characteristic related to the protection of the photodiode from radiation damage. Since the examiner has met or exceeded his burden of producing evidence with the basis in fact above, the burden has shifted to the Applicants to show otherwise. Regarding Claim 5, Mori, Chien, and Wu teach all aspects of claim 1. Mori (see, e.g., Fig. 8), teaches that the oxide-nitride-oxide layer stack 115/116/117 comprises: a first silicon oxide layer 115 (see, e.g., par. 0085); a silicon nitride layer 116 on the first silicon oxide layer 115 (see, e.g., par. 0085); and a second silicon oxide layer 117 on the silicon nitride layer 116 (see, e.g., par. 0088). Regarding Claim 6, Mori, Chien, and Wu teach all aspects of claim 5. Mori (see, e.g., Fig. 8), teaches that: the silicon nitride layer 116 is configured to absorb ultraviolet radiation having a wavelength equal to or less than approximately 250 nanometers; and wherein the first silicon oxide layer 115 is configured to prevent migration of electron-hole pairs, resulting from absorption of the ultraviolet radiation, toward the photodiode 111. See also the comments stated above in claim 1 regarding functional language which are considered repeated here. Regarding Claim 21, Mori, Chien, and Wu teach all aspects of claim 1. Chien (see, e.g., Fig. 4E), teaches that the high-k dielectric layer 302 resides above the substrate 300 (see, e.g., par. 0088). Regarding Claim 23, Mori, Chien, and Wu teach all aspects of claim 1. Mori (see, e.g., Fig. 8), teaches that in a cross section of the pixel sensor 200, the color filter region 122 resides above the photodiode 111. Regarding Claim 24, Mori, Chien, and Wu teach all aspects of claim 1. Wu (see, e.g., Fig. 19), teaches that in a cross section of the pixel sensor, an outer boundary of the color filter region 118 is within an outer boundary of the photodiode 100. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over by Mori (US 2013/0134536) in view Chien of (US 2015/0155320), Wu (US 2015/0115382), and further in view of Jeon (US 2021/0126028). Regarding Claim 4, Mori, Chien, and Wu teach all aspects of claim 1. Mori (see, e.g., Fig. 8), teaches that: the silicon oxide layer 221 is on the oxide-nitride-oxide layer stack 115/116/117 (see, e.g., par. 0140). Mori does not teach that the plurality of interconnected columns further comprise a silicon oxynitride layer on the silicon oxide layer. Jeon (see, e.g., Figs. 4-5), on the other hand, teaches a silicon oxynitride layer 174 on the silicon oxide layer 173 (see, e.g., par. 0067). Embodiments of the present disclosure provide an image sensor with improved performance, in which a silicon oxynitride layer 174, an oxide layer 173, a low refractive index layer 172, a TiN layer 171_2 are used to form a fence structure having a sidewall laterally adjacent to a color filter (see, e.g., pars. 0003-0005). It would have been obvious to one of ordinary skill in the art at the time of filing, to include in Mori’s, et. al., device, a silicon oxynitride layer on the silicon oxide layer, as taught by Jeon, to form a reflective fence capable of reflecting light and improving sensor performance. Claims 8-10, 12, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Mori (US 2013/0134536) in view of Chien (US 2015/0155320). Regarding Claim 8, Mori (see, e.g., Fig. 8), teaches a pixel sensor 200, comprising: a photodiode 111 in a substrate 101 of the pixel sensor 200 (see, e.g., pars. 0077, 0124); a layer stack 115/116/117 (see, e.g., pars. 0085-0088), comprising: a first layer 115 comprising a first oxide material (see, e.g., par. 0085), a second layer 116, directly on the first layer 115, comprising a silicon nitride layer (see, e.g., par. 0085), wherein a band gap of the second layer 116 (i.e., Eg (Si3N4) ≈ 4.55-5.30 eV) is less than approximately 8.8 electron-volts, and a third layer 117, directly on the second layer 116, comprising a second oxide material (see, e.g., par. 0088); and a grid structure 221/227, over the layer stack 115/116/117, including a plurality of interconnected columns surrounding an opening (i.e., opening for accommodating color filters 122a/122b/122c, see, e.g., Fig. 9(c)), extending through an entirety of the grid structure 221/227, and the photodiode 111 (see, e.g., pars. 0126, 0146), wherein, in a cross section of the pixel sensor 200, side surfaces (i.e., inclined side surfaces of layer 221 of interconnected columns of two-dimensional array of pixel sensors) of the plurality of interconnected columns lie on a common plane. Mori does not teach a high constant (high-k) dielectric layer directly on the photodiode. Chien (see, e.g., Fig. 4E), in similar image sensors to Mori, on the other hand, teaches a high constant (high-k) dielectric layer 302 directly on the photodiode 106, used to reduce optical reflection from the surface of the semiconductor substrate 300 to ensure that most of an incident light enters the photodetector and is sensed (see, e.g., par. 0026). It would have been obvious to one of ordinary skill in the art at the time of filing to include in Mori’s device, a high constant (high-k) dielectric layer directly on the photodiode, such the oxide-nitride-oxide layer attack is directly on the high-k dielectric layer, as taught by Chien, to reduce optical reflection from the surface of the semiconductor substrate to ensure that most of an incident light enters the photodetector and is sensed. Regarding Claim 9, Mori and Chien teach all aspects of claim 8. Mori (see, e.g., Fig. 8), teaches that a band gap of the first layer 115 is greater than the band gap of the second layer 116 (i.e., Eg (SiO2) ≈ 8.5-9.7 eV > Eg (Si3N4) ≈ 4.55-5.30 eV). Regarding Claim 10, Mori and Chien teach all aspects of claim 8. Mori (see, e.g., Fig. 8), teaches that: the second layer 116 is configured to absorb ultraviolet radiation having a wavelength equal to or less than approximately 250 nanometers; absorption of the ultraviolet radiation having the wavelength equal to or less than approximately 250 nanometers results in formation of electron-hole pairs in the second layer 116; and the first layer 115 is configured to block migration of the electron-hole pairs from the second layer 116 to the photodiode 111. See also the comments stated above in claim 1 regarding functional language which are considered repeated here. The recitation calling for the “second layer being configured to absorb ultraviolet radiation” and “the first layer being configured to block migration of the electron-hole pairs”, does not distinguish over the cited reference regardless of the function allegedly performed by the claimed device, because only the device per se is relevant, no matter which of the device’s functions is referred to in the claim, and if the prior art structure is capable of performing the intended function, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967). In the instant application, the claimed layer stack does not differentiate the claimed device from Mori’s device, since Mori, teaches all of the claimed structural features as required by claim 10 and functional features as required by a standard oxide-nitride-oxide layer stack in an image sensor over a photodiode, which would inherently function, or has the property or characteristic related to being configured to absorb ultraviolet radiation and block migration of electron-hole pairs. Since the examiner has met or exceeded his burden of producing evidence with the basis in fact above, the burden has shifted to the Applicants to show otherwise. Regarding Claim 12, Mori and Chien teach all aspects of claim 8. Mori is silent with respect to the claim limitation that a thickness of the first layer is in a range of approximately 300 angstroms to approximately 1000 angstroms However, this claim limitation is merely considered a change in the thickness of layer 115 in Mori’s device. The specific claimed thickness, absent any criticality, is only considered to be an obvious modification of the thickness of layer 115 in Mori’s device, as the courts have held that changes in thickness without any criticality, are within the level of skill in the art. According to the courts, a particular thickness is nothing more than one among numerous thicknesses that a person having ordinary skill in the art will find obvious to provide using routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see next paragraph below) of the claimed thickness, it would have been obvious to one of ordinary skill in the art at the time of filing to have the claimed thickness in Mori’s device CRITICALITY The specification contains no disclosure of either the critical nature of the claimed thickness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen thickness or upon another variable recited in a claim, the applicant must show that the chosen thickness is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Regarding Claim 14, Mori and Chien teach all aspects of claim 8. Mori (see, e.g., Fig. 8), teaches that the second layer 116 comprises at least one of: a silicon nitride, an aluminum oxide, a lanthanum oxide, a titanium oxide, a zirconium oxide, a hafnium silicon oxide, a yttrium oxide, a barium oxide, a strontium oxide, a hafnium oxide, or a tantalum oxide (see, e.g., pars. 0085, 0087). Claims 1, 15, 17-20, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Mori (US 2013/0134536) in view of Chien (US 2015/0155320) and further in view of Wu (US 2020/0058684). Regarding Claim 1, Mori (see, e.g., Fig. 8), teaches a pixel sensor 200, comprising: a photodiode 111 in a substrate 101 of the pixel sensor 200 (see, e.g., pars. 0077, 0124); an oxide-nitride-oxide layer stack 115/116/117, configured to protect the photodiode 111 from radiation damage (see, e.g., pars. 0085-0088); a grid structure 221/227, over the oxide-nitride-oxide layer stack 115/116/117, including a plurality of interconnected columns surrounding an opening (i.e., opening for accommodating color filters 122a/122b/122c, see, e.g., Fig. 9(c)), extending through an entirety of the grid structure 221/227, and the photodiode 111 (see, e.g., pars. 0126, 0146); a color filter region 122 in the opening and directly on a surface of the oxide-nitride-oxide layer stack 115/116/117 (see, e.g., par. 0084); and wherein the plurality of interconnected columns includes a tungsten layer 227 and a silicon oxide layer 221 (see, e.g., pars. 0133, 0136) Mori does not teach a high constant (high-k) dielectric layer directly on the photodiode, and a passivation liner directly on a sidewall of each of the plurality of interconnected columns, wherein the passivation liner is between the plurality of interconnected columns and the color filter region. Chien (see, e.g., Fig. 4E) and Wu (see, e.g., Fig. 289), in similar image sensors to Mori, on the other hand, teach a high constant (high-k) dielectric layer 302 directly on the photodiode 106, used to reduce optical reflection from the surface of the semiconductor substrate 300 to ensure that most of an incident light enters the photodetector and is sensed (see, e.g., Chien, par. 0026) and a passivation liner 314c directly on a sidewall of each of the plurality of interconnected columns 302, wherein the passivation liner 314c is between the plurality of interconnected columns 302 and the color filter region 120 and covers the interconnected columns and lines the color filter openings (see, e.g., Wu, par. 0099). It would have been obvious to one of ordinary skill in the art at the time of filing to include in Mori’s device, a high constant (high-k) dielectric layer directly on the photodiode, such that the oxide-nitride-oxide layer stack is directly on the high-k dielectric layer, and a passivation liner covering the interconnected columns and lining the color filter openings, directly on a sidewall of each of the plurality of interconnected columns, wherein the passivation liner is between the plurality of interconnected columns and the color filter region, as taught by Chien and Wu, to reduce optical reflection from the surface of the semiconductor substrate to ensure that most of an incident light enters the photodetector and is sensed and to form a reflective surface capable of reflecting light. The recitation calling for the “oxide-nitride-oxide layer stack being configured to protect the photodiode from radiation damage”, does not distinguish over the cited reference regardless of the function allegedly performed by the claimed device, because only the device per se is relevant, no matter which of the device’s functions is referred to in the claim, and if the prior art structure is capable of performing the intended function, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967). In the instant application, the claimed layer stack does not differentiate the claimed device from Mori’s device, since Mori, teaches all of the claimed structural features as required by claim 1 and functional features as required by a standard oxide-nitride-oxide layer stack in an image sensor over a photodiode, which would inherently function, or has the property or characteristic related to the protection of the photodiode from radiation damage. Since the examiner has met or exceeded his burden of producing evidence with the basis in fact above, the burden has shifted to the Applicants to show otherwise. Regarding Claim 15, Mori (see, e.g., Fig. 8), teaches a pixel array, comprising: a plurality of photodiodes 111 in a substrate 101 of the pixel array (see, e.g., pars. 0077, 0124), wherein each of the plurality of photodiodes 111 is associated with a respective pixel sensor included in the pixel array (see, e.g., par. 0077); a first silicon oxide layer 115 (see, e.g., par. 0085); a silicon nitride layer 116 directly on the first silicon oxide layer 115, wherein a band gap of the silicon nitride layer 116 is lower than a band gap of the first silicon oxide layer 115 (i.e., Eg (Si3N4) ≈ 4.55-5.30 eV < Eg (SiO2) ≈ 8.5-9.7 eV) (see, e.g., par. 0085); a second silicon oxide layer 117 on the silicon nitride layer 116 (see, e.g., par. 0088); a grid structure 221/227, over the second silicon oxide layer 117, comprising a plurality of interconnected columns, each including a plurality of layers 221/227, surrounding an opening (i.e., opening for accommodating color filters 122a/122b/122c, see, e.g., Fig. 9(c)), extending through an entirety of the plurality of layers 221/227, and the photodiode 111 (see, e.g., par. 0126); and a plurality of color filter regions 1221/122b/122c in the openings and directly on a surface of the second silicon oxide layer 117 (see, e.g., par. 0084). Mori does not teach a high constant (high-k) dielectric layer over the plurality of photodiodes, wherein, in a cross section of the pixel array, each of the plurality of interconnected columns is a distance away from the plurality of color filter regions. Chien (see, e.g., Fig. 4E) and Wu (see, e.g., Fig. 28), in similar image sensors to Mori, on the other hand, teach a high constant (high-k) dielectric layer 302 over the plurality of photodiodes 106, used to reduce optical reflection from the surface of the semiconductor substrate 300 to ensure that most of an incident light enters the photodetector and is sensed (see, e.g., Chien, par. 0026), and Wu, teaches that in a cross section of the pixel array, each of the plurality of interconnected columns 302 is a distance away from the plurality of color filter regions 120, due a passivation liner 314c that is directly on sidewalls of each of the plurality of interconnected columns 302 and separates the color filter regions 120 (see, e.g., Wu, par. 0099). It would have been obvious to one of ordinary skill in the art at the time of filing to include in Mori’s device, a high constant (high-k) dielectric layer over the plurality of photodiodes, such the first layer is over the high-k dielectric layer, as taught by Chien, to reduce optical reflection from the surface of the semiconductor substrate to ensure that most of an incident light enters the photodetector and is sensed. It would have been obvious to one of ordinary skill in the art at the time of filing to include in Mori’s device, a high constant (high-k) dielectric layer over the plurality of photodiodes, such that the oxide-nitride-oxide layer stack is on the high-k dielectric layer, and a passivation liner such that in a cross section of the pixel array, each of the plurality of interconnected columns is a distance away from the plurality of color filter regions, as taught by Chien and Wu, to reduce optical reflection from the surface of the semiconductor substrate to ensure that most of an incident light enters the photodetector and is sensed and to form a reflective surface capable of reflecting light. Regarding Claim 17, Mori, Chien, and Wu teach all aspects of claim 15. Wu (see, e.g., Fig. 28), teaches a passivation liner 314c between a sidewall of the grid structure 302 and a color filter region 120 of the plurality of color filter regions 120 (see, e.g., par. 0099). Regarding Claim 18, Mori, Chien, and Wu teach all aspects of claim 15. Mori (see, e.g., Fig. 8), teaches a micro-lens layer 124 above the plurality of color filter regions 122a/122b/122c (see, e.g., par. 0099). Regarding Claim 19, Mori, Chien, and Wu teach all aspects of claim 15. Mori (see, e.g., Fig. 8), teaches that the plurality of layers 221/227 includes a tungsten layer 227 (see, e.g., par. 0136). Regarding Claim 20, Mori, Chien, and Wu teach all aspects of claim 15. Mori (see, e.g., Fig. 8), teaches that a band gap of the second silicon oxide layer 117 is greater than the band gap of the silicon nitride layer 116 (i.e., Eg (SiO2) ≈ 8.5-9.7 eV > Eg (Si3N4) ≈ 4.55-5.30 eV) (see, e.g., par. 0088). Regarding Claim 22, Mori, Chien, and Wu teach all aspects of claim 15. Chien (see, e.g., Fig. 4E), teaches that the high-k dielectric layer 302 resides above the substrate 300 (see, e.g., par. 0088). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over by Mori (US 2013/0134536) in view Chien of (US 2015/0155320), Wu (US 2020/0058684), and further in view of Jeon (US 2021/0126028). Regarding Claim 3, Mori, Chien, and Wu teach all aspects of claim 1. Wu (see, e.g., Fig. 28), teaches that the plurality of interconnected columns 302 further comprises: a titanium nitride layer 312 directly on the layer stack 318/320/314a (see, e.g., pars. 0045, 0094); wherein: the tungsten layer 312 is directly on the titanium nitride layer 312 (see, e.g., par. 0045), and the silicon oxide layer 314b is directly on the tungsten layer 312 (see, e.g., par. 0045); and a silicon nitride layer 316 directly on the silicon oxide layer 314b (see, e.g., par. 0045). Further, Mori teaches that the layer stack 115/116/117 equivalent to Wu’s layer stack 116 is an oxide-nitride-oxide layer stack (see, e.g., Mori, par. 0084). Wu do not teach layer 316 is an oxynitride layer. Wu discloses the claimed invention except for the use of silicon nitride instead of silicon oxynitride. Jeon (see, e.g., Figs. 4-5, par. 0082), on the other hand teaches that silicon oxynitride and silicon nitride are equivalent materials known in the art. Therefore, because these mask materials were art-recognized equivalents at the time of the invention, one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, one of ordinary skill in the art would have found it obvious to substitute silicon oxynitride for silicon nitride since the substitution would yield predictable results. See Supreme Court decision in KSR International Co. v. Teleflex Inc., 550 U.S. _, 82 YSPQ2d 1385 (2007). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Mori (US 2013/0134536) in view of Chien (US 2015/0155320), Wu (US 2020/0058684), and further in view of Su (US 2018/0286907). Regarding Claim 16, Mori, Chien, and Wu teach all aspects of claim 15. Mori does not show that the opening extends into a portion of the second silicon oxide layer 117. Su (see, e.g., Fig. 3B), on the other hand, teaches that the opening extends into a portion of the layer 108, so that the color filter elements are closer to the photodiodes, thus, shortening the light path, which in turn increases the quantum yield and light sensitivity of the image sensor structure (see, e.g., par. 0060). It would have been obvious to one of ordinary skill in the art at the time of filing to include in Mori’s/Chien’s/Wu’s device, the opening extending into a portion of the second silicon oxide layer, as taught by Su, so that the color filter elements are closer to the photodiodes, thus, shortening the light path, which in turn increases the quantum yield and light sensitivity of the image sensor structure. Response to Arguments Applicant’s arguments filed on 01/02/2026 with respect to the rejection of claims 1 and 8 have been fully considered but are not persuasive. Applicant’s arguments filed on 01/02/2026 with respect to the rejection of claim 15 have been fully considered but are moot in view of the new grounds of rejection. The Applicants argue: Mori does not disclose separate structures corresponding to the claimed layers. The examiner responds: Claim 1 recites a passivation liner directly on a sidewall of each of the plurality of columns, wherein the passivation liner is between the plurality of interconnected columns and the color filter region. The passivation liner 138 of Wu meets the required claim language. Placing the passivation liner 138 of Wu in Mori’s interconnected columns comprising layers 221/227, will render layer 138 of Wu in direct contact with layer 221 of Mori, which is part of the interconnected columns. The claim language does not require that the passivation layer be in direct contact with each of the layers comprising the interconnected columns. The Applicants argue: The side surfaces of region 221 and portion 227 necessarily occupy different planes in cross section. The examiner responds: The side surfaces of layer 221 all lie in a common plane along a direction into the page of Fig. 8 of Mori. The claim language does not require that each of the layers of a given column be in a common plane. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Garces whose telephone number is (571)272-8249. The examiner can normally be reached on M-F 9:00 AM - 5:30 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on (571)272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nelson Garces/Primary Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Aug 09, 2023
Application Filed
Dec 03, 2024
Non-Final Rejection — §103
Jan 21, 2025
Interview Requested
Feb 04, 2025
Examiner Interview Summary
Feb 04, 2025
Applicant Interview (Telephonic)
Mar 03, 2025
Response Filed
Mar 24, 2025
Final Rejection — §103
Apr 22, 2025
Interview Requested
May 30, 2025
Response after Non-Final Action
Jun 27, 2025
Request for Continued Examination
Jun 30, 2025
Response after Non-Final Action
Jul 16, 2025
Non-Final Rejection — §103
Sep 17, 2025
Interview Requested
Sep 25, 2025
Applicant Interview (Telephonic)
Sep 25, 2025
Examiner Interview Summary
Oct 20, 2025
Response Filed
Oct 30, 2025
Final Rejection — §103
Dec 02, 2025
Interview Requested
Jan 02, 2026
Response after Non-Final Action
Feb 03, 2026
Request for Continued Examination
Feb 10, 2026
Response after Non-Final Action
Feb 27, 2026
Non-Final Rejection — §103 (current)

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2y 5m to grant Granted Mar 17, 2026
Patent 12575163
SEMICONDUCTOR DEVICE INCLUDING CONTROL ELECTRODE WITH THREE CONTROL PARTS
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
80%
Grant Probability
83%
With Interview (+2.7%)
2y 6m
Median Time to Grant
High
PTA Risk
Based on 572 resolved cases by this examiner. Grant probability derived from career allow rate.

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