Prosecution Insights
Last updated: April 19, 2026
Application No. 18/451,263

SEMICONDUCTOR STRUCTURE

Non-Final OA §102§103
Filed
Aug 17, 2023
Examiner
ZARNEKE, DAVID A
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
82%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allow Rate
566 granted / 801 resolved
+2.7% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
34 currently pending
Career history
835
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
59.3%
+19.3% vs TC avg
§102
24.5%
-15.5% vs TC avg
§112
7.2%
-32.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 801 resolved cases

Office Action

§102 §103
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of Group I and species 1a, corresponding to claims 1-3, and 5-9, in the reply filed on 1/23/26 is acknowledged. Note Group II is rejoined with Group I, therefore the examined claim set includes both Groups I and II and contains claims 1-3, 5-9, and 11-13. Rejection over Liu et al., US 2023/03070355 Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 102(a)(2) as being clearly anticipated by Liu et al., US 2023/03070355. Regarding claim 1, Liu (figure 2) teaches a semiconductor structure, comprising: a circuit 210; a redistribution layer (RDL) 204 formed over the circuit 210, wherein RDL 204 comprises a plurality of metal layers 243/244/245/246; an inductor formed in a topmost metal layer 245, wherein the circuit is directly under the inductor (paragraph 0037); an under bump metallization (UBM) layer 251 formed on the topmost metal layer 246; and a conductive connector 130 formed on the UBM layer 251. With respect to claim 3, Liu (figure 2) teaches the UBM layer 251 is in direct contact with the topmost metal layer 246. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 2, 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al., US 2023/03070355, as applied to claim 1 above. As to claim 2, though Liu fails to teach the RDL includes a copper (Cu) metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Cu in the invention of Liu because Cu is a conventionally known and used RDL metal. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). In re claim 5, though Liu fails to teach the topmost metal layer 246 includes a Cu metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Cu in the invention of Liu because Cu is a conventionally known and used topmost metal. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Concerning claim 6, though Liu fails to teach the topmost metal layer includes an aluminum (Al) metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Al in the invention of Liu because Al is a conventionally known and used topmost metal. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Claim(s) 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al., US 2023/03070355, as applied to claim 1 above, and further in view of Lin et al., US 8,159,070. Pertaining to claim 7, Liu fails to teach the plurality of metal layers includes an ultra-thick metal (Mu) layer that is at least 3 µm thick. Lin (figure 1o) teaches the plurality of metal layers 124 includes an ultra-thick metal (Mu) layer that is at least 3 µm thick (column 10, lines 60-63). It would have been obvious to one of ordinary skill in the art at the time of the invention to use the 3 µm thick metal layers of Lin in the invention of Liu because Lin teaches it is a conventionally known and used thickness. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). In claim 8, Lin (figure 1o) teaches the Mu layer 124 is immediately below the topmost metal layer 136. Regarding claim 9, though Liu fails to teach the topmost metal layer is 3-7 µm thick, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the topmost metal layer thickness through routine experimentation (MPEP 2144.05). Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al., US 2023/03070355, in view of Lin et al., US 8,159,070. With respect to claim 11, Liu (figure 2) teaches a semiconductor structure, comprising: a circuit 210; an metal (Mu) layer 229a/229b; a redistribution layer (RDL) 243/245 formed over the circuit 210, wherein the RDL 243/245 includes a topmost metal layer 246 over the Mu layer 229a/229b; and an inductor (paragraph 0037) formed in the topmost metal layer 245, wherein the circuit 210 is directly under the inductor (paragraph 0037). Liu fails to teach the metal (Mu) layer is an ultra-thick metal layer at least 3 µm thick. Lin (figure 1o) teaches an ultra-thick metal (Mu) layer 124 that is at least 3 µm thick (column 10, lines 60-63). It would have been obvious to one of ordinary skill in the art at the time of the invention to use the 3 µm thick metal layers of Lin in the invention of Liu because Lin teaches it is a conventionally known and used thickness. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). As to claim 12, though Liu fails to teach the topmost metal layer 246 includes a Cu metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Cu in the invention of Liu because Cu is a conventionally known and used topmost metal. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). In re claim 13, though Liu fails to teach the topmost metal layer is 3-7 µm thick, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the topmost metal layer thickness through routine experimentation (MPEP 2144.05). Rejection over Lu et al., US 10,269,701 Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3, 7, 8, 11, and 12 is/are rejected under 35 U.S.C. 102(a)(2) as being clearly anticipated by Lu et al., US 10,269,701. The applied reference has a common assignee and a few common inventors with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. Concerning claim 1, Lu (see marked up figure 20 below) teaches a semiconductor structure, comprising: a circuit 11a; a redistribution layer (RDL) 11b formed over the circuit 11a, wherein RDL 11b comprises a plurality of metal layers 117; an inductor 501/203 (column 7, lines 8-18) formed in a topmost metal layer 501/203, wherein the circuit 11a is directly under the inductor 501; an under bump metallization (UBM) layer 202a/202b formed on the topmost metal layer 501/203; and a conductive connector 1903 formed on the UBM layer 202b. PNG media_image1.png 408 422 media_image1.png Greyscale Pertaining to claim 2, Lu (column 4, lines 22-23) teaches the RDL 11b includes a copper (Cu) metal layer. In claim 3, Lu figure 20) the UBM layer 202a/202b is in direct contact with the topmost metal layer 501/203. As to claim 7, Lu (column 4, lines 55-57) teaches the plurality of metal layers 11b includes an ultra-thick metal (Mu) layer 120a/120b that is at least 3 µm thick. In re claim 8, Lu (marked up figure 20 above) teaches the Mu layer 120a/120b is immediately below the topmost metal layer 501/203. Pertaining to claim 11, Lu marked up figure 20 above) teaches a semiconductor structure, comprising: a circuit 11a; an ultra-thick metal (Mu) layer 120/120b at least 3 µm thick (column 4, lines 55-57); a redistribution layer (RDL) 11b formed over the circuit 11a, wherein the RDL 11b includes a topmost metal layer 501/203 over the Mu layer 120a/120b; and an inductor 501/203 (column 7, lines 8-18) formed in the topmost metal layer 510/203, wherein the circuit 11a is directly under the inductor 501/203 (column 7, lines 8-18). In claim 12, Lu (column 4, lines 55-58) teaches the topmost metal layer 120a/120b includes a copper (Cu) metal layer. Claim(s) 5, 6, 9, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lu et al., US 10,269,701, as applied to claims 1 and 10 above. Regarding claim 5, though Lu fails teaches the topmost metal layer includes a Cu metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Cu in the invention of Lu because Cu is a conventionally known and used metal layer. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). With respect to claim 6, though Lu fails teaches the topmost metal layer includes an aluminum (Al) metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Al in the invention of Lu because Al is a conventionally known and used metal layer. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Concerning claim 9, though Lu fails to teach the topmost metal layer 501/203 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05). Regarding claim 13, though Lu fails to teach the topmost metal layer 501/203 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05). Rejections over Lin et al., US 8,159,070 Claim(s) 1-3, 5-9, 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al., US 8,159,070 in view of https://anysilicon.com/semipedia.under-bump-metallization/ (hereafter referred to as anysilicon). With respect to claim 1, Lin (figure 2f) teaches a semiconductor structure, comprising: a circuit 102; a redistribution layer (RDL) 104/106 formed over the circuit 102, wherein RDL 104/106 comprises a plurality of metal layers 106/124; an inductor 136 (column 18, lines 52-56) formed in a topmost metal layer 136, wherein the circuit 102 is directly under the inductor 136; a topmost metal layer 136; and a conductive connector 138. Lin fails to teach an under bump metallization (UBM) layer formed on the topmost metal layer; and the conductive connector formed on the UBM layer. Anysilicon (Overview of under-bump metallization) teaches under bump metallization (UBM) layer formed on the topmost metal layer (contact pad); and a conductive connector formed on the UBM layer. It would have been obvious to one of ordinary skill in the art at the time of the invention to use the UBM layer of anysilicon in the invention of Lin because anysilicon teaches a UBM layer improves adhesion and solderability, and prevents intermetallic diffusion. As to claim 2, Lin (column 4, lines 3-4) teaches the RDL includes a copper (Cu) metal layer. In re claim 3, anysilicon (Overview of under-bump metallization) teaches the UBM layer is in direct contact with the topmost metal layer (contact pad). Concerning claim 5, Lin (column 19+, lines 7-10) teaches the topmost metal layer 136 includes a Cu metal layer. Pertaining to claim 6, though Lin fails to teach the topmost metal layer 136 includes an aluminum (Al) metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Al in the invention of Lin because Al is a conventionally known and used equivalent material. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950). In claim 7, Lin teaches the plurality of metal layers 106 includes an ultra-thick metal (Mu) layer 124 that is at least 3 µm thick (column 10, lines 60-65). Regarding claim 8, Lin teaches the Mu layer 124 is immediately below the topmost metal layer 136. With respect to claim 9, though Lin fails to teach the topmost metal layer 136 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05). As to claim 11, Lin (figure 2f) teaches a semiconductor structure, comprising: a circuit 102; an ultra-thick metal (Mu) layer 124 at least 3 µm thick (column 10, lines 60-65); a redistribution layer (RDL) 104/106/124 formed over the circuit 102, wherein the RDL 104/106/124/136 includes a topmost metal layer 136 over the Mu layer 124; and an inductor 136 (column 18, lines 52-56) formed in the topmost metal layer 136, wherein the circuit 102 is directly under the inductor 136. In re claim 12, Lin (column 19+, lines 7-10) teaches the topmost metal layer 136 includes a Cu metal layer. Concerning claim 13, though Lin fails to teach the topmost metal layer 136 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art teach various aspects of the invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matt Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID A ZARNEKE/Primary Examiner, Art Unit 2891 3/11/26
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Prosecution Timeline

Aug 17, 2023
Application Filed
Mar 11, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
82%
With Interview (+10.8%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 801 resolved cases by this examiner. Grant probability derived from career allow rate.

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