DETAILED ACTION
Response to Arguments
Applicant’s arguments regarding the Lu et al., US 2023/0307355 rejection, filed 6/12/26, have been fully considered and are persuasive. Therefore the rejection over Lu has been withdrawn.
Applicant's arguments filed 6/12/26, with respect to Lu et al., US 10,269,701 rejection and the Lin et al., US 8,59,070 rejection have been fully considered but they are not persuasive.
As to the Lu rejection, it is argued that the figures do not make it clear that the circuit is directly under the inductor such that the inductor overlaps the circuit when viewed in a direction normal to the substrate. There is no drawing from above that would should this relative positioning.
Note that Lu’s figure 20 (see marked up version below, that was used in the rejection) is a cut away, a vertical slice, of the package that shows the vertical relationship of the components, the relative vertical positions of the components at that location of the package. Any components not shows are not located at that exact vertical position of the package. Imagine taking a knife to the package and cutting straight down through it. With this understanding in mind, Lu (figure 20) shows that at the position of the slice of the package the circuit 11a is directly under the inductor 501/203 (column 7, lines 8/18) such that the inductor 501/203 overlaps the circuit 11a when viewed in a direction normal to the substrate (layer under 11a). While we cannot determine exactly how much overlap exists, Lu’s figure 20 does clearly show the inductor 501/203 at least partially overlaps the circuit 11a because in the cut away shown in figure 20 it is at a minimum directly above the circuit 11a and therefore would have to have some level of overlap.
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In re the Lin rejection, similarly to the Lu rejection, it is argued that the figures do not make it clear that the circuit is directly under the inductor such that the inductor overlaps the circuit when viewed in a direction normal to the substrate. There is no drawing from above that would should this relative positioning.
Also similar the Lu rejection, note that Lin’s figure 2f is a cut away, a slice of the package, shows the relative vertical positions of the components at that location of the package. With this understanding in mind, Lin (figure 2f) clearly shows the circuit 102 is directly under the inductor 136 such that the inductor 136 overlaps the circuit 102 when viewed in a direction normal to the substrate 100. While we cannot determine exactly how much overlap exists, Lin’s figure 2f does clearly show the inductor 136 at least partially overlaps the circuit 102 because in the cut away shown in figure 2f it is at a minimum directly above the circuit 102 and therefore would have to have some level of overlap.
Rejection over Lu et al., US 10,269,701
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 7, 8, 11, and 12 is/are rejected under 35 U.S.C. 102(a)(2) as being clearly anticipated by Lu et al., US 10,269,701.
The applied reference has a common assignee and a few common inventors with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
Concerning claim 1, Lu (see marked up figure 20 below) teaches a semiconductor structure, comprising:
a circuit 11a;
a redistribution layer (RDL) 11b formed over the circuit 11a, wherein RDL 11b comprises a plurality of metal layers 117;
an inductor 501/203 (column 7, lines 8-18) formed in a topmost metal layer 501/203, wherein the circuit 11a is directly under the inductor 501/203 such that the inductor 201/203 overlaps the circuit 11a when viewed in a direction normal to the substrate (under 11a);
an under bump metallization (UBM) layer 202a/202b formed on the topmost metal layer 501/203; and
a conductive connector 1903 formed on the UBM layer 202b.
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Pertaining to claim 2, Lu (column 4, lines 22-23) teaches the RDL 11b includes a copper (Cu) metal layer.
In claim 3, Lu figure 20) the UBM layer 202a/202b is in direct contact with the topmost metal layer 501/203.
As to claim 7, Lu (column 4, lines 55-57) teaches the plurality of metal layers 11b includes an ultra-thick metal (Mu) layer 120a/120b that is at least 3 µm thick.
In re claim 8, Lu (marked up figure 20 above) teaches the Mu layer 120a/120b is immediately below the topmost metal layer 501/203.
Pertaining to claim 11, Lu marked up figure 20 above) teaches a semiconductor structure, comprising:
a circuit 11a formed in or on a substrate (under 11a);
an ultra-thick metal (Mu) layer 120/120b at least 3 µm thick (column 4, lines 55-57);
a redistribution layer (RDL) 11b formed over the circuit 11a, wherein the RDL 11b includes a topmost metal layer 501/203 over the Mu layer 120a/120b; and
an inductor 501/203 (column 7, lines 8-18) formed in the topmost metal layer 510/203, wherein the circuit 11a is directly under the inductor 501/203 (column 7, lines 8-18) such that the inductor 201/203 overlaps the circuit 11a when viewed in a direction normal to the substrate (under 11a).
In claim 12, Lu (column 4, lines 55-58) teaches the topmost metal layer 120a/120b includes a copper (Cu) metal layer.
Claim(s) 5, 6, 9, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lu et al., US 10,269,701, as applied to claims 1 and 10 above.
Regarding claim 5, though Lu fails teaches the topmost metal layer includes a Cu metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Cu in the invention of Lu because Cu is a conventionally known and used metal layer. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
With respect to claim 6, though Lu fails teaches the topmost metal layer includes an aluminum (Al) metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Al in the invention of Lu because Al is a conventionally known and used metal layer. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Concerning claim 9, though Lu fails to teach the topmost metal layer 501/203 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
Regarding claim 13, though Lu fails to teach the topmost metal layer 501/203 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
Rejections over Lin et al., US 8,159,070
Claim(s) 1-3, 5-9, 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al., US 8,159,070 in view of https://anysilicon.com/semipedia.under-bump-metallization/ (hereafter referred to as anysilicon).
With respect to claim 1, Lin (figure 2f) teaches a semiconductor structure, comprising:
a circuit 102 formed in or on a substrate 100;
a redistribution layer (RDL) 104/106 formed over the circuit 102, wherein RDL 104/106 comprises a plurality of metal layers 106/124;
an inductor 136 (column 18, lines 52-56) formed in a topmost metal layer 136, wherein the circuit 102 is directly under the inductor 136 such that the inductor 136 overlaps the circuit 102 when viewed in a direction normal to the substrate 100;
a topmost metal layer 136; and
a conductive connector 138.
Lin fails to teach an under bump metallization (UBM) layer formed on the topmost metal layer; and the conductive connector formed on the UBM layer.
Anysilicon (Overview of under-bump metallization) teaches under bump metallization (UBM) layer formed on the topmost metal layer (contact pad); and a conductive connector formed on the UBM layer.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the UBM layer of anysilicon in the invention of Lin because anysilicon teaches a UBM layer improves adhesion and solderability, and prevents intermetallic diffusion.
As to claim 2, Lin (column 4, lines 3-4) teaches the RDL includes a copper (Cu) metal layer.
In re claim 3, anysilicon (Overview of under-bump metallization) teaches the UBM layer is in direct contact with the topmost metal layer (contact pad).
Concerning claim 5, Lin (column 19+, lines 7-10) teaches the topmost metal layer 136 includes a Cu metal layer.
Pertaining to claim 6, though Lin fails to teach the topmost metal layer 136 includes an aluminum (Al) metal layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use Al in the invention of Lin because Al is a conventionally known and used equivalent material. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
In claim 7, Lin teaches the plurality of metal layers 106 includes an ultra-thick metal (Mu) layer 124 that is at least 3 µm thick (column 10, lines 60-65).
Regarding claim 8, Lin teaches the Mu layer 124 is immediately below the topmost metal layer 136.
With respect to claim 9, though Lin fails to teach the topmost metal layer 136 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
As to claim 11, Lin (figure 2f) teaches a semiconductor structure, comprising:
a circuit 102 formed in or on a substrate 100;
an ultra-thick metal (Mu) layer 124 at least 3 µm thick (column 10, lines 60-65);
a redistribution layer (RDL) 104/106/124 formed over the circuit 102, wherein the RDL 104/106/124/136 includes a topmost metal layer 136 over the Mu layer 124; and
an inductor 136 (column 18, lines 52-56) formed in the topmost metal layer 136, wherein the circuit 102 is directly under the inductor 136 such that the inductor 136 overlaps the circuit 102 when viewed in a direction normal to the substrate 102.
In re claim 12, Lin (column 19+, lines 7-10) teaches the topmost metal layer 136 includes a Cu metal layer.
Concerning claim 13, though Lin fails to teach the topmost metal layer 136 is 3-7 µm thick, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F.
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/DAVID A ZARNEKE/Primary Examiner, Art Unit 2891 8/3/26
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