DETAILED ACTION
This office action is in response to the election filed 3/16/2026.
Currently, claims 1-20 are pending.
Election/Restrictions
Applicant’s election without traverse of Invention I, Species I is acknowledged.
Applicant has identified claims 1-6 and 8-16 as corresponding to the elected Species represented in FIG. 1A-B. Species I has the distinguishing feature of a dielectric fill material, which is mutually exclusive from a semiconductor fill material. Thus, claims 4 and 11-15 do not correspond to Species I, as they require a semiconductor fill material. Therefore, claims 4 and 11-15 (in addition to claim 7 identified by Applicant) are withdrawn from consideration.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-6 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 10,177,151) in view of Gu et al. (US 2024/0072059).
Pertaining to claim 1, Wang shows, with reference to FIG. 18, an integrated circuit (IC) structure, comprising:
an insulator layer over a substrate, wherein the substrate includes a first semiconductor material (col. 10, lines 36-39);
a semiconductor layer over the insulator layer (col. 10, lines 36-39), wherein the semiconductor layer includes a second semiconductor material (col. 10, lines 36-39); and
a first diffusion break (1013) including a fill material (1010) at least partially filling an opening within the semiconductor layer (see FIG. 9-10), the opening including curved side surfaces (FIG. 9).
Wang fails to show that the second semiconductor material is different from the first semiconductor material.
However, Gu teaches in para. [0022] that, for a similar structure, the semiconductor-on-insulator structure is e.g. an SiGe layer formed on a silicon substrate with the buried oxide therebetween.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to use the semiconductor-on-insulator structure taught by Gu for the semiconductor-on-insulator structure of Wang, with the motivation that Gu teaches this to be appropriate for devices containing PFETs, which is applicable to Wang. Furthermore, the structure taught by Gu is one of a finite number of known semiconductor-on-insulator structures. In such instances, the court has held that choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Pertaining to claim 2, Wang shows the curved side surfaces of the opening are physically closer at a lower portion of the opening than at an upper portion of the opening (FIG. 18).
Pertaining to claim 3, Wang shows the fill material includes an oxide material (col. 7, lines 6-11).
Pertaining to claim 5, Wang shows the first diffusion break further includes a gate (1626) over the fill material.
Pertaining to claim 6, Wang shows the fill material includes a dielectric material (col. 7, lines 6-11) and the gate is not electrically connected to an electric signal (col. 9, lines 12-17).
Pertaining to claim 9, Wang shows a second diffusion break identical to and spaced from the first diffusion break (col. 10, lines 46-48, 54-56; col. 11, lines 26-32); and an active device gate (1616) between the first diffusion break and the second diffusion break, wherein the active device gate includes an upper surface above an upper surface of the gate of the first diffusion break and an upper surface of the gate of the second diffusion break (when the orientation is upside-down relative to the orientation depicted in FIG. 18).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Gu as applied to claim 5 above, and further in view of Wu et al. (US 10,991,824).
Wang in view of Gu teaches the IC structure of claim 5, wherein the fill material only partially fills the opening and the gate includes a lower portion within the opening on the fill material and an upper portion on the lower portion over the opening (Wang, FIG. 18).
Wang in view of Gu fails to show the upper portion has a greater horizontal width than a horizontal width of the lower portion.
However, such a feature is not novel. As taught by Wu in FIG. 2, such a gate structure 28 may include an upper portion having a greater horizontal width than that of the lower portion.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for the gate of Wang in view of Gu to have upper portion having a greater horizontal width than a horizontal width of the lower portion, as taught by Wu, as the court has held that such a change in shape is prima facie obvious. Ex parte Rubin, 128 USPQ 440 (Bd. App. 1959).
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record, either singularly or in combination, does not disclose or suggest an IC structure as it is defined in claims 1, 5 and 9 in combination with the details of a third diffusion break, including a gate over a shallow trench isolation (STI) structure, the STI structure extending through the insulator layer to the substrate, wherein the STI structure of the third diffusion break includes substantially straight side surfaces, and wherein the first diffusion break and the second diffusion break are each within a p-type field effect transistor region of the substrate and the third diffusion break is within an n-type field effect transistor region of the substrate.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lee et al. (US 2024/0096980), Song (US 2024/0258316), Park et al. (US 10,910,376), Song et al. (US 10,505,546), Liu et al. (US 9,899,267), and Kang et al. (US 11,251,313) disclose IC structures similar to Applicant’s claimed IC structure, particularly a diffusion break with curved side surfaces.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M LUKE whose telephone number is (571)270-1569. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANIEL LUKE/Primary Examiner, Art Unit 2896