Prosecution Insights
Last updated: April 19, 2026
Application No. 18/454,107

DEEP TRENCH ISOLATION STRUCTURE FOR IMAGE SENSOR

Non-Final OA §102
Filed
Aug 23, 2023
Examiner
SANDVIK, BENJAMIN P
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
82%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
874 granted / 1142 resolved
+8.5% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
25 currently pending
Career history
1167
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
60.5%
+20.5% vs TC avg
§102
25.2%
-14.8% vs TC avg
§112
6.7%
-33.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1142 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 15-18 and 20-25 in the reply filed on 2/10/2026 is acknowledged. Claims 1-14 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected group, there being no allowable generic or linking claim. Election was made without traverse. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 21-23, 25, 27, 28, 30-32 and 34 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Furusho et al (WO 2023/042462). With respect to claim 21, Furusho teaches a method of forming an integrated device, comprising: performing a first etch into a first side of a substrate (Fig. 5C, 20W; i.e. top side) to form a first trench (Fig. 5C, 24b and Paragraph 51); forming a lining layer (Fig. 5D, m3) covering sidewalls of the substrate surround the first trench; filling the first trench with a sacrificial core comprising an insulative material (Fig. 5D, m4); performing a second etch (Fig. 5E and Paragraph 52) to remove a first portion of the sacrificial core at the first side of the substrate, leaving an opening; forming a seal layer (Fig. 5F, m5) over the first side of the substrate and within the opening; performing a third etch (Fig. 5M and Paragraph 57) into a second side (i.e. bottom side in Fig. 5C; the substrate is flipped in Fig. 5M) of the substrate to remove a second portion of the sacrificial core below the seal layer and form a second trench (Fig. 5M, 24b); lining the second trench with a high-k layer (Fig. 5N, 51 and Paragraph 40); and filling the second trench with an insulative core (Fig. 5N, 52) extending from the second side of the substrate to the seal layer. With respect to claim 22, Furusho teaches performing the third etch further removes segments of the lining layer (Fig. 5M, m3) beneath the seal layer (Fig. 5M, m5), exposing the sidewalls of the substrate (Fig. 5M, 22). With respect to claim 23, Furusho teaches that the second etch further removes portions (Fig. 5G, m3) of the lining layer that are level with the opening, thereby exposing sidewalls of the substrate surrounding the opening. With respect to claim 25, Furusho teaches removing first segments of the seal layer overlying the first side of the substrate; and implanting dopants (Fig. 5H, 23) to form separated portions of a floating node region at the first side of the substrate, wherein the portions of the floating node region are separated by a second segment of the seal layer remaining within the opening. With respect to claim 27, Furusho teaches a method of forming an integrated device, comprising: performing a first etch into a first side of a substrate (Fig. 5C, 20W; i.e. top side) to form a first trench (Fig. 5C, 24b and Paragraph 51); filling the first trench with a sacrificial core (Fig. 5D, m4); performing a second etch (Fig. 5E and Paragraph 52) to remove a first portion of the sacrificial core at the first side of the substrate, leaving a first opening with a depth less than a depth of the first trench; forming a seal layer (Fig. 5F, m5) over the first side of the substrate and within the first opening; performing a third etch (Fig. 5M and Paragraph 57) into a second side (i.e. bottom side in Fig. 5C; the substrate is flipped in Fig. 5M) of the substrate to remove remaining portions of the sacrificial core, exposing a bottom surface of the seal layer (Fig. 5M, m5) and sidewalls of the substrate (Fig. 5M, 24b) beneath the seal layer; and covering the bottom surface of the seal layer with an insulative core (Fig. 5N, 51 and 52; Paragraph 58) extending from the second side of the substrate to the seal layer. With respect to claim 28, Furusho teaches forming an insulative fill (Fig. 9A, 62Ab and Paragraph 80) within the first opening and covering sidewalls of the seal layer (Fig. 9A, 62Aa). With respect to claim 30, Furusho teaches performing a fourth etch before forming the first trench to form a second opening (Fig. 5A, 24a), wherein the second opening has a first width, and wherein after the first trench is formed, the first trench (Fig. 5C, 24b) has a second width that is less than the first width (Fig. 5C, the trench 24b has a width that is smaller than the width of 24a by the thickness of layer m2). With respect to claim 31, Furusho teaches that after performing the fourth etch to form the second opening, the second opening extends to a first depth (Fig. 5A, c) beneath the first side of the substrate, wherein after performing the first etch to form the first trench, the first trench extends to a second depth (Fig. 5C, depth of 24b) beneath the first side of the substrate that is greater than the first depth, and wherein after performing the second etch to form the first opening, the first opening extends to a third depth (Fig. 5E, a) that is less than the first depth. With respect to claim 32, Furusho teaches that after performing the fourth etch to form the second opening, the second opening extends to a first depth (Fig. 5A, c) beneath the first side of the substrate, wherein after performing the first etch to form the first trench, the first trench extends to a second depth (Fig. 5C, depth of 24b) beneath the first side of the substrate that is greater than the first depth, and wherein after performing the second etch to form the first opening, a height of the sacrificial core (Fig. 5C, m4) is greater than a difference between the first depth and the second depth. With respect to claim 34, Furusho teaches that the first trench (Fig. 5C, 24b) is formed between sidewalls (Fig. 5C, 24a) of the substrate exposed by the fourth etch. Allowable Subject Matter Claims 24, 26, 29 and 33 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 15-18, 20, and 35 are allowed. The following is an examiner’s statement of reasons for allowance: the best prior art of record does not teach or fairly suggest, along with the other claimed features: forming a floating node over the insulative core and a remaining portion of the seal layer. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN P SANDVIK whose telephone number is (571)272-8446. The examiner can normally be reached M-F: 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENJAMIN P SANDVIK/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 23, 2023
Application Filed
Mar 04, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
82%
With Interview (+6.0%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 1142 resolved cases by this examiner. Grant probability derived from career allow rate.

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