DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 27 October 2025 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 21-24 are rejected under 35 U.S.C. 112(a) as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claim 21 is rejected for containing the limitation “forming a first dielectric region distanced from the first source/drain region in a longitudinal Y-direction and a second dielectric region distanced from the second source/drain region in the longitudinal Y-direction”. There appears to be no support in the specification for this limitation. For the purpose of examination, this limitation will be replaced by “forming a first dielectric region distanced from a second dielectric region in a longitudinal Y-direction” ([00129]).
Claims 22-24 are rejected for their dependency on claim 21.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 2-4 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claims 2-4 recites the limitation "The method..." in the preamble, indicating they are dependent claims, without referencing an independent claim upon which they are dependent. There is insufficient antecedent basis for this limitation in the claim. For the purpose of examination, claim 2 will be assumed to depend on claim 1, claim 3 on claim 2, and claim 4 on claim 3.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 9-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al (US 20210134982 A1, hereinafter “Lin”).
Regarding Claim 9 – Lin discloses a method comprising: forming a first fin structure and a second fin structure (64A and 64B [0024] and Fig. 4); forming an isolation region (62 [0026]) between the first fin structure and the second fin structure ([0026] and Fig. 4); recessing the isolation region ([0071]) to provide the isolation region with a recessed surface having a wave shape (Fig. 23C); depositing a sacrificial gate material (68 [0033]) over the isolation region (Fig. 4); and etching a portion of the sacrificial gate material to form a sacrificial gate ([0035]).
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Regarding Claim 10 – Lin further discloses the method of claim 9, wherein the wave shape comprises: a first terminal crest (1st Term. in Fig. 23C) abutting the first fin structure (1st Fin Structure in Fig. 23C); a second terminal crest (2nd Term. in Fig. 23C) abutting the second fin structure (2nd Fin Structure in Fig. 23C); a first intermediate crest (1st Int. in Fig. 23C) located between the first terminal crest and the second terminal crest; and a second intermediate crest (2nd Int. in Fig. 23C) located between the first intermediate crest and the second terminal crest (Fig. 23C).
Regarding Claim 11 – Lin further discloses the method of claim 10, wherein the wave shape further comprises: a first terminal trough (1st Trough in Fig. 23C) located between the first terminal crest and the first intermediate crest; a second terminal trough (2nd Trough in Fig. 23C) located between the second terminal crest and the second intermediate crest; and a central trough (Cen. Trough in Fig. 23C) located between the first intermediate crest and the second intermediate crest (Fig. 23C).
Regarding Claim 12 – Lin further discloses the method of claim 11, wherein each fin structure (64 [0019]) includes a mesa portion of a first semiconductor material (formed from substrate [0024]) and a second layer of a second semiconductor material (doped silicon, silicon germanium, silicon carbide, germanium, or a III-V or II-VI semiconductor [0029-0032]), wherein the mesa portion has an uppermost surface (US Fig. 23B), and wherein: the first terminal trough is located at a first vertical depth (DM in Fig. 23B + D1 in Fig. 23C) from the uppermost surface; the second terminal trough is located at a second vertical depth (DM in Fig. 23B + D2 in Fig. 23C) from the uppermost surface; the central trough is located at a central vertical depth (DM in Fig. 23B + DC in Fig. 23C) from the uppermost surface; and the central vertical depth is greater than the first vertical depth and the second vertical depth (DC > D1 and DC > D2, Fig. 23C).
Claims 21-22 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al (US 20230395660 A1, hereinafter “Kim”).
Regarding Claim 21 – Kim discloses a method comprising: forming a first source/drain region and a second source/drain region distanced from the first source/drain region in a lateral X-direction (multiple source/drain regions [0008] and Fig. 2A); forming a first dielectric region (118b [0061] and 1st 118b in Fig. 2C) distanced from a second dielectric region (2nd 118b in Fig. 2C) in a longitudinal Y-direction; forming a fin structure including a semiconductor nanosheet (NSS [0024] and Fig. 2A) distanced from a mesa portion in a vertical Z-direction (Fig. 2A), wherein the semiconductor nanosheet extends in the lateral X-direction from the first source/drain region to the second source/drain region (between Source/Drain Regions in Fig. 2A); forming a gate structure (160 [0059] and Fig. 2A) overlying the fin structure (Fig. 2A), wherein the gate structure includes a metal gate and a high-k gate dielectric ([0059]), wherein the gate structure extends in the longitudinal Y- direction (Fig. 2C), and wherein a lowest portion of the gate structure is located between the mesa portion and the semiconductor nanosheet (Fig. 2A); forming a first inner spacer (132 [0035] and Fig. 2A) separating the first source/drain region from the lowest portion of the gate structure in the lateral X-direction (Figs. 2A and 2C); forming a first spacer structure (118a [0061] and Fig. 2C)) separating the first dielectric region from the gate structure in the lateral X-direction (Fig. 2C); and forming a second spacer structure (118a [0061] and Fig. 2C)) separating the second dielectric region from the gate structure in the lateral X-direction; wherein a minimum first distance between the first spacer structure and the first inner spacer in the longitudinal Y-direction is from 0 to 2 nanometers (nm) (appears to be 0 nm in Fig. 2C); and wherein a minimum second distance between the second spacer structure and the first inner spacer in the longitudinal Y- direction is from 0 to 2 nanometers (nm) (appears to be 0 nm in Fig. 2C).
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Regarding Claim 22 – Kim further discloses the method of claim 21, wherein the minimum first distance is located at an interface, wherein the metal gate extends toward the interface to an edge, and wherein a lateral profile of the edge of the metal gate has an internal angle of greater than 100 degrees (A1 in annotated Fig. 2C is greater than 100 degrees).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, and 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al (US 20210134982 A1, hereinafter “Lin”), in view of Chang et al (US 20230352546 A1, hereinafter “Chang”), and further in view of Kitahara et al (US 20170162595 A1, hereinafter “Kitahara”).
Regarding Claim 1 – Lin discloses a method comprising: forming structures over a substrate ([0029]); forming a layer between the structures (62 [0026] and [0028]); depositing a material over the substrate (68 [0019]); and performing a second etch process to etch a portion of the material (etching processes to remove 68 and 73 down to concave upper surface of 62 [0058-0060]) and form the material with a sidewall (73 in Fig. 23C), wherein the second etch process uncovers the serrated profile (shown and described as concave in Fig. 23A and [0060] except in detail view Fig. 23C, where it is clarified to be serrated).
Lin fails to disclose performing a first etch process to recess the layer to a surface having a serrated profile; optionally forming a film or films over the surface, wherein the film or films retain the serrated profile.
However, Chang discloses an etch process to recess the isolation layer (118 [0032]) to a surface having a concave profile (118a [0051]).
Chang discloses a finFET structure analogous to Lin. Chang teaches recessing the top of the trench isolation for the benefit of removing etching residues or intermixed materials left from the removal of layers above the isolation layer (Chang [0051]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider recessing the trench isolation layer in a finFET to a concave shape to achieve the benefit of removing etching residues or intermixed materials left from the removal of layers above the isolation layer.
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Lin fails to disclose during the second etch process ions are reflected from the serrated profile.
However, Kitahara discloses using a convex feature at the bottom of a trench to reflect ions toward the sidewalls during etching (Kitahara [0058]).
Kitahara is analogous to Lin in the etching of a trench with vertical, or near vertical sidewalls. Kitahara teaches using a convex feature (corners 63a, Kitahara [0058]) to reflect ions to the sidewalls in order to achieve the well-known benefit of etching vertical or near vertical sidewalls (Kitahara [0058]). Both convex and concave features represent surfaces that are not orthogonal to the sidewalls, and Lin states the etch may be tuned to provide a convex or concave surface (Lin [0028]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider using a concave surface to reflect ions to etch the sidewall to achieve the benefit of vertical or near vertical sidewalls.
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Regarding Claim 2 – Lin modified by Chang, and further modified by Kitahara, discloses all the limitations of claim 1.
The combination of Lin, Chang, and Kitahara further discloses the structures comprise a first structure having a first sidewall (1st Sidewall, annotated Lin Fig. 23C) and a second structure having a second sidewall (2nd Sidewall, annotated Lin Fig. 23C); the portion of the material removed by the second etch process extends from the first sidewall to the second sidewall (68 [0033]); and during the second etch process, ions are reflected from the serrated profile to remove material on the first sidewall and the second sidewall (Kitahara [0058] and Fig. 21).
Regarding Claim 3 – Lin modified by Chang, and further modified by Kitahara, discloses all the limitations of claim 2.
The combination of Lin, Chang, and Kitahara further discloses the structures comprise a first structure having a first sidewall (1st Sidewall, annotated Lin Fig. 23C).
The combination of Lin, Chang, and Kitahara fails to explicitly disclose after the second etch process, a residue of the material remains on the first sidewall above the serrated profile; the residue has a thickness in a lateral direction perpendicular to the first sidewall; and the thickness is less than 4 nanometers (nm).
However, the combination of Lin, Chang, and Kitahara discloses a residue of the material remains above the isolation and is removed while forming a concave profile (Chang [0051]).
The thickness of residue on the sidewall is a result of tuning the plasma etching process to adjust a lateral etching rate (Lin [0049]), and presents a case of routine optimization. A residual thickness less than 4 nm is not an unexpected result. No remaining residue is comprehended in that range, for example, indicating the material etch-back was successful. See MPEP 2144.05{II)(A).
Regarding Claim 5 – Lin modified by Chang, and further modified by Kitahara, discloses all the limitations of claim 1.
The combination of Lin, Chang, and Kitahara further discloses the second etch process includes: selectively masking the material to define a masked portion of the material and an unmasked portion of the material (70, Lin [0033]), wherein the second etch process removes the unmasked portion of the material (removes unmasked 68, Lin [0035]).
Regarding Claim 6 – Lin modified by Chang, and further modified by Kitahara, discloses all the limitations of claim 1.
The combination of Lin, Chang, and Kitahara further discloses the first etch process comprises cycles of a chemical etch and a plasma etch (Isolation region 120, including layer 118 recessed using a combination of wet and dry etch, Chang [0033]).
Regarding Claim 7 – Lin modified by Chang, and further modified by Kitahara, discloses all the limitations of claim 6.
The combination of Lin, Chang, and Kitahara fails to expressly disclose the first etch process uses: an etchant gas selected from NH3, NF3, HBr, and H2; a passivation gas selected from N2 and 02; and a dilute gas selected from He, Ar, and N2.
However, Lin discloses the second etch process uses: an etchant gas selected from HBr, and H2 (Lin [0059]); a passivation gas selected from N2 and 02 (Lin [0059]); and a dilute gas selected from He and Ar (Lin [0059]). It is prima facie obvious a similar selection of gases can be used for the first etch based on suitability for the intended purpose. See MPEP 2144.07.
Regarding Claim 8 – Lin modified by Chang, and further modified by Kitahara, discloses all the limitations of claim 7.
The combination of Lin, Chang, and Kitahara fails to expressly disclose the first etch process is performed: at a power of from 10 to 4000 Watts; at a pressure of from 10 mTorr to 3 Torr; and with a gas flow of from 20 to 3000 sccm.
However, Lin discloses the second etch process is performed: at a power of from 10 to 3000 Watts; at a pressure of from 1 mTorr to 800 mTorr; and with a gas flow of from 10 to 5000 sccm. These ranges overlap the claimed ranges, presenting a prima facie case of obviousness as described in MPEP 2144.05(I).
Claims 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al (US 20210134982 A1, hereinafter “Lin”).
Regarding Claim 13 – Lin discloses all the limitations of claim 12.
Lin fails to explicitly disclose the first terminal trough depth is from 10 to 20 nm; the second terminal trough depth is from 10 to 20 nm; and the central trough depth is from 15 to 35 nm.
However, Lin discloses D1 is between 0 nm and 20 nm, which represents an overlapping range, and a prima facie case of obviousness. See MPEP 2144.05(I).
Regarding Claim 14 – Lin discloses all the limitations of claim 12.
Lin fails to explicitly disclose the first terminal trough depth is from 20 to 30 nm; the second terminal trough depth is from 20 to 30 nm; and the central trough depth is from 25 to 45 nm.
However, Lin discloses D1 is between 0 nm and 20 nm, which represents an overlapping range in the case of the terminal troughs and a close range in the case of the central trough. Both overlapping and close ranges represent a prima facie case of obviousness. See MPEP 2144.05(I).
Regarding Claim 15 – Lin discloses all the limitations of claim 9.
Lin further discloses the first fin structure has a sidewall (Sidewall in Fig. 23C); an angle is defined between the sidewall and the recessed surface (Angle in Fig. 23C).
Lin fails to explicitly disclose the angle is from 120 to 160 degrees.
However, Lin discloses the angle is greater than 90 and less than 180 degrees. This is clear in Figure 23C, and presents an overlapping range and a prima facie case of obviousness (MPEP 2144.05(I)).
Regarding Claim 16 – Lin discloses all the limitations of claim 9.
Lin fails to explicitly disclose recessing the isolation region to provide the isolation region with the recessed surface having the wave shape comprises performing an etch process using an etchant gas selected from NH3, NF3, HBr, and H2; using a passivation gas selected from N2 and 02; and using a dilute gas selected from He, Ar, and N2, at a power of from 10 to 4000 Watts; at a pressure of from 10 mTorr to 3 Torr; and with a gas flow of from 20 to 3000 sccm.
However, Lin discloses recessing the isolation region to provide the isolation region with the recessed surface having the wave shape comprises performing an etch process using an etchant gas selected from HBr and H2 ([0056]); using a passivation gas selected from N2 and 02 ([0056]); and using a dilute gas selected from He and Ar ([0056]) at a power of from 10 to 3000 Watts ([0057]); at a pressure of from 1 mTorr to 800 mTorr; and with a gas flow of from 10 to 5000 sccm. The gases in the prior art are from the same groups as the instant application, and the ranges in the prior art all overlap with the claimed ranges, presenting a prima facie case of obviousness. See MPEP 2144.05(I).
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 20230395660 A1, hereinafter “Kim”).
Regarding Claim 23 – Kim further discloses the method of claim 21, wherein a minimum first distance is located at an interface, wherein the metal gate extends toward the interface to an edge, and wherein a lateral profile of the edge of the metal gate has an internal angle of from 100 to 120 degrees (A1 in annotated Fig. 2C between 100 and 180 degrees, presenting an overlapping range and prima facie case of obviousness. See MPEP 2144.05(I)).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 20230395660 A1, hereinafter “Kim”), in view of Lin et al (US 20210134982 A1, hereinafter “Lin”).
Regarding Claim 24 – Kim further discloses the method of claim 21, further comprising forming a first shallow isolation region (114 [0026] and 1st in annotated Fig. 1) distanced from a second shallow isolation region (2nd in annotated Fig. 1) in the longitudinal Y-direction; wherein: the mesa portion of the fin structure (FA [0024] and Fig. 1) is located between the first shallow isolation region and the second shallow isolation region (Fig. 1).
Kim fails to disclose the mesa portion of the fin structure has a sidewall abutting the first shallow isolation region; the first shallow isolation region has an uppermost surface; an angle is defined between the sidewall and the uppermost surface; and the angle is from 120 to 160 degrees.
However, Lin discloses the mesa portion (64, Lin [0019] and Fig. 1) of the fin structure has a sidewall abutting the first shallow isolation region (62, Lin [0019] and Fig. 1); the first shallow isolation region has an uppermost surface (62U, Lin [0060] and Fig. 14A); an angle (A2, annotated Lin Fig. 14A) is defined between the sidewall and the uppermost surface (shown in Fig. 14A as orthogonal view to Fig. 1); and the angle is between 90 and 180 degrees (Fig. 14A), presenting a prima facie case of obviousness. See MPEP 2144.05(I).
Kim and Lin both describe finFET devices. Although Kim describes a shallow isolation region between fins, a cross section is not shown with the fins having isolation between them. Lin shows a typical cross section of fins with isolation between them (Lin [0024] and Fig. 4) and a later recess after etching back the sacrificial gate (Lin [0066] and Fig. 14A). This is simply not shown in Kim, but is commonly known in the industry. Setting the angle between the sidewall and the surface of the isolation where it meets the sidewall is a case of routine optimization. See MPEP 2144.05(II)(A).
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Allowable Subject Matter
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
It appears the prior art of record fails to disclose “the residue does not contact the first semiconductor layer”. The closest prior art discloses the presence of residue at the base of vertical features, preventing the residue, and removing the residue, but not that the residue does not contact a first semiconductor layer as defined in claim 4.
Conclusion
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/JASON MCDONALD/Examiner, Art Unit 2898 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899