Prosecution Insights
Last updated: July 17, 2026
Application No. 18/455,832

DISPLAY DEVICE

Non-Final OA §102§103
Filed
Aug 25, 2023
Priority
Oct 11, 2022 — RE 10-2022-0130097 +1 more
Examiner
DINKE, BITEW A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
561 granted / 771 resolved
+4.8% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
43 currently pending
Career history
810
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
91.7%
+51.7% vs TC avg
§102
3.1%
-36.9% vs TC avg
§112
1.6%
-38.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 771 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/20/2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 1 and 26 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Objections Claims 3, 4, 11, and 23 are objected to because of the following informalities: Claims 3, 4, 11, and 23 recites the limitation “the first sub-transistor" in line 6, lines 1-2, line 5, and line 6, respectively. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the first sub-transistor” relates back to “a first sub-transistor of the first transistor.” For purpose of compact prosecution, “the first sub-transistor” will be treated as if it were “the first sub-transistor of the first transistor.” Claims 3, 4, 11, and 23 recites the limitation “the second sub-transistor" in line 8, lines 3-4, lines 7-8, and line 6, respectively. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “first sub-transistor” relates back to “a first sub-transistor of the first transistor.” For purpose of compact prosecution, “first sub-transistor” will be treated as if it were “the first sub-transistor of the first transistor.” Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-6, 8-18, 20, 22-24, and 26-29 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Wang et al. (U.S. 2023/0048014 A1, hereinafter refer to Wang). Regarding Claim 1: Wang discloses a display device (see Wang, Fig.11 as shown below and ¶ [0002]), comprising: PNG media_image1.png 718 695 media_image1.png Greyscale PNG media_image2.png 724 697 media_image2.png Greyscale a pixel electrode (anode of a light-emitting device L) (see Wang, Fig.11 as shown above, ¶ [0075]- ¶ [0076], and ¶ [0117]); and a pixel circuit (10, 20, and 30) electrically connected to the pixel electrode (anode of a light-emitting device L) (see Wang, Fig.11 as shown above, ¶ [0075]- ¶ [0076], and ¶ [0117])), wherein the pixel circuit (10, 20, and 30) includes: a first transistor (T61/T62) including a plurality of sub-transistors (T61/T62) electrically connected to each other through a first common node (N3) (see Wang, Fig.11 as shown above); a second transistor (T21/T22) including a plurality of sub-transistors (T21/T22) electrically connected to each other through a second common node (N2) (see Wang, Fig.11 as shown above); and a capacitor (C1) including a first electrode electrically connecting the first common node (N3) with the second common node (N2) and a second electrode disposed to overlap the first electrode and electrically connected to a direct current power source (Vinit) (see Wang, Fig.11 as shown above), wherein the first electrode contacts the first common node (N3) and the second common node (N2) and extends between the first common node (N3) and the second common node (N2) (see Wang, Fig.11 as shown above). Regarding Claim 2: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein the first common node (N3), the second common node (N2), and the first electrode are integral with each other (see Wang, Fig.11 as shown above). Regarding Claim 3: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein a first sub-transistor (T61) of the first transistor (T61/T62) and a second sub-transistor (T21) of the second transistor (T21/T22) are electrically connected to each other through source electrodes and drain electrodes of the first sub-transistor (T61) of the first transistor and the second sub-transistor (T21) of the second transistor (see Wang, Fig.11 as shown above), and the source electrode of the first sub-transistor (T61), the drain electrode of the first sub-transistor (T61), the first common node (N3), the first electrode, the second common node (N2), the source electrode of the second sub-transistor (T21), and the drain electrode of the second sub-transistor (T21) are electrically connected to one another and form a closed loop shape (see Wang, Fig.11 as shown above). Regarding Claim 4: Wang discloses a display device as set forth in claim 3 as above. Wang further teaches wherein the source electrode of the first sub-transistor (T61), the drain electrode of the first sub-transistor (T61), the first common node (N3), the first electrode, the second common node (N2), the source electrode of the second sub-transistor (T21), and the drain electrode of the second sub-transistor (T21) have a closed loop shape surrounding at least a portion of a gate electrode of the first sub transistor (T61) (see Wang, Fig.11 as shown above). Regarding Claim 5: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein the first common node (N3), the second common node (N2), and the first electrode are formed of a semiconductor material (doped region of source/drain region) (see Wang, Fig.11 as shown above). Regarding Claim 6: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein the second electrode overlaps the entirety of the first electrode (see Wang, Fig.11 as shown above). Regarding Claim 8: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein the first electrode and the second electrode have a same shape (see Wang, Fig.11 as shown above). Regarding Claim 9: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein the first electrode includes: a first extension portion extended from the first common node (N3) in a second direction intersecting a first direction (see Wang, Fig.11 as shown above); a second extension portion extended from the second common node (N2) in the first direction (see Wang, Fig.11 as shown above); and a connection portion electrically connecting the first extension portion with the second extension portion (see Wang, Fig.11 as shown above). Regarding Claim 10: Wang discloses a display device as set forth in claim 9 as above. Wang further teaches wherein the connection portion includes at least one curved portion (see Wang, Fig.11 as shown above). Regarding Claim 11: Wang discloses a display device as set forth in claim 9 as above. Wang further teaches wherein a first sub-transistor of the first transistor (T61) and a second sub-transistor of the second transistor (T21) are electrically connected to each other through a source electrode and a drain electrode of the second sub-transistor (T21) (see Wang, Fig.11 as shown above), and the source electrode of the first sub-transistor (T61), the drain electrode of the first sub- transistor (T61), the first common node (N3), the first extension portion, the connection portion, the second extension portion, the second common node (N2), the source electrode of the second sub-transistor (T21), and the drain electrode of the second sub-transistor (T21) are electrically connected to one another and form a closed loop shape (see Wang, Fig.11 as shown above). Regarding Claim 12: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein a direct current power line electrically connecting the direct current power source with the second electrode (see Wang, Fig.11 as shown above). Regarding Claim 13: Wang discloses a display device as set forth in claim 12 as above. Wang further teaches wherein a first driving voltage line, a first initialization voltage line, a second initialization voltage line, and a bias voltage line which are electrically connected to the pixel circuit (10, 20, and 30) (see Wang, Fig.11 as shown above). Regarding Claim 14: Wang discloses a display device as set forth in claim 13 as above. Wang further teaches wherein the direct current power line is one of the first driving voltage line, the first initialization voltage line, the second initialization voltage line, and the bias voltage line (see Wang, Fig.11 as shown above). Regarding Claim 15: Wang discloses a display device as set forth in claim 14 as above. Wang further teaches wherein the direct current power line is the first driving voltage line (see Wang, Fig.11 as shown above), and the second electrode and the direct current power line (Vinit) are integral with each other (see Wang, Fig.11 as shown above). Regarding Claim 16: Wang discloses a display device as set forth in claim 13 as above. Wang further teaches wherein the direct current power line is one of the first initialization voltage line, the second initialization voltage line, and the bias voltage line (see Wang, Fig.11 as shown above). Regarding Claim 17: Wang discloses a display device as set forth in claim 16 as above. Wang further teaches wherein the second electrode and the first driving voltage line are separated from each other (see Wang, Fig.11 as shown above). Regarding Claim 18: Wang discloses a display device as set forth in claim 16 as above. Wang further teaches wherein a connection electrode electrically connecting the direct current power line with the second electrode (see Wang, Fig.11 as shown above). Regarding Claim 20: Wang discloses a display device as set forth in claim 18 as above. Wang further teaches a data line disposed to be adjacent to the first electrode (see Wang, Fig.11 as shown above), wherein the connection electrode is disposed between the data line and a first upper driving voltage line of the first driving voltage line (see Wang, Fig.11 as shown above). Regarding Claim 22: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein the pixel circuit further includes: a driving transistor electrically connected between the first driving voltage line and the pixel electrode (see Wang, Fig.11 as shown above); and a first capacitor (C2) electrically connected between the first driving voltage line and a gate electrode of the driving transistor (see Wang, Fig.11 as shown above). Regarding Claim 23: Wang discloses a display device as set forth in claim 22 as above. Wang further teaches wherein a first sub-transistor of the first transistor (T61) and a second sub-transistor of the second transistor (T21) are electrically connected to each other through source electrodes and drain electrodes of the first sub-transistor of the first transistor (T61) and the second sub-transistor of the second transistor (T21) (see Wang, Fig.11 as shown above), and a contact point of the first sub-transistor and the second sub-transistor is electrically connected to the gate electrode of the driving transistor (see Wang, Fig.11 as shown above). Regarding Claim 24: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein gate electrodes of the plurality of sub-transistors included in the first transistor (T61/T62) are integral with each other (see Wang, Fig.11 as shown above), and gate electrodes of the plurality of sub-transistors included in the second transistor (T21/T22) are integral with each other (see Wang, Fig.11 as shown above). Regarding Claim 26: Wang discloses an electronic device (see Wang, Fig.11 as shown above and ¶ [0002]), comprising: a pixel electrode (anode of a light-emitting device L) (see Wang, Fig.11 as shown above, ¶ [0075]- ¶ [0076], and ¶ [0117]); a plurality of composite gate transistors (T61/T62/T21/T22) electrically connected to the pixel electrode (anode of a light-emitting device L) (see Wang, Fig.11 as shown above, ¶ [0075]- ¶ [0076], and ¶ [0117]); and a capacitor (C1) including a first electrode electrically connecting common nodes (N3 and N2) of at least two of the composite gate transistors (T61/T62/T21/T22) to each other and a second electrode disposed to overlap the first electrode and electrically connected to a direct current power source (Vinit) (see Wang, Fig.11 as shown above), wherein the first electrode contacts the common nodes (N3/N2) of at least two of the composite gate transistors (T61/T62/T21/T22) and extends between those common nodes (N3/N2) (see Wang, Fig.11 as shown above). Regarding Claim 27: Wang discloses an electronic device as set forth in claim 26 as above. Wang further teaches wherein each of the composite gate transistors includes a plurality of sub-transistors electrically connected to a corresponding common node of a corresponding composite gate transistor (see Wang, Fig.11 as shown above). Regarding Claim 28: Wang discloses an electronic device as set forth in claim 26 as above. Wang further teaches wherein the common nodes of the plurality of composite gate transistors and the first electrode are integral with each other (see Wang, Fig.11 as shown above). Regarding Claim 29: Wang discloses a display device as set forth in claim 1 as above. Wang further teaches wherein one of the sub-transistors of the first transistor is connected to a node located between a driving transistor and the pixel electrode (see Wang, Fig.11 as shown above). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 7 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (U.S. 2023/0048014 A1, hereinafter refer to Wang). Regarding Claim 7: Wang discloses a display device as applied to claim 1 above. Wang is silent upon explicitly disclosing wherein an area of the second electrode is wider than an area of the first electrode. However, Wang teaches wherein an area of the second electrode and an area of the first electrode (see Wang, Fig.11 as shown above). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the an area of the second electrode than an area of the first electrode through routine experimentation and optimization to obtain optimal or desired resistance of electrode because the an area of the second electrode and an area of the first electrode is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Claim(s) 19 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (U.S. 2023/0048014 A1, hereinafter refer to Wang) as applied to claim 18 above, and further in view of Fu (U.S. Pat. No. 11,361,713 B1, hereinafter refer to Fu). Regarding Claim 19: Wang discloses a display device as applied to claim 18 above. Wang is silent upon explicitly disclosing wherein the connection electrode is disposed on a different layer from the direct current power line and the second electrode. For support see Fu, which teaches wherein the connection electrode is disposed on a different layer from the direct current power line (Sn/S(i, 2)) and the second electrode (gate electrode of T2) (see Fu, Figs.9-10 as shown below). PNG media_image3.png 773 514 media_image3.png Greyscale PNG media_image4.png 539 545 media_image4.png Greyscale Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Wang and Fu to enable the connection electrode to be disposed on a different layer from the direct current power line and the second electrode as taught by Fu in order to electrically connect the direct current power line to the second electrode. Claim(s) 21 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (U.S. 2023/0048014 A1, hereinafter refer to Wang) as applied to claim 20 above, and further in view of Wang (U.S. 2023/0180552, hereinafter refer to Wang’552). Regarding Claim 21: Wang discloses a display device as applied to claim 20 above. Wang is silent upon explicitly disclosing wherein the connection electrode, the data line, and the first upper driving voltage line are disposed on a same layer. For support see Wang’552, which teaches wherein the connection electrode, the data line, and the first upper driving voltage line are disposed on a same layer (see Wang’552, ¶ [0002], ¶ [0020], ¶ [0044], and ¶ [0089]). Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Wang and Wang’552 to enable the connection electrode, data line, and first upper driving voltage line to be disposed on a same layer as taught by Wang’552 in order to realize an overall performance of the circuit in a limited space. Conclusion 39. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BITEW A DINKE whose telephone number is (571)272-0534. The examiner can normally be reached M-F 7 a.m. - 5 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BITEW A DINKE/Primary Examiner, Art Unit 2812
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Prosecution Timeline

Show 4 earlier events
Jan 09, 2026
Response Filed
Feb 04, 2026
Final Rejection mailed — §102, §103
Mar 13, 2026
Response after Non-Final Action
Apr 20, 2026
Request for Continued Examination
Apr 24, 2026
Response after Non-Final Action
May 15, 2026
Non-Final Rejection mailed — §102, §103
Jul 07, 2026
Applicant Interview (Telephonic)
Jul 07, 2026
Examiner Interview Summary

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
85%
With Interview (+11.9%)
2y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 771 resolved cases by this examiner. Grant probability derived from career allowance rate.

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