Prosecution Insights
Last updated: July 17, 2026
Application No. 18/456,042

IMPROVING COVERAGE IN FUNCTIONAL VERIFICATION BY COORDINATED RANDOMIZATION OF VARIABLES ACROSS MULTIPLE CLASSES

Non-Final OA §102
Filed
Aug 25, 2023
Examiner
DINH, PAUL
Art Unit
Tech Center
Assignee
Synopsys Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
948 granted / 1060 resolved
+29.4% vs TC avg
Minimal +4% lift
Without
With
+4.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
13 currently pending
Career history
1069
Total Applications
across all art units

Statute-Specific Performance

§101
12.7%
-27.3% vs TC avg
§103
13.5%
-26.5% vs TC avg
§102
49.9%
+9.9% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1060 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . OFFICE ACTION Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) The claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-20 are rejected under 35 U.S.C. 102(a) (1) being anticipated by the prior art of record Hollander (US 2002/0073375) Regarding claim 1, the prior art discloses: A method comprising: receiving a description of stimuli used for functional verification of a circuit design (stimulating functionally verifying circuit design (title, abstract)), the description comprising classes of variables that include random variables RVs (i.e., types/constraints, varied randoms parameters/ values/ constraints/ fields , random sequence of choice ( see at least abstract, par 76, 231-238, 255-256); and receiving a coverage for the functional verification of the circuit design; the coverage model comprising coverage targets (abstract, summary, par 17, 68, 84-88, 95 209, 245-264, coverage targets in terms of one or more of function coverage statistics/ reports/ parameters/ points/ information/ fills/ holes, increase functional coverage ) that are functions of the variables; generating, by a processing device (computer, tool, CPU (par 10, 15, 31, 37, 131, 135, 137, 145, 269)), the stimuli for multiple iterations (see simulation feedback, test results return/ readily repeatable (par 24, 81, 104, 106, 175)) of the functional verification, comprising: maintaining context values comprising values of the RVs for the stimuli (RVs/Stimuli inherently having context such as information/ connectivity/ code/ file/ attribute/ program/ definition/ language/ expression/ values/ domain/ parameters/ constraints/ statements/ description/ names/ data structure, etc. Maintain/save/store/load/retrieve/update data/ files/ information/ values/ parameter is just an intended use of computer, tool, CPU, database, memory, library. For Applicant information, this prior art also has the means (par 10, 15, 31, 37, 131, 135, 137, 145, 269, FIG 1, 3, 6) for such intended use); randomizing values (control of the random generation process, create random instances of data structures, assign random values, choosing random values, change local constraint to support random stability (par 44-45, 69-72, 76, 229, 231, 235)) of the RVs in an individual class RVs (i.e., types/constraints, varied randoms parameters/ values/ constraints/ fields , random sequence of choice ( see at least abstract, par 76, 231-238, 255-256); and biasing the randomization values (control of the random generation process, create random instances of data structures, assign random values, choosing random values, change local constraint to support random stability (par 44-45, 69-72, 76, 229, 231, 235)) of the RVs in the individual class to hit the coverage targets given the context values for the RVs outside (see external types/software/code/program/function/ interface/ data/ streams/ compilation (abstract, par 41, 63, 101-111, 124-127, 140-141, 221) ) the individual class; and determining whether the coverage targets are hit by the generated stimuli (see fig 1-6 and related text). (Claim 2) maintaining coverage holes data indicating which coverage targets have not yet been hit by previously generated stimuli, wherein randomization of the RVs is biased to hit the unhit coverage targets based on the coverage holes data (par 85, 245, 259-260, 265) (Claim 3) wherein biasing the randomization of the RVs comprises applying temporary constraints (par 45, 72, 229, 231) to the randomization of the RVs. (Claim 4) wherein biasing the randomization of the RVs comprises temporarily modifying a probability distribution for the randomization (par 161, 209, 231, 242-243, 251). (Claim 5) wherein generating stimuli for multiple iterations of the functional verification further comprises randomizing values of the RVs one class at a time (par 45, 69-72, 169, 238, 238). (Claim 6) based on the coverage model, identifying which coverage targets depend on which RVs (par 74, 172). (Claim 7) wherein the classes are user-defined data types that encapsulate data and functions related to that data (par 44, 50, 61, 70, 113, 139, 147, 165, 188, 211-213, 231, 244) Claims 8-20 recite similar subject matter and are rejected for the same reason. For testbench to perform stages, see (abstract, par 11, 17-20, 40, 66). For Verilog constraint solver, see abstract, par 109-110, 171-175, 193-197, 226-229) Correspondence Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL DINH whose telephone number is 571-272-1890. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s Supervisor, Jack Chiang can be reached on 571-272-7483. The fax number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197(toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAUL DINH/Primary Examiner, Art Unit 2851
Read full office action

Prosecution Timeline

Aug 25, 2023
Application Filed
Jun 23, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
94%
With Interview (+4.2%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1060 resolved cases by this examiner. Grant probability derived from career allowance rate.

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