Prosecution Insights
Last updated: October 01, 2026
Application No. 18/456,093

CONNECTOR HEIGHT UNIFORMITY OVER UNDER BUMP METAL (UBM)

Final Rejection §102§103
Filed
Aug 25, 2023
Examiner
PHAM, THANHHA S
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
761 granted / 891 resolved
+17.4% vs TC avg
Minimal +5% lift
Without
With
+4.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
16 currently pending
Career history
904
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
40.1%
+0.1% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
24.8%
-15.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 891 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5, 10-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al [US 2014/0061897] ► With respect to claim 1, Lin et al (figs 1-14B, text [0001]-[0073] teaches the claimed method comprising: forming a semiconductor die having under bump metal (UBM) pads (20, fig 3C) in a dense region (110) and in an isolated region (120), wherein the UBM pads in the dense region and the UBM pads in the isolated region are on a conductive layer (16, text [0031]: metal pads 16 on first region 110 & second region 120) of the semiconductor die; forming external electrical connectors (M1 & M2, figs 3C-3D) in contact with the UBM pads; limiting the external electrical connectors to a pre-selected vertical height (fig 3D, text [0035]: vertical height of M1 & M2 is limited such that top surface of bump 28A is leveled with top surface of bump 28B). ► With respect to claim 2, Lin et al (figs 3C & 3D, text [0040]-[0045] more particularly text [0040] & [0044]: photolithography process) discloses forming openings over the UBM pads process openings to plating process of forming ; wherein forming the external electrical connectors in contact with the UBM pads comprises forming the external electrical connectors in the openings (plating process). ► With respect to claim 3, Lin et al (figs 1, 2, 3C & 3D, text [0026]) discloses wherein limiting the external electrical connectors to a pre-selected vertical height comprises: forming the UBM pads in the dense region with a first critical dimension (W₁) and forming the UBM pads in the isolated region with a second critical dimension (W₂) greater than the first critical dimension. ► With respect to claim 4. Lin et al discloses wherein limiting the external electrical connectors to a pre-selected vertical height comprises: forming the openings (text [0040]: photolithography to expose the UBM layer 20 in region 110) over the UBM pads in the dense region with a first critical dimension; and forming the openings (text [00436]: photolithography to expose the UBM layer 20 in region 120) over the UBM pads in the isolated region with a second critical dimension greater than the first critical dimension, wherein forming the external electrical connectors in contact with the UBM pads comprises forming the external electrical connectors in the openings (plating). ► With respect to claim 5, Lin et al (figs 1-2, 3C & 3D, text [0026], [0040] & [0043]) discloses wherein limiting the external electrical connectors to a pre-selected vertical height comprises: forming the UBM pads in the dense region with a first critical dimension; and forming the UBM pads in the isolated region with a second critical dimension greater than the first critical dimension. ► With respect to claim 7, Lin et al (fig 3D) discloses the pre-selected vertical height is achieved by forming the UBM pads in the isolated region with a greater lateral critical dimension than the UBM pads in the dense region. ► With respect to claim 9, Lin et al (fig 5B) discloses limiting the external electrical connectors to a pre-selected vertical height comprises reflowing the external electrical connectors to form solder spheres at a uniform height across the dense region and the isolated region. ► With respect to claim 10, Lin et al (figs 1-14B, text [0001]-[0073] discloses the claimed method comprising: determining an integrated circuit layout design, wherein the integrated circuit layout design comprises a dense region including densely arranged external electrical connectors on under bump metal (UBM) pads and an isolated region including isolated external electrical connectors on under bump metal (UBM) pads (figs 1, 2, 3C & 3D), wherein determining the integrated circuit layout design comprises providing the densely arranged external electrical connectors (M1, fig 3C) on under bump metal (UBM) pads with a first height, and wherein determining the integrated circuit layout design comprises providing the isolated external electrical connectors (M2, fig 3D) on under bump metal (UBM) pads with a second height equal to the first height; wherein determining the integrated circuit layout design comprises determining an effect on external electrical connector height resulting from a difference in UBM pad density per unit area between the dense region and the isolated region; forming the under bump metal (UBM) pads (UBM 20, fig 3C thus fig 3D, text [0039]) in the dense region and in the isolated region in accordance with the integrated circuit design; forming the external electrical connectors (M1 & M2) over the under bump metal (UBM) pads in the dense region and in the isolated region (fig 3C & 3D) ► With respect to claim 11, Lin et al (fig 3D & 2) discloses wherein determining the integrated circuit layout design comprises providing the under bump metal (UBM) pads in the dense region with a first lateral critical dimension (W1) and providing the under bump metal (UBM) pads in the isolated region with a second lateral critical dimension (W2) different from the first lateral critical dimension. ► With respect to claim 12, Lin et al discloses wherein the second lateral critical dimension (W2) is greater than the first lateral critical dimension (W1) ► With respect to claim 13, Lin et al discloses wherein determining the integrated circuit layout design comprises providing dummy under bump metal (UBM) pads (dummy UBM under dummy bump 28D) in the isolated region. Claims 1-2, 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu et al [US 2014/0167254] ► With respect to claim 1, Yu et al (figs 1-9, text [0001]-[0042]) teaches the claimed method comprising: forming a semiconductor die having under bump metal (UBM) pads (portions of UBM 20 exposed by opening 14a, fig 3B) in a dense region (110, fig 1 thus 3B, text [0010]) and in an isolated region (120, fig 1 thus 3B), wherein the UBM pads in the dense region and the UBM pads in the isolated region are on a conductive layer (16, text [0013]: metal pads 16 on first region 110 & second region 120) of the semiconductor die; forming external electrical connectors (M1 & M2, fig 3C) in contact with the UBM pads; limiting the external electrical connectors to a pre-selected vertical height (text [0015]- [0017]: vertical height of M1 & M2 is limited such that co-planarity of the bump height distribution is achieved). ► With respect to claim 2, Yu et al discloses forming openings (14a, 14b, fig 3B) over the UBM pads process openings to plating process of forming; wherein forming the external electrical connectors in contact with the UBM pads comprises forming the external electrical connectors in the openings (fig 3C) ► With respect to claim 4, Yu et al discloses wherein limiting the external electrical connectors to a pre-selected vertical height comprises: forming the openings (14a, fig 3B) over the UBM pads in the dense region with a first critical dimension; and forming the openings (14b, fig 3B) over the UBM pads in the isolated region with a second critical dimension greater than the first critical dimension wherein forming the external electrical connectors in contact with the UBM pads comprises forming the external electrical connectors in the openings. ► With respect to claim 7, Yu et al discloses the pre-selected vertical height is achieved by forming the UBM pads in the isolated region with a greater lateral critical dimension than the UBM pads in the dense region. ► With respect to claim 8, Yu et al (fig 3C) discloses the external electrical connectors in the dense region and the external electrical connectors in the isolated region are formed simultaneously. ► With respect to claim 9, Yu et al (fig 4) discloses limiting the external electrical connectors to a pre-selected vertical height comprises reflowing the external electrical connectors to form solder spheres at a uniform height across the dense region and the isolated region. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al [US 2014/0061897] or Yu et al [US 2014/0167254] as applied to claim 2 above, in further view of Wu et al [US2004/85651] ► With respect to claim 3, Lin et al and Yu et al substantially discloses the claimed method but does not expressly teach forming the external electrical connectors comprises dropping solder balls in the opening. However, Wu et al teaches dropping the solder balls (250, fig 9) in the openings 232 for forming the external electrical connectors. Therefore, it would have been obvious for those skilled the art to modify process of Lin et al or Yu et al by dropping solder ball as being claimed, per taught by Wu et al, to provide a better control process in forming the external connectors (see Wu et al, text [0018] for details). Allowable Subject Matter Claims 21-25 are allowed. 4. Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANHHA S PHAM whose telephone number is (571)272-1696. The examiner can normally be reached Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THANHHA S PHAM/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 25, 2023
Application Filed
Feb 09, 2026
Non-Final Rejection mailed — §102, §103
Feb 20, 2026
Interview Requested
Apr 02, 2026
Applicant Interview (Telephonic)
Apr 03, 2026
Examiner Interview Summary
May 08, 2026
Response Filed
Aug 13, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
90%
With Interview (+4.8%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 891 resolved cases by this examiner. Grant probability derived from career allowance rate.

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