Prosecution Insights
Last updated: April 19, 2026
Application No. 18/457,282

SEMICONDUCTOR DEVICES WITH DUMMY FILL STRUCTURES BETWEEN A THROUGH SILICON VIA AND AN ACTIVE DEVICE AND METHODS OF FORMING THE SAME

Non-Final OA §102§103
Filed
Aug 28, 2023
Examiner
SABUR, ALIA
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
83%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
424 granted / 571 resolved
+6.3% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
44 currently pending
Career history
615
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
59.3%
+19.3% vs TC avg
§102
14.7%
-25.3% vs TC avg
§112
18.7%
-21.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 571 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hu (U.S. PGPub 2022/0012402). Regarding claim 1, Hu teaches a semiconductor device (Fig. 1) comprising a through silicon via (TSV) extending through a substrate of the semiconductor device (122, [0010]), an active device in or on the substrate (106A/108A, [0012]), and a dummy region of the substrate separating the TSV and the active device, the dummy region including a plurality of dummy fill structures, wherein the dummy fill structures have a lateral dimension measured in a first direction from the TSV to the active device, wherein the lateral dimension of a first dummy fill structure is different from the lateral dimension of a second dummy fill structure in the dummy region (Fig. 1, 106D/108D, [0012], [0016]; Fig. 4, [0018], [0027], L4, lateral dimension B). Regarding claim 6, Hu teaches wherein at least some of the dummy fill structures include a metallic material (Fig. 1, 108A; Fig. 5, 208, [0029]-[0031]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Hu (U.S. PGPub 2022/0012402) in view of Yu (U.S. PGPub 2013/0001793). Regarding claim 7, Hu does not explicitly teach stress-relief structures in the substrate surrounding the through silicon via, wherein the stress-relief structures have second lateral dimensions in the first direction that are greater than the lateral dimensions of the dummy fill structures. Hu teaches wherein the lateral dimensions of the dummy fill structures are 50nm-500 um ([0027]). Yu teaches stress-relief structures in a substrate surrounding a through silicon via (Fig. 4a, 450, [0040]), wherein the stress-relief structures have a of about 100 nm to 5 um ([0034]). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05. Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Yu with Hu such that the device comprises stress-relief structures in the substrate surrounding the through silicon via, wherein the stress-relief structures have second lateral dimensions in the first direction that are greater than the lateral dimensions of the dummy fill structures for the purpose of alleviating stress between the TSV and substrate (Yu, [0003]-[0004]). Allowable Subject Matter Claims 8-20 are allowed. Claims 2-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding independent claims 8, 15, and dependent claim 2, the prior art, alone or in combination does not teach the dummy fill structures decreasing in the first direction (from the TSV to the active region) from a maximum lateral dimension to a minimum lateral dimension. Tsai (U.S. PGPub 2012/0295187) teaches wherein dummy patterns are arranged in a gradient between device regions, wherein the sizes of the dummy fill structures in each sub-region of the dummy region are chosen according to the difference in density between adjacent device regions (Fig. 1, [0040], [0047], [0008]), but does not address how the dummy structures should be arranged adjacent to a TSV structure. Lee (U.S. PGPub 2022/0013502) teaches dummy regions with different densities of dummy pads surrounding an active region (Fig. 2, [0027]). Gandhi (U.S. PGPub 2016/0225695) teaches a TSV with dummy structures to prevent dishing ([0012], Fig. 1A). Prior art alone or in combination fails to teach or suggest every limitation of the invention as claimed. Claims 3-5, 9-14, 16-20, depend from claims 2, 8, and 15 and are therefore correspondingly allowable. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALIA SABUR whose telephone number is (571)270-7219. The examiner can normally be reached M-F 9:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALIA SABUR/ Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 28, 2023
Application Filed
Nov 15, 2025
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604633
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12598899
DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12593602
DISPLAY PANEL, MANUFACTURING METHOD AND ELECTRONIC DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12588243
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12575268
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
83%
With Interview (+8.4%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 571 resolved cases by this examiner. Grant probability derived from career allow rate.

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