Prosecution Insights
Last updated: July 17, 2026
Application No. 18/457,523

REINFORCEMENT STRUCTURES FOR MULTI-DIE SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME

Final Rejection §103
Filed
Aug 29, 2023
Examiner
PARTHASARATHY, ROHIT
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
32 granted / 35 resolved
+23.4% vs TC avg
Moderate +12% lift
Without
With
+12.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
20 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§103
90.2%
+50.2% vs TC avg
§102
2.4%
-37.6% vs TC avg
§112
4.9%
-35.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 35 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed 3/25/2026 has been entered. Claims 1, 4-11, 14-17, and 19-25 remain pending in the application. Applicant’s amendment of Claim 14 has overcome the objection to this claim. Thus, Examiner is withdrawing the objection to Claim 14. Response to Arguments Regarding Claims 1 and 17, Examiner finds Applicant’s arguments persuasive. Thus, Examiner is withdrawing the 102a1 rejections of these claims. Please see Election/Restriction sections for information on rejoinder of some of the withdrawn claims. Regarding Claim 11, Examiner finds Applicant’s arguments unpersuasive. Applicant argues that because chips 130 and 140 in Lee have different lengths, Lee cannot read on the corresponding limitation in the amended claim. However, there is another chip in Lee, 150, that does have the same width and length as chip 140. Please see the 103 rejection below for the details of the rejection of this claim. Election/Restrictions Claims 1 and 17 are allowable. The restriction requirement has been reconsidered in view of the allowability of claims to the elected invention pursuant to MPEP § 821.04(a). The restriction requirement is hereby withdrawn as to any claim that requires all the limitations of an allowable claim. Specifically, the restriction requirement of 11/20/2025 is partially withdrawn. Claims 6, 8-10, and 19-20, are no longer withdrawn from consideration because the claims requires all the limitations of an allowable claim. However, claims 15-16 are withdrawn from consideration because 15-16 do not require all the limitations of an allowable claim. In view of the above noted withdrawal of the restriction requirement, applicant is advised that if any claim presented in a divisional application is anticipated by, or includes all the limitations of, a claim that is allowable in the present application, such claim may be subject to provisional statutory and/or nonstatutory double patenting rejections over the claims of the instant application. Once a restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01. Claim Rejections - 35 USC § 103 Claims 11, 14, and 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over US20210384096A1 (Lee). Regarding Claim 11, Lee discloses a semiconductor package (Figs. 1 and 2A, el. 300, Paras. [0028] and [0040]), comprising: a package substrate (Fig. 1, el. 100, Para. [0029]); a first semiconductor die (Fig. 2A, el. 140, Para. [0029]) electrically and mechanically couples to the package substrate (Para. [0029]); a second semiconductor die (Fig. 2A, el. 150, Para. [0029]) electrically and mechanically coupled to the package substrate (Para. [0029]); an underfill material formed between a top surface of the package substrate and bottom surfaces of the first semiconductor die (Fig. 2A, el. 119, Para. [0051]); and a reinforcement structure (Fig. 1, el. 160, Para. [0035] – note that 160 is in G3, which is the space between 140 and 150) formed in a vertical space between the first semiconductor die and the second semiconductor die (Figs. 1, el. 160 formed in space G3, Para. [0035]), wherein a first length of the reinforcement structure is substantially equal to a second length of the first semiconductor die and the second semiconductor die (Fig. 1, Para. [0032] – where the width and length of 140 and 150 are the same). Lee does not disclose that the underfill material is under the second semiconductor die. However, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to use underfill material under the second semiconductor die. First, Lee discloses underfill material under die 130 and 140, so it can be inferred that the undefill material can be used under 150. Second, it is well known that adding underfill material under a die adds to the structural integrity of the package configuration. Regarding Claim 14, Lee discloses the semiconductor package of claim 11, wherein the reinforcement structure is coupled to a first vertical surface of the first semiconductor die and to a second vertical surface of the second semiconductor die (Figs. 1 and 2A, Para. [0035]). Regarding Claim 23, Lee discloses the semiconductor package of Claim 11, wherein the reinforcement structure is formed only in a central portion of the semiconductor package (Para. [0029] discloses that the semiconductor package has at least two chips. When the chips are only 140 and 150, with 130 absent, G3 will be in the central portion and 160 will only be in the central portion). Regarding Claim 24, Lee discloses the semiconductor package of claim 11, wherein the underfill material formed between the top surface of the package substrate and the bottom surfaces of the first semiconductor die forms a first portion of underfill material that is separate from the underfill material formed between the top surface of the package substrate and bottom surfaces of the second semiconductor die that forms a second portion. (Fig. 2A shows that the underfill material 113 is separated from the underfill material 119. The same idea would apply to the underfill material between 140 and 150). Allowable Subject Matter Claims 1, 4-10, 17, 19-22, and 25 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 1, none of the prior art of record teaches, suggests or renders obvious, either alone or in combination the limitation wherein the reinforcement structure comprises a polymer matrix composite material having a greater modulus than the underfill material. Claims 4-10 and 21-22 are allowed because of their dependency on claim 1. Regarding Claim 17, none of the prior art of record teaches, suggests or renders obvious, either alone or in combination the limitation wherein the reinforcement structure comprises a polymer matrix composite material having a greater modulus than the underfill material. Claims 17, 19-20 and 25 are allowed because of their dependency on claim 17. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHIT PARTHASARATHY whose telephone number is (571)272-2572. The examiner can normally be reached Monday-Friday 8:30a-5p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Aug 29, 2023
Application Filed
Dec 19, 2025
Non-Final Rejection mailed — §103
Mar 25, 2026
Response Filed
Jun 02, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+12.0%)
3y 2m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 35 resolved cases by this examiner. Grant probability derived from career allowance rate.

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