DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-14, 20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites a method of forming a semiconductor device, the method comprising:
forming a first structure, wherein forming the first structure comprises: forming a metal layer over a substrate;
forming a dielectric layer over the metal layer;
etching a trench in the dielectric layer, wherein the trench extends from a top surface of the dielectric layer down to at least a top surface of the metal layer; filling the trench with a copper-containing material; and
selectively depositing a dielectric film on the first structure, the dielectric film overlaying the dielectric layer and not overlaying the copper-containing material, the dielectric film having a dielectric constant greater than about 7.
The phrase “the trench extends from a top surface of the dielectric layer down to at least a top surface of the metal layer” is not clearly defining the depth of the trench. The phase “greater than about 7” is not claiming a distinct range of the dielectric constant.
For purpose of examination on the merits, Claim 1 is interpreted to recite a method of forming a semiconductor device, the method comprising:
forming a first structure, wherein forming the first structure comprises: forming a metal layer over a substrate;
forming a dielectric layer over the metal layer;
etching a trench in the dielectric layer, wherein the trench extends from a top surface of the dielectric layer down to a top surface of the metal layer or deeper; filling the trench with a copper-containing material; and
selectively depositing a dielectric film on the first structure, the dielectric film overlaying the dielectric layer and not overlaying the copper-containing material, the dielectric film having a dielectric constant greater than or equal to 7.
Claim 2 recites the method of claim 1, further comprising contacting the first structure with one or more slurries and one or more platens, wherein the one or more slurries and one or more patterns remove a portion of the copper-containing material and a second portion of the dielectric layer.
The word “patterns” should be replaced with platens.
For purpose of examination on the merits, Claim 1 is interpreted to recite the method of claim 1, further comprising contacting the first structure with one or more slurries and one or more platens, wherein the one or more slurries and one or more platens remove a portion of the copper-containing material and a second portion of the dielectric layer.
Claim 3 recites the method of claim 2, wherein contacting the first structure with the one or more slurries recesses the dielectric layer a distance of greater than or about 5 nm from a top surface of the copper-containing material.
The phase “greater than or about 5 nm” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 3 is interpreted to recite the method of claim 2, wherein contacting the first structure with the one or more slurries recesses the dielectric layer a distance of greater than or equal to 5 nm from a top surface of the copper-containing material.
Claim 7 recites the method of claim 5, wherein depositing the monolayer is performed at a temperature below 200-250 Celsius.
The phase “temperature below 200-250 Celsius” is not claiming a distinct range of the temperature.
For the purpose of examination on the merits, Claim 7 is interpreted to recite the method of claim 5, wherein depositing the monolayer is performed at a temperature 250 Celsius or below.
Claim 8 recites the method of claim 5, wherein removing the monolayer is performed at a temperature above 200-250 Celsius.
The phase “temperature above 200-250 Celsius” is not claiming a distinct range of the temperature.
For the purpose of examination on the merits, Claim 8 is interpreted to recite method of claim 5, wherein removing the monolayer is performed at a temperature is 250 Celsius or above.
Note: The dependent claims necessarily inherit the indefiniteness of the claims on which they depend.
Claim 9 recites the method of claim 1, further comprising: contacting the first structure with a hydrogen-containing precursor;
contacting the first structure with a second structure, the second structure comprising: a second metal layer overlaying a second substrate;
a second dielectric layer overlaying the second metal layer and defining a second set of one or more features in the second dielectric layer;
a second dielectric film overlaying the second dielectric layer, the second dielectric film having a second dielectric constant greater than about 7; and
a second copper-containing material deposited within the second set of one or more features; and
bonding the first structure to the second structure, wherein the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure, wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure.
The phase “greater than about 7” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 9 is interpreted to recite the method of claim 1, further comprising: contacting the first structure with a hydrogen-containing precursor;
contacting the first structure with a second structure, the second structure comprising: a second metal layer overlaying a second substrate;
a second dielectric layer overlaying the second metal layer and defining a second set of one or more features in the second dielectric layer;
a second dielectric film overlaying the second dielectric layer, the second dielectric film having a second dielectric constant greater than or equal to 7; and
a second copper-containing material deposited within the second set of one or more features; and
bonding the first structure to the second structure, wherein the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure, wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure.
Claim 11 recites a method of forming a semiconductor device, the method comprising: forming a first structure, wherein forming the first structure comprises: forming a metal layer over a substrate;
forming a barrier film over the metal layer, the barrier film having a dielectric constant of less than or about 5;
forming a tetraethyl orthosilicate layer over the barrier film;
etching a trench in the tetraethyl orthosilicate layer and the barrier film, wherein the trench extends from a top surface of the tetraethyl orthosilicate layer down to at least a top surface of the metal layer; forming a liner in the trench; and
filling the trench with a copper-containing material; and
selectively depositing a dielectric film on the first structure, the dielectric film overlaying the tetraethyl orthosilicate layer and not overlaying the copper-containing material, the dielectric film having a second dielectric constant greater than about 7.
The phrase “the trench extends from a top surface of the tetraethyl orthosilicate layer down to at least a top surface of the metal layer” is not clearly defining the depth of the trench. The phase “less than about 5” is not claiming a distinct range of the dielectric constant. The phase “greater than about 7” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 11 is interpreted to recite a method of forming a semiconductor device, the method comprising: forming a first structure, wherein forming the first structure comprises: forming a metal layer over a substrate;
forming a barrier film over the metal layer, the barrier film having a dielectric constant of less than or equal to 5;
forming a tetraethyl orthosilicate layer over the barrier film;
etching a trench in the tetraethyl orthosilicate layer and the barrier film, wherein the trench extends from a top surface of the dielectric layer down to a top surface of the metal layer or deeper; forming a liner in the trench; and
filling the trench with a copper-containing material; and
selectively depositing a dielectric film on the first structure, the dielectric film overlaying the tetraethyl orthosilicate layer and not overlaying the copper-containing material, the dielectric film having a second dielectric constant greater than or equal to 7.
Claim 12 recites the method of claim 11, further comprising: contacting the first structure with a hydrogen-containing precursor;
contacting the first structure with a second structure, the second structure comprising: a second metal layer overlaying a second substrate;
a second barrier film over the second metal layer, the second barrier film having a third dielectric constant of less than or about 5, the second barrier film defining a second set of one or more features;
a second tetraethyl orthosilicate layer over the second barrier film, the second tetraethyl orthosilicate layer further defining the second set of one or more features; a second dielectric film overlaying the second tetraethyl orthosilicate layer, the second dielectric film having a fourth dielectric constant greater than about 7, the second dielectric film further defining the second set of one or more features; and
a second copper-containing material deposited within the second set of one or more features; and
bonding the first structure to the second structure, wherein the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure, wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure.
The phase “less than about 5” is not claiming a distinct range of the dielectric constant. The phase “greater than about 7” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 12 is interpreted to recite the method of claim 11, further comprising: contacting the first structure with a hydrogen-containing precursor;
contacting the first structure with a second structure, the second structure comprising: a second metal layer overlaying a second substrate;
a second barrier film over the second metal layer, the second barrier film having a third dielectric constant of less than or equal to 5, the second barrier film defining a second set of one or more features;
a second tetraethyl orthosilicate layer over the second barrier film, the second tetraethyl orthosilicate layer further defining the second set of one or more features; a second dielectric film overlaying the second tetraethyl orthosilicate layer, the second dielectric film having a fourth dielectric constant greater than or equal to 7, the second dielectric film further defining the second set of one or more features; and
a second copper-containing material deposited within the second set of one or more features; and
bonding the first structure to the second structure, wherein the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure, wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure.
Claim 14 recites the method of claim 12, wherein the second dielectric constant is greater than about 8, wherein the fourth dielectric constant is greater than 8.
The phase “greater than about 8” is not claiming a distinct range of the dielectric constant. The phase “greater than about 8” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 14 is interpreted to recite the method of claim 12, wherein the second dielectric constant is greater than 8, wherein the fourth dielectric constant is greater than 8.
Claim 15 recite a semiconductor device for hybrid bonding, the semiconductor device comprising: a first structure comprising: a metal layer overlaying a substrate;
a dielectric layer overlaying the metal layer and defining a set of one or more features recessed in the dielectric layer;
a dielectric film overlaying the dielectric layer, the dielectric film having a dielectric constant greater than about 7; and
a copper-containing material deposited within the set of one or more features.
The phase “greater than about 7” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 15 is interpreted to recite a semiconductor device for hybrid bonding, the semiconductor device comprising: a first structure comprising: a metal layer overlaying a substrate;
a dielectric layer overlaying the metal layer and defining a set of one or more features recessed in the dielectric layer;
a dielectric film overlaying the dielectric layer, the dielectric film having a dielectric constant greater than or equal to 7; and
a copper-containing material deposited within the set of one or more features.
Claim 16 recites the semiconductor device of claim 15, further comprising: a second structure comprising: a second metal layer overlaying a second substrate;
a second dielectric layer overlaying the second metal layer and defining a second set of one or more features;
a second dielectric film overlaying the second dielectric layer, the second dielectric film having a second dielectric constant greater than about 7, the second dielectric film furthering defining the set of one or more features; and
a second copper-containing material deposited within the second set of one or more features; and
wherein the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure, wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure.
The phase “greater than about 7” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 16 is interpreted to recite the semiconductor device of claim 15, further comprising: a second structure comprising: a second metal layer overlaying a second substrate;
a second dielectric layer overlaying the second metal layer and defining a second set of one or more features;
a second dielectric film overlaying the second dielectric layer, the second dielectric film having a second dielectric constant greater than or equal to 7, the second dielectric film furthering defining the set of one or more features; and
a second copper-containing material deposited within the second set of one or more features; and
wherein the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure, wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure.
Claim 17 recites the semiconductor device of claim 15, wherein the dielectric constant is greater than about 8.
The phase “greater than about 8” is not claiming a distinct range of the dielectric constant.
For the purpose of examination on the merits, Claim 17 is interpreted to recite the semiconductor device of claim 15, wherein the dielectric constant is greater than or equal to 8.
Claim 20 recite the semiconductor device of claim 15, wherein the copper-containing material is characterized by a dish profile having a dish depth of less than or about 1 nm.
The phase “having a dish depth of less then or about 1nm” is not claiming a distinct range of depth.
For the purpose of examination on the merits, Claim 20 is interpreted to recite the semiconductor device of claim 15, wherein the copper-containing material is characterized by a dish profile having a dish depth of less than or equal to 1 nm.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 15-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Uzoh (US20200051937A1) in view of Nyhus (US20150093702A1).
With respect to Claim 15, Fig 1 of Uzoh teaches a semiconductor device for hybrid bonding, the semiconductor device comprising:
a first structure (102; Fig 1; ¶ [0026]) comprising:
a dielectric layer (106; Fig 1; ¶ [0028]) and defining a set of one or more features recessed in the dielectric layer (106; Fig 1; ¶ [0028]); and
a copper-containing material deposited within the set of one or more features (110; Fig 1; ¶ [0029]).
Uzoh does not teach a metal layer overlaying a substrate; and
a dielectric film overlaying the dielectric layer, the dielectric film having a dielectric constant greater than about 7
In the same field of endeavor, Fig 2 of Nyhus teaches a metal layer (102; Fig 2(d); ¶ [0029]) overlaying a substrate; and
a dielectric film overlaying the dielectric layer (112; Fig 2(d); ¶ [0036]), the dielectric film having a dielectric constant greater than about 7 (¶ [0036]; hardmask materials are often made of inorganic dielectric materials such as silicon oxide or silicon nitride which have a general dielectric range of 7-9)
It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine the invention from the prior art of Uzoh, a semiconductor die device with conductive interconnecting structures composed of a dielectric layer with trenches filled with a conductive copper-containing material and the invention from the prior art of Nyhus, a semiconductor die device made of interconnecting structures with a metal layer on the substrate surface and a dielectric film on the surface of the dielectric trenches. The combination in inventions would produce a design for a semiconductor die device with a metal layer over the substrate surface connected to the copper-containing filing material between the dielectric trenches allowing for electrons to move across the surface of the substrate in the metal layer, parallel between the trench features and between dies that are bonded together on opposite facing substrates Nyhus (¶ [0029]); underlying vias). A dielectric film on the surface of the dielectric layer would be used to selectively shield the dielectric material surface during the patterning process to form the trenches and fill the trenches with the copper-containing material Nyhus (¶ [0034]).
With respect to Claim 16, Uzoh and Nyhus in combination teach the semiconductor device of claim 15.
Fig 2 of Uzoh teaches a second dielectric layer (106; Fig 2(E); ¶ [0058]) defining a second set of one or more features (106; Fig 2(E); ¶ [0058]);
a second copper-containing material deposited within the second set of one or more features (110; Fig 2(E); ¶ [0057]); and
where in the dielectric film of the first structure is hybrid bonded to the second dielectric film of the second structure (¶ [0057]), wherein the copper-containing material of the first structure contacts the second copper-containing material of the second structure (¶ [0057]).
Uzoh does not teach a second metal layer overlaying a second substrate;
a second dielectric film overlaying the second dielectric layer, the second dielectric film having a second dielectric constant greater than 7
In the same field of endeavor Fig 2 of Nyhus teaches a second metal layer (102; Fig 2(c); ¶ [0029]) overlaying a second substrate;
a second dielectric film (112; Fig 2(d); ¶ [0036]) overlaying the second dielectric layer, the second dielectric film having a second dielectric constant greater than about 7 (¶ [0036]; hard mask materials are often made of inorganic dielectric materials such as silicon oxide or silicon nitride which have a general dielectric range of 7-9)
It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine the invention from the prior art of Uzoh, a semiconductor die device with conductive interconnecting structures composed of a dielectric layer with trenches filled with a conductive copper-containing materials and the invention from the prior art of Nyhus, a semiconductor die device made of interconnecting structures with a metal layer on the substrate surface and a dielectric film with a dielectric constant greater than 7 on the surface of the dielectric. The combination in inventions would produce a design for a semiconductor die device with the metal layer over the substrate surface in contact with the copper-containing filling material between the dielectric trenches allowing for electrons to move across the surface of the substrate in the metal layer, parallel between the trench features, between dies that are bonded together on opposite facing substrates and across to the metal layer on the substrate surface of the opposite structure Nyhus (¶ [0029]); underlying vias). Also, the dielectric film acts as a mask with an etch selectivity different from the underlying dielectric layer or metal layer during and after etching (Nyhus (¶ [0034])).
With respect to Claim 17, Uzoh and Nyhus in combination teach the semiconductor device of claim 15.
Nyhus does not teach wherein the dielectric constant is greater than or equal to 8.
Uzoh teaches in ¶ [0028] the dielectric constant is greater than or equal to 8. (¶ [0028]; the dielectric material layers mentioned have dielectric constants ranges greater than 8 such as oxide, nitride, oxynitride, polysilicon and glasses).
It would be obvious to one with ordinary skill in the art to combine the invention of Uzoh, a method to fabricate a semiconductor device comprising stacked dies of substrates with inorganic dielectric thin films with recess features filled with copper containing material, and the invention of Nyhus, a semiconductor structure comprising dielectric layers with recesses deposited on metal thin films and semiconductor substrates. The combination produces stacked dies with dielectric thin films, with at least an 8 dielectric constant, to have a large difference in conductivity compared to the copper containing filling material, allowing for the electrical current not to leak into the dielectric material. These continuous conductive interconnects with low leakage into the dielectric are used to for signals and power (Uzoh ¶ [0029]).
With respect to Claim 20, Uzoh and Nyhus in combination teach the semiconductor device of claim 15.
Nyhus does not teach the copper-containing material is characterized by a dish profile having a dish depth of less than or equal to 1 nm.
Uzoh teaches in Fig 2 the copper-containing material is characterized by a dish profile having a dish depth of less than or equal to 1 nm (110; Fig 2(B); ¶ [0034]); preselected depth “d1” can include 1 nm or less).
It would be obvious to one with ordinary skill in the art to combine the invention of Uzoh, the method to fabricate a semiconductor device comprising dielectric thin films with trenches filled with copper containing material having a dish profile, and the invention of Nyhus, the structure of a semiconductor device comprising dielectric layers with trenches deposited on a metal layer and a semiconductor substrate. Cooper having a dishing profile of a preselected depth may be intentionally formed in the surface of a conductive feature, to prepare the feature for low temperature bonding techniques (Uzoh ¶ [0034]). First metallic interconnect structures may be bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, which make use of the recesses in one or both of the first and second interconnect structures (Uzoh ¶ [0016]).
With respect to Claim 18, Uzoh and Nyhus in combination teach claim 15.
Uzoh and Nyhus in combination do not teach the dielectric film has a thickness of 5nm.
However, the ordinary artisan would have recognized the thickness of the dielectric films to be a result effective variable affecting the depth and resolution of the trench features in the barrier film and copper-containing material filling of the die. Thus, it would have been obvious to select a dielectric film thickness within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Uzoh et al (US20200051937A1) and in view of Nyhus et al (US20150093702A1) as applied to claim 18 above, and further in view of Wang (Nanopore patterning using Al2O3 hard masks on SOI substrates. Journal of micromechanics and microengineering-2015).
With respect to Claim 19, Uzoh and Nyhus in combination teach claim 15.
Uzoh and Nyhus in combination do not teach the dielectric film is Al2O3.
In the same field of endeavor Section 2 and Section 3 of Wang teach the dielectric film is A12O3. (Section 2 ¶ [1] and Section 3 ¶ [1])
It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine the invention from the prior art of Uzoh, a semiconductor die device with conductive interconnecting structures composed of a dielectric layer with trenches filled with a conductive copper-containing material, and the invention from the prior art of Nyhus, a semiconductor die device made of interconnecting structures with a metal layer on the substrate surface and a dielectric film on the surface of the dielectric and prior art of Wang, using Al2O3 as a hard mask to modify a dielectric substrate surface with a nanopattern using dry etching. The combination in inventions would be a design for a semiconductor die device that uses a Al2O3 as a dielectric film (hard mask) to use as a template to selectively pattern the surface of the die substrate during the etching and copper-containing material filling process. (Wang (Section 3 ¶ [1]))
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure:
Ellinger (US8927434B2); This reference teaches a method to fabricate a thin film dielectric stack on a conductive material.
Kawamura (US20130230981A1); This reference teaches a method to form a semiconductor device with a metal layer, a dielectric layer and an underlaying layer modified by light rays.
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/B.Q.R./Examiner, Art Unit 2817
/RATISHA MEHTA/Primary Examiner, Art Unit 2817