DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicants’ amendment to claim 4, see page 6, filed 08/17/2026, has been reviewed. The objection of claim 4 has been withdrawn.
The examiner appreciates applicant’s remarks on the inventive concept which states, “the above portions of Applicant's specification describe the discovery that "real space transfer (RST) noise associated with a portion of the mobile charge carriers being thermionically emitted out of the channel into the barrier when the VSD is applied" can be suppressed for appropriate selection of the offset between the conduction band of the channel and the conduction band of the barrier.”
However, Applicant's arguments filed 08/17/2026 have been fully considered but are not persuasive. The applicant’s discovery at this time does not convince the examiner of a new/inventive concept or an unexpected result.
The applicant’s argument on the rejection of claim 1 states, “Takahashi, on the other hand, merely describes the noise of the drain current, and that the barrier layer is InAlAs that lattice-matches with the InP substrate used as the substrate , see paragraph [0073]). The above portions of Applicant's specification, however, indicates that such an Al (0.48) content for lattice matching leads to the offset AEc of around 0.5 eV - which does not suppress "real space transfer noise ... by at least a factor of two as compared to a HEMT where the alloy composition of the barrier is lattice matched," as recited in Applicant's claim 1.”
The examiner uses Takahashi as disclosing the same device, layers within the device and materials for reducing drain noise. Per the applicant’s disclosure, “[0015] Theoretical and experimental evidence of the physical mechanisms for the origin of drain noise can be provided in terms of thermal and real-space transfer (RST) noise” which leads the examiner to believe drain noise is directly associated to RST noise. If Takahashi discloses a similar device that reduces drain noise, the examiner believes RST noise could also be suppressed through routine optimization of the channel and barrier material concentrations.
For sake of the applicant’s argument, the examiner updated the search on the inventive concept as mentioned in the remarks and came across several prior art which discloses a similar discovery. For example:
Inoue et al. (JP-2011210750 A) discloses, “As shown in FIG. 13, it can be seen that as the Al composition ratio y of the barrier layer 605 increases, the carrier concentration accumulated in the channel layer 603 increases and the carrier concentration accumulated in the cap layer 606 decreases. This is because an increase in the Al composition ratio of the barrier layer increases the conduction band offset at the interface with the barrier layer and increases the polarization electric field generated in the barrier layer, thereby improving carrier confinement in the channel layer.”
Hudait et al. (US 20090315018 A1) discloses, “Thus, the benefits of the embodiments of the present invention include, but are not limited to, forming a bridge lattice constant between the substrate and a channel structure of a HEMT device, providing a large conduction band offset between a bottom barrier, InAlAs and the channel structure such as InGaAs, and providing device isolation and eliminating parallel conduction from the buffer layer to the channel layer due to the larger bandgap (GaAlAsSb and InAlAs layers) buffer layers. The buffer architecture of the embodiments of the present invention serves to lower parasitic resistances. Additionally, the buffer architecture serves as bottom barrier for carrier confinement inside the InGaAs quantum well structure” per paragraph [0034].
The examiner believes, “Real Space Transfer (RST) noise” is a term which describes a known phenomenon and therefore in view of the prior art listed above, someone ordinarily skilled in the art could adjust the material concentrations of the channel and barrier layers and demonstrate the applicant’s inventive concept. Therefore, the rejection holds for now. The examiner invites the applicant’s representative for an interview to discuss any potential new amendments or additional clarity not mentioned in the applicant’s arguments/remarks.
The applicant’s arguments on the rejection of claim 2, “The offset between the first conduction band and the second conduction band in Takahashi (0.5 eV) is not in a range of 0.6 - 1.0 eV as recited in claim 2.”
The applicant’s arguments on the rejection of claim 4, “The Al content of the InAlAs in Takahashi is 0.48 and therefore Takahashi does not describe the Al content of the InAlAs barrier is greater than 0.55 as recited in claim 4.”
The applicant’s argument regarding claim 5, “Takahashi does not describe that applicant's claimed Al range is a result effective variable for reducing RST noise, therefore Applicant's claimed range cannot be obvious or optimized from routine experimentation as asserted by the Office Action.”
Regarding claims 2, 4, and 5, per the MPEP 2144.05, “a prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of "having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium" as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium. "The proportions are so close that prima facie one skilled in the art would have expected them to have the same properties)” and therefore, the examiner is not convinced there is an unexpected result since general conditions of a claim are disclosed in the prior art.
The applicant’s arguments regarding claim 6, “Takahashi paragraph 73 describes lattice matching, and therefore does not describe "the transistor is grown on a buffer on InP and the barrier is strained with respect to the InP or the transistor is grown on a graded buffer layer whose final composition is Ino.52A1o.48As," as recited in claim 6.”
In view of additional prior art mentioned above (only used to support the examiner position), It is not a new concept to use a lattice mismatch for advantages mentioned in the applicant’s disclosure/arguments.
Election/Restrictions
Claims 11-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi (US 20180061973 A1) in view of Chang et al. (US 20150236109 A1).
Regarding claim 1, Takashi discloses a high electron mobility transistor (HEMT), comprising:
a channel (4) comprising a first semiconductor alloy (INGaAs) comprising a first conduction band energy (Fig. 2); ([0039], Fig. 1-2)
a barrier (5) comprising a second semiconductor alloy (InAlAs) comprising a second conduction band energy (Fig. 2), wherein
an offset between the first conduction band energy and the second conduction band energy confines mobile charge carriers in the channel (4); ([0051], Fig. 1-2)
a drain contact (9) to the channel (4);
a source contact (8) to the channel (4);
and a gate contact (10) coupled to the channel (4)
the first semiconductor alloy (InGaAS) comprises a first alloy composition and the second semiconductor alloy (InAlAs) comprises a second alloy composition selected so that the offset is increased to a level that suppresses real space transfer noise (drain noise) associated with a portion of the mobile charge carriers (electrons) being thermionically emitted out of the channel (4) into the barrier (5) when the VSD is applied,
Takashi does not explicitly disclose:
wherein the RST noise is reduced by at least a factor of two as compared to a HEMT where the alloy composition of the barrier is lattice matched.
However, Takashi discloses:
“[0052] According to the compound semiconductor device 1, since impurities are not doped in the channel layer 4 as described above, the mobility of the electrons in the channel layer 4 is expected to not decrease due to the impurity scattering. Thus, the noise of drain current is also expected to be reduced.”
Therefore, it would have bene obvious to one skilled in the art before the effective filing date to use the teachings of Takashi for wherein the RST noise is reduced by at least a factor of two as compared to a HEMT where the alloy composition of the barrier is lattice matched as a consequence of the chosen materials being used in order to have a high electron mobility transistor (HEMT) having advantages of low noise and high-speed operation. (Takashi, [0003])
Takashi does not explicitly disclose:
and modulating a current, comprising mobile charge carriers confined in the channel flowing in response to a voltage VSD applied between the source contact and the drain contact, when an RF signal electric field and DC bias electric field are applied between the gate contact and the source contact.
However, Chang discloses:
“it is an object of the present invention to provide a gate structure, which is applied for an electronic component comprising a substrate and an active region defined thereon,“ and “The fabricated devices having a T-shaped gate structure described as above has been demonstrate excellent DC and RF characteristics that benefited from the reduction of parasitic resistance/capacitance and improvement of the channel aspect ratio and output conductance.”
Therefore it would have been obvious to one skilled in the art before the effective filing date to use the teachings of Takashi and Chang for the gate modulating a current, comprising mobile charge carriers confined in the channel flowing in response to a voltage VSD applied between the source contact and the drain contact, when an RF signal electric field and DC bias electric field are applied between the gate contact and the source contact as inherent to the device operation and conventional explanation for how a standard HEMT works.
Regarding claim 2, Takashi discloses the transistor of claim 1. Takashi does not explicitly disclose wherein the offset between the first conduction band and the second conduction band is in a range of 0.6 - 1.0 eV.
However, Takashi discloses a diagram illustrating the energy band structure of the compound semiconductor device 1. (Fig. 2 and some mentioning of bandgap in [0090])
Therefore, it would have been obvious to one skilled in the art before the effective filing date to use the teachings of Takashi for the offset between the first conduction band and the second conduction band is in a range of 0.6 - 1.0 eV in order to “allowing the mobility of the electrons in the channel layer 4 to be maintained at a high value”. (Takashi, [0042])
Regarding claim 3, Takashi Fig. 1 discloses the transistor of claim 1. Takashi Fig. 1 does not disclose wherein the channel comprises GaN and the barrier comprises AlGaN.
However, Takashi Fig. 14 discloses the channel (22) comprises GaN and the barrier (23) comprises AlGaN. ([0180]-[0182], Fig. 14)
It would have been obvious to one skilled in the art before the effective filing date to use the teachings of Takashi Fig. 14 for the channel comprises GaN and the barrier comprises AlGaN since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 4, Takashi discloses a high electron mobility transistor (HEMT), comprising: a channel (4) comprising InGaAs comprising a first conduction band energy; (Fig. 2)
an barrier (5) comprising a InAlAs comprising a second conduction band energy; (Fig. 2)
wherein an Al content of the InAlAs barrier is greater than 0.55;
a drain contact (9) to the channel (4); (Fig. 1)
a source contact (8) to the channel (4); (Fig. 1) and
a gate contact (10) coupled to the channel (4), (Fig. 1)
Takashi does not disclose:
and modulating a current, comprising mobile charge carriers confined in the channel flowing in response to a voltage VSD applied between the source contact and the drain contact, when an RF signal electric field and DC bias electric field are applied between the gate contact and the source contact.
However, Chang discloses:
“it is an object of the present invention to provide a gate structure, which is applied for an electronic component comprising a substrate and an active region defined thereon,“ and “The fabricated devices having a T-shaped gate structure described as above has been demonstrate excellent DC and RF characteristics that benefited from the reduction of parasitic resistance/capacitance and improvement of the channel aspect ratio and output conductance.”
Therefore it would have been obvious to one skilled in the art before the effective filing date to use the teachings of Takashi and Chang for the gate modulating a current, comprising mobile charge carriers confined in the channel flowing in response to a voltage VSD applied between the source contact and the drain contact, when an RF signal electric field and DC bias electric field are applied between the gate contact and the source contact as inherent to the device operation and conventional explanation for how a standard HEMT works.
Regarding claim 5, Takashi discloses the transistor of claim 4. Takashi does not explicitly disclose wherein the Al content is in a range of 0.55-0.8.
However, it would have been obvious to one skilled in the art before the effective filing date to use the teachings of Takashi for the Al content is in a range of 0.55-0.8 with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious).
Regarding claim 6, Takashi discloses the transistor of claim 3, wherein: the transistor (1) is grown on a buffer (21) on InP (2) and the barrier (21) is strained (per [0037]) with respect to the InP (2)and the buffer (21) comprises a uniform composition of Ino.52Alo.48As, ([0073], Fig.1) (the examiner is treating the limitation past “or” as optional) or the transistor is grown on a graded buffer layer whose final composition is Ino.52A10.48As.
Regarding claim 7, Chang discloses the transistor of claim 1 , wherein the transistor has a microwave noise temperature at 6 GHz of at least 7K (upper limit of 14K) for VSD in a range of 0.1-1.2 V and Tph of 300K, when the transistor is optimally noise matched to a 50 Ohm load and the RF signal electric field is 1-20 GHz. ([0035]-[0037])
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Takashi and Chang for the transistor has a microwave noise temperature at 6 GHz of at least 7K (upper limit of 14K) for VSD in a range of 0.1-1.2 V and Tph of 300K, when the transistor is optimally noise matched to a 50 Ohm load and the RF signal electric field is 1-20 GHz because “ having a T-shaped gate structure described as above has been demonstrate excellent DC and RF characteristics that benefited from the reduction of parasitic resistance/capacitance and improvement of the channel aspect ratio and output conductance.” (Chang, [0032])
Regarding claim 8, Chang discloses the transistor of claim 7, wherein the transistor has a gate length of 5 nm-1000 nm and a distance between the source contact and the drain contact of 1 micrometer- 3 micrometers. ([0035]-[0037])
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Takashi and Chang to have a gate length of 5 nm-1000 nm and a distance between the source contact and the drain contact of 1 micrometer- 3 micrometers for similar reason mentioned beforehand.
Regarding claim 9, Takashi discloses a low noise microwave receiver amplifier (per [0003]), (the examiner is treating the limitation past “or” as optional) or readout circuit for a quantum computer comprising the HEMT of claim 1.
Regarding claim 10, Takashi discloses the transistor of claim 1. Takashi does not explicitly disclose wherein the RST noise is at least two times smaller than the HEMT's channel thermal noise at 300 K under low noise bias conditions and at microwave frequencies in a range of 1-20 GHz.
However, Takashi does disclose:
“[0052] According to the compound semiconductor device 1, since impurities are not doped in the channel layer 4 as described above, the mobility of the electrons in the channel layer 4 is expected to not decrease due to the impurity scattering. Thus, the noise of drain current is also expected to be reduced.”
Therefore, it would have bene obvious to one skilled in the art before the effective filing date to use the teachings of Takashi in view of Chang for the RST noise is at least two times smaller than the HEMT's channel thermal noise at 300 K under low noise bias conditions and at microwave frequencies in a range of 1-20 GHz as an inherent consequence of the device structure/materials having advantages of low noise and high-speed operation. (Takashi, [0003])
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cha et al. (US 20230178641 A1) discloses a “superconductor transistor structure is a high-electron-mobility transistor (HEMT) and part of a low noise amplifier configured to operate in a cryogenic environment.” ([0011] but does not disclose all the limitations as required by the claims.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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