DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to because the conditions for accepting black and white photographs have not been satisfied. The black and white photographs of figures 10A, 10B, 11A, and 11B are not of sufficient quality to distinguish the details and labels of these figures. See 37 CFR 1.84(b)(1). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Re claim 1: The limitation, “forming a mask by supplying a plasmatic deposition gas to a side of a front surface or a side of a back surface of the workpiece,” is introduced in the second paragraph of claim 1. The third paragraph of the claim contains the limitation, “on the side of a surface on which the mask has been formed.” The fourth paragraph of the claim contains the limitation, “to the side of the surface of the workpiece in which the cut grooves have been formed.” It is unclear which surface from the second paragraph is being referred to in the limitations of third and fourth paragraphs. The meets and bounds of the scope of the term “side” as used claim 1 is also unclear. It is unclear if “the side of (a/the/front/back) surface” refers to the surface itself, the edge of the surface (e.g. the edge of the workpiece, such as the edge of a wafer), or something else, such as the side of protruding features of the surface. The phrase, “the side of (a/the/front/back) surface” is being interpreted in this office action to refer to the surface itself and as such, is being interpreted to have the following meaning: (a/the/front/back) surface.
Re claim 2-5: These claims are rejected as they depend on and inherit the indefinite content of claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 4, and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Lei et al. (US 9018079 B1; hereinafter referred to as “Lei”) in view of Tabuchi (JP 2018006588 A; hereinafter referred to as “Tabuchi”).
Re claim 1: Lei teaches a manufacturing method of a plurality of chips (abstract), the method manufacturing the chips by dividing a workpiece (FIG. 3: el. 300) that is defined into a plurality of regions (FIG. 3: el. 302) by scribe lines (FIG. 3: el. 304, 306) (col. 8: line 31-36), comprising:
a mask forming step of forming a mask (FIG. 6A: el. 602) by supplying a plasmatic deposition gas to a side of a front surface or a side of a back surface of the workpiece (col. 9: line 29-35; FIG. 6A: el. 602, 604|the plasma deposition process of Lei inherently includes supplying the plasma/gas to a front or back surface of the workpiece);
a cutting step of forming cut grooves (FIG. 6B: el. 610, 612; col. 10: line 33-44; FIG 12B: el. 1214; col. 16: line 40), with the mask being removed along the scribe lines (col. 10: line 33-39: FIG. 6A-B: el. 607);
and a plasma etching step of removing the workpiece along the scribe lines to divide the workpiece into the chips (FIG. 5: el. 508; col. 4: line 31-34) by applying plasma etching to the workpiece while supplying a plasmatic etching gas (col. 15: line 21-27) to the side of the surface of the workpiece in which the cut grooves have been formed (FIG. 6B-C: el. 610, 612; FIG 12B-C: el. 1214, 1216|figures show etching through the cut trenches to divide the workpiece).
Lei fails to teach forming cut grooves by causing a cutting blade to cut into the workpiece at a predetermined cut-in depth along the scribe lines on the side of a surface on which the mask has been formed. However, Lei does teach a variant process of forming cut grooves by causing a laser beam to cut into the workpiece at a predetermined cut-in depth (FIG. 5: el. 504; FIG. 11B; col. 10: line 33-44).
Within a similar field of endeavor, Tabuchi teaches a cutting step of forming cut grooves (FIG. 2: el. 10b), with the mask (FIG. 2: el. 16; para. 14: sent. 2; para. 12: sent. 2; para. 7: last 2 lines|mask formed from plasma CVD deposited passivation layer) being removed along the scribe lines (FIG. 2: element 12), by causing a cutting blade (FIG. 2: el. 22) to cut into the workpiece (FIG. 2: el. 10) at a predetermined cut-in depth (para. 14: sent. 2) along the scribe lines on the side of a surface on which the mask has been formed (FIG. 2: el. 16, 10b).
It would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Tabuchi and Lei to enable performing the step of cutting with a cutting blade of Tabuchi in the dicing method of Lei to make use of existing, well-known dicing tools and because the selection of a known process based on its suitability for its intended use is supported by prima facie obviousness (MPEP 2144.07).
Re claim 3: The combination of Tabuchi and Lei discloses that in the cutting step, the cut-in depth of the cutting blade is set to at least 5 μm (Tabuchi: para. 14: sent. 2). The combination of Tabuchi and Lei fails to directly disclose that in the cutting step, the cut-in depth of the cutting blade is set to smaller than 10 μm. However, as per MPEP 2144.05, "in the case where the claimed ranges ‘overlap or lie inside ranges disclosed by the prior art’ a prima facie case of obviousness exists” (MPEP 2144.05(I)).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Tabuchi and Lei to enable using the overlapping range disclosed by the combination of Tabuchi and Lei to arrive at the range of the claimed limitation.
Re claim 4: Lei in view of Tabuchi teaches the manufacturing method according to claim 1. Lei additionally teaches the manufacturing method, wherein in the plasma etching step, the workpiece is divided into the chips along the scribe lines by repeating (Lei - col. 15: line 28-34|sub-operations of the Bosch etch are repeated): a protective film application substep of applying a protective film (Lei - col. 15: line 40-44) to the cut grooves (Lei - col. 4: line 52-54|the plasma etch operation of Lei extends the cut trenches via plasma etching. To perform this operation, the etching steps are inherently performed on the cut trenches) by supplying a plasmatic deposition gas (Lei - col. 15: line 29-33, 41-43|a conventional Bosch process, as taught by Lei, utilizes plasma deposition for deposition of the protective film of the deposition sub-step) to the side of the surface of the workpiece in which the cut grooves have been formed (Lei - col. 4: line 52-54; FIG. 6B-6C).
an anisotropic etching substep of, after the protective film application substep, removing portions of the protective film covering corresponding bottoms of the cut grooves (Lei - col. 15: line 41-46), through anisotropic plasma etching of the protective film by supplying a plasmatic gas for anisotropic etching to the cut grooves (Lei - col. 15: line 29-33, 44-47|a conventional Bosch process, as taught by Lei, utilizes a dry plasma etch for the anisotropic etch sub-step);
and an isotropic etching substep of, after the anisotropic etching substep (Lei - col. 15: line 31-33), subjecting the bottoms of the cut grooves (Lei - col. 15: line 41-46) to isotropic plasma etching by supplying a plasmatic gas for isotropic etching to the cut grooves (Lei - col. 15: line 29-33|a conventional Bosch process, as taught by Lei, utilizes a dry plasma etch for the isotropic etch sub-step).
Re claim 5: Lei in view of Tabuchi teaches the manufacturing method according to claim 1. Lei additionally teaches the manufacturing method, further comprising: a mask removal step of removing the mask after the plasma etching step (Lei - FIG. 6B-6C: el. 608; col. 15: line 25-27|figures show the remove of patterned mask 608).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Lei in view of Tabuchi as applied to claims 1, 3, 4, and 5 above, and further in view of Otake (JP 2015018965 A; hereinafter referred to as “Otake”).
Re claim 2: The combination of Tabuchi and Lei discloses the manufacturing method according to claim 1, wherein in the cutting step, the cutting blade (Tabuchi - FIG. 2: el. 22) is caused to cut into the mask (Tabuchi - FIG. 2: el. 16; para. 14: sent. 2; para. 12: sent. 2; para. 7: last 2 lines). The combination of Tabuchi and Lei fails to disclose the manufacturing method, wherein the cutting blade has a tip end portion having a width tapering toward a tip end, and in the cutting step, the cutting blade is caused to cut into the mask such that only the tip end portion comes into contact with the mask.
However, Otake teaches a multi-step dicing process wherein the cutting blade (FIG. 4B: el. 43) has a tip end portion having a width tapering toward a tip end (FIG. 4B: el. 47; para. 8: sent. 1), and in the cutting step (FIG. 4A: el. 43), the cutting blade is caused to cut into the top layer of the wafer such that only the tip end portion comes into contact with the top layer of the wafer (FIG. 4B: el. 47, 82, 84; para. 30). Otake also teaches that a benefit of allowing only the tip end of the blade to contact the top layer of the wafer is to prevent film peeling on the wafer starting from the edge of the cut (para. 8: sent. 3; para. 30: sent. 4).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Tabuchi and Lei with the teaching of Otake to enable using the partial cutting process of Otake in the mask cutting and manufacturing method disclosed by the combination of Tabuchi and Lei, to arrive at the claimed limitation and to achieve the benefit of reducing mask peeling at the edge of the cut.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 4 of U.S. Patent No. US 11990371 B2 (hereinafter referred to as “U.S. Patent No. ‘371”) in view of Yalamanchili (US 20120322234 A1; hereinafter referred to as “Yalamanchili”).
Re claim 1: Claims 1 and 4 of U.S. Patent No. ‘371 teach the limitations of claim 1 of the instant application, as outlined below:
Claims of Application 18/467,860
Claims of Patent No. US 11,990,371 B2
1. A manufacturing method of a plurality of chips (A1), the method manufacturing the chips by dividing a workpiece that is defined into a plurality of regions by scribe lines (A2), comprising: a mask forming step (B1) of forming a mask by supplying a plasmatic deposition gas to a side of a front surface or a side of a back surface of the workpiece (B2); a cutting step of forming cut grooves, with the mask being removed along the scribe lines, by causing a cutting blade to cut into the workpiece at a predetermined cut-in depth along the scribe lines on the side of a surface on which the mask has been formed (C); and a plasma etching step (D1) of removing the workpiece along the scribe lines (D2) to divide the workpiece into the chips by applying plasma etching to the workpiece while supplying a plasmatic etching gas to the side of the surface of the workpiece in which the cut grooves have been formed (D3).
1. A device chip manufacturing method (A1) for dividing a silicon wafer formed with devices in each of regions of a front surface partitioned by a plurality of mutually intersecting streets (A2), into individual device chips, the device chip manufacturing method comprising: a resist film coating step (B1) of coating the front surface of the silicon wafer with a resist film; an exposing step of removing the resist film in regions along the streets to expose (B1) the silicon wafer; a silicon wafer conveying-in step of conveying the silicon wafer into a plasma etching apparatus (D1); a deep groove forming step of alternating a plurality of times between isotropic etching (D1) using a plasma of a CF.sub.4 gas or an SF.sub.6 gas and coating of regions exposed by the isotropic etching with a passivation film by use of a plasma of a C.sub.4F.sub.8 gas to process the silicon wafer along the streets (D2), thereby forming deep grooves not reaching a back surface of the silicon wafer; and a dividing step of subjecting bottom portions of the deep grooves to anisotropic etching by use of a plasma of a mixed gas of SF.sub.6 and O.sub.2 to form division grooves reaching the back surface of the silicon wafer, thereby dividing the silicon wafer into the individual device chips (D1, D3).
4. The device chip manufacturing method according to claim 1, wherein a test element group and an insulating film overlapping with the streets are formed on the front surface of the streets, and, in the exposing step, the resist film, the test element group, and the insulating film are removed in regions overlapping with the streets by use of a cutting blade (C).
Alphabetic characters in the above table are provided to show the mapping between claims, and additional explanation is provided below. The resist forming and exposing steps (U.S. Patent No. ‘371 – claim 1) are used to form a mask with openings over the streets (also known as scribe lines) and therefore, the resist coating step is a mask forming step. The exposing step (U.S. Patent No. ‘371 – claim 4) exposes the wafer by removing sections of the resist layer overlapping the streets by use of a cutting blade and therefore, intrinsically causes a cutting blade to cut into the wafer (a more narrowly defined workpiece) at a planned or predetermined depth and forms cut grooves. Claims 1 and 4 of U.S. Patent No. ‘371 do not specifically teach a mask forming step, wherein the mask is formed by supplying a plasmatic deposition gas to a side of a front surface or a side of a back surface of the workpiece.
In a similar field of endeavor, Yalamanchili teaches a mask forming step (FIG. 1A: el. 102) of forming a mask (FIG. 4A: el. 402) by supplying a plasmatic deposition gas to a side of a front surface or a side of a back surface of the workpiece (para. 31: sent. 1; para. 41: sent. 2-3); Yalamanchili also teaches that benefits of forming a mask by plasma deposition include allowing for easier removal of the mask without damage to underlayers (para. 32: sent. 3) and the ability to form the mask in-situ in a plasma etch chamber (abstract).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to substitute the generic resist film mask of claims 1 and 4 of U.S. Patent No. ‘371 with the plasma deposited mask of Yalamanchili in order to achieve the efficiency benefits of in-situ deposition in an etch chamber and to allow for easier removal of the mask without damaging device layers under the mask.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional cited art contains an example which teaches variant processes for cutting a pattern in a mask layer including cutting using a cutting blade and cutting using a laser beam.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEVIN GOODLING whose telephone number is (571)272-2552. The examiner can normally be reached M-F 8:00am - 5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/D.G./Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898