Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/472,350 filed on 09/22/2023.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Claim Objections
Claim 6 contains a minor antecedent basis issue. Claim 6 recites “an insulating layer in the redistribution layer,” whereas claim 1 previously introduces “the insulating layer.” It appears applicant intends to refer to the same insulating layer previously recited. For clarity and consistency of claim language, applicant may wish to amend “an insulating layer” to “the insulating layer.” This issue is treated as a matter of form and is not made a ground of rejection at this time.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “boundary region” renders the scope of claim 1 unclear and indefinite.
Claim 1 recites the limitation “a boundary region” in line 9. A “region” implies a defined area or volume having spatial extent. However, the claim does not define any area, space, or intermediate portion existing between the die and the mold material layer. Instead, the claim language and the specification consistently describe the die as being embedded in and in direct contact with the mold material layer. How can there be a “region” between the die and the mold material when the die and mold material are in direct contact?
Further, review of the specification and drawings fails to disclose or illustrate any region between the die and the mold material layer. The figures depict the die and the mold material layer as directly abutting one another, without any intervening space, layer, or defined boundary area. Thus, no identifiable boundary region is shown, described, or otherwise supported by the written disclosure.
Because the claim requires reinforcing portion that is thicker in a thickness direction within an area corresponding to a “boundary region” that is neither defined in the claim nor disclosed in the specification or drawings, one of ordinary skill in the art would be unable to determine where such a region exists, how it is spatially distinguished from the die or the mold material layer, or how the reinforcing structure is positioned relative thereto.
For purposes of examination the term “boundary region” is the boundary between die (120) and the very left side of the mold material (140) as can be seen in the Examiner’s Mark-up below in claim 1.
Accordingly, claim 1 fails to particularly point out and distinctly claim the subject matter regarded as the invention, as required by 35 U.S.C. § 112(b).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Pub # 2018/0315674 to Chen et al. (Chen).
Regarding independent claim 1, Chen discloses a semiconductor device (Fig. 1: 100) comprising:
a die (Fig. 1: 120);
a mold material layer (Fig. 1: 140) in which the die (120) is embedded in a state where an electrode surface (120c, ¶0021) of the die (120) is exposed from a surface of the mold material layer (140;); and
a redistribution layer (Figs. 8-9: 150) provided on a surface of the mold material layer (140) and having an insulating layer (Fig. 8: 150p1 and ¶0027) and a wiring (Fig. 8: 150m2) ¶0027) in a multilayer state (¶0021 or ¶0027 for multilayer state), as a fan out wafer level package (¶0021), wherein
the wiring (Fig. 8: 150m2) of the redistribution layer (Figs. 8-9: 150) has a reinforcing portion (see Examiner’s mark-up below) that is thicker in a thickness direction within an area corresponding to a boundary region (see 112 2nd above regarding the term “boundary region”, boundary region is where double arrow is, also see the Examiner’s mark-up below) between the die (120) and the mold material layer (140) than the other area (other area is considered any other area that the wiring is not formed).
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Regarding claim 2, Chen discloses wherein the reinforcing portion has a via connected to the wiring inside the redistribution layer (Fig. 9: 1501).
Regarding claim 3, Chen discloses wherein the reinforcing portion protrudes from the wiring outward of the redistribution layer (see Examiner’s mark-up below).
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Regarding claim 4, Chen discloses wherein the reinforcing portion protrudes from the wiring inward of the redistribution layer (see Examiner’s mark-up below).
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Regarding claim 5, Chen discloses wherein the reinforcing portion protrudes from the wiring outward and inward of the redistribution layer (see Examiner’s mark-up below).
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Regarding claim 6, Chen discloses wherein the reinforcing portion (see Examiner’s mark-up above from claim 1) is located at a position separated from a surface of the mold material layer (140) via an insulating layer (150p1) in the redistribution layer (150) (see Fig. 9).
Regarding claim 7, Chen discloses a semiconductor device (Fig. 9) including a redistribution layer structure (150) comprising a die (element 120), a mold material layer (element 140), and wiring formed in the redistribution layer (elements 150m1, 150m2, 150p1 and 150p2). Chen further teaches that portions of the wiring (elements 150m1, 150m2) are formed with increased thickness in the thickness direction, thereby constituting a reinforcing portion (see Examiner’s mark-up above from claim 1) that is integral with and part of the wiring itself rather than a separate member (see Fig. 8 and associated description).
Chen additionally teaches that the reinforcing portion (150m1 and 150m2) is provided only on a part of the wiring, as the thickened regions (150m1, 150m2) are localized segments along the conductive trace rather than being uniformly thick along the entire wiring length. Further, as shown in Fig. 8, the thickened wiring portions (see Examiner’s mark-up above from claim 1) extend across and overlap both the die region (120) and the mold material region (140), thereby straddling the boundary region between the die and the mold material layer within the redistribution layer. The interface between elements 120 and 140 inherently defines a boundary region, and the thickened wiring portions are positioned so as to bridge that interface.
Accordingly, Chen discloses each and every limitation of claim 7, including (i) a reinforcing portion that is part of the wiring, (ii) the reinforcing portion being provided only on a part of the wiring, and (iii) the reinforcing portion straddling a boundary region between the die and the mold material layer in the redistribution layer.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by US Pub # 2024/0038701 to Kuo et al. (Kuo).
Regarding independent claim 1, Kuo discloses a semiconductor device (see Fig. 4K with respect to Fig. 4F) comprising:
a die (Fig. 4F: 101);
a mold material layer (Fig. 4F: 105) in which the die is embedded in a state where an electrode surface (405, ¶0061) of the die (101) is exposed from a surface of the mold material layer (105); and
a redistribution layer (Fig. 4F: 103) provided on a surface of the mold material layer (105) and having an insulating layer and a wiring in a multilayer state (see Examiner’s Mark-up below), as a fan out wafer level package (¶0021), wherein
the wiring (Fig. 4E: 407) of the redistribution layer (103) has a reinforcing portion (see Examiner’s mark-up below) that is thicker in a thickness direction (thicker in a width) within an area corresponding to a boundary region (see 112 2nd above regarding the term “boundary region” and the Examiner’s mark-up below) between the die (101) and the mold material layer (105) than the other area (other area is considered any other area that the wiring is not formed).
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Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub # 2021/0057352 to Agarwal et al., US Pub # 2023/0170258 to Huang et al., US Pub # 2017/0098588 to Yang et al., US Pub # 2024/0203925 to Chiu et al. and US Pat # 9,859,233 to Fan.
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/MOHSEN AHMADI/ Primary Examiner, Art Unit 2896