Prosecution Insights
Last updated: October 22, 2026
Application No. 18/472,695

Corner Reinforcement Structure for Package Interconnect

Final Rejection §103§112
Filed
Sep 22, 2023
Examiner
AHMADI, MOHSEN
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
410 granted / 472 resolved
+18.9% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
23 currently pending
Career history
501
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
51.4%
+11.4% vs TC avg
§102
27.4%
-12.6% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 472 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Applicant’s response of 08/18/2026 has been entered in the record and considered. With respect to the rejection claims 35 USC 102 (a)(1) and 103 are withdrawn in view of applicants’ amendments. The following new rejection to claims 1-12 and 21-28 is under 35 USC 103 (a). Claims 1-12 and 21-28 are under consideration. Claims 1-12 and 21-28 are rejected. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites in lines 11-13 “a first solder and a second solder disposed between the substrate and the metallic member, wherein the metallic member is sandwiched between the first solder and the second solder.” The recitation is unclear because it requires both the first solder and the second solder to be disposed between the substrate and the metallic member, while also requiring the metallic member to be sandwiched between the first solder and the second solder. As illustrated in Figure 1, the first solder (140) and the second solder (150) are disposed on opposite sides of the metallic member (110), between the substrate (120) and the board (130). Accordingly, it is unclear whether both solders are intended to be disposed between the substrate and the metallic member or whether the metallic member is intended to be disposed between the two solders. Therefore, the positional relationship among the recited elements is unclear, rendering claim 1 indefinite. Based on Figure 1, the applicant could revise the limitation to read: "a first solder and a second solder disposed between the substrate and the board, wherein the metallic member is sandwiched between the first solder and the second solder." Claim 10 separately recites in line 2 a “first solder” and a “second solder.” The claim further recites in lines 11-16 that “the first solder is disposed between the first metallic member and the substrate along the first direction and that the first solder is disposed between the first metallic member and the board along the first direction”. The claim contains corresponding recitations for the second solder and the second metallic member. The recitations create an ambiguity because the claim uses the same term, “first solder,” to identify a solder disposed on opposite sides of the first metallic member: between the first metallic member and the substrate, and between the first metallic member and the board. The claim does not state whether the first solder is a single continuous solder structure extending through or around the first metallic member, a plurality of solder portions collectively referred to as the first solder, or two distinct solder portions that should instead be identified separately. The same ambiguity exists for the “second solder.” This ambiguity is not resolved by the specification. As illustrated in Figures 8 and 9, solder 140 is disposed between metallic member 110 and substrate 120, while solder 150 is disposed between metallic member 110 and board 130. Paragraph [0049] separately identifies a third solder 160 extending between solder 140 and solder 150 and surrounding metallic member 110. Thus, the disclosed structure distinguishes the first solder 140, the second solder 150, and the third solder 160 as different solder portions or regions, even though paragraph [0049] indicates that the third solder 160 may be integral with the first solder 140 and the second solder 150. Accordingly, claim 10 does not clearly identify whether the claimed first solder corresponds only to solder 140, includes solder 150 or third solder 160, or constitutes a continuous solder structure incorporating multiple solder portions. The claim likewise does not clearly identify whether the claimed second solder corresponds only to solder 150, includes solder 140 or third solder 160, or constitutes a continuous solder structure incorporating multiple solder portions. Because the scope of the claimed solder arrangement cannot be determined with reasonable certainty, claim 10 is indefinite under 35 U.S.C. 112(b). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2008/0293232 to Kang et al. (Kang) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda). Regarding independent claim 1, Kang teaches a semiconductor structure (Fig. 4A-4C), comprising, a board (substrate 56); a substrate (die 54) disposed a distance (standoff height 61) over the board (substrate 56), wherein the substrate includes a peripheral portion (peripheral edges 48 and corners 47) and a central portion surrounded by the peripheral portion (Figures 4A-4C); a plurality of conductive bumps (working solder bumps 52) disposed over the central portion of the substrate, wherein the plurality of conductive bumps are disposed between the substrate (54) and the board (56) (Figures 4A–5); and an attachment structure (standoff structures: solder bumps 60) disposed over the peripheral portion of the substrate (die 54), wherein the attachment structure (60) is disposed between and attached to the substrate (54) and the board (56), a total height (61) of the attachment structure (60) is equal to the distance (distance 61), However, Kang does not expressly disclose the attachment structure includes: a metallic member disposed between the substrate and the board, and a first solder and a second solder disposed between the substrate and the metallic member, wherein the metallic member is sandwiched between the first solder and the second solder. Onoda teaches a metallic member (Fig. 4: terminal 17) disposed between the substrate (54) and the board (56), and a first solder (Fig. 4: solder 27) and a second solder (Fig. 4: solder 29) disposed between the substrate (54) and the board (56), wherein the metallic member (17) is sandwiched between the first and second solders (Figure 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s peripheral standoff bumps 60 by employing the metallic-member-and-solder arrangement taught by Onoda, with the metallic member disposed between first and second solder portions, such that providing sufficient solder material helps reduce tolerance variations in the height of the semiconductor assembly (¶0084). Regarding claim 2, Kang in view of Onoda further teaches a third solder (27 of Onoda) extending between the first solder (29 of Onoda) and the second solder (24 of Onoda), wherein the metallic member (17 of Onoda) is surrounded by a solder structure that includes the first solder (29), the second solder (24), and the third solder (27) (see Fig. 4 of Onoda). Under the broadest reasonable interpretation, the claim does not expressly require the first solder, the second solder, and the third solder to be integral with one another or in direct contact. As illustrated in Figure 4 of Onoda, solder 27 is positioned between solder 29 and solder 24 along the vertical direction, with metallic member 17 disposed between solder 29 and solder 27. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the solder arrangement taught by Onoda in the semiconductor structure of Kang to form solder-bonded connections between adjacent components and accommodate variations in assembly height (¶0084). Regarding claim 3, Kang in view of Onoda further teaches wherein a sidewall of the metallic member (metallic terminal 17 of Onoda) is free of solder (solders 27 and 29 are disposed on opposite surfaces of metallic terminal 17, while a lateral sidewall of metallic terminal 17 is illustrated as being free of solder, as shown in Fig. 4 of Onoda). Regarding claim 5, Kang in view of Onoda further teaches wherein the attachment structure (peripheral standoff bump 60 of Kang, modified to include metallic member 17 and solder portions 27 and 29 of Onoda) is disposed at a corner (47) of the substrate (die 54 of Kang) (see Figs. 4A–4C of Kang and Fig. 4 of Onoda). It would have been obvious to one of ordinary skill in the art to modify the peripheral standoff bump (60) of Kang using the metallic member (17) and solder portions (27, 29) of Onoda to provide a solder-bonded attachment structure while maintaining the desired separation between the substrate and the board and accommodating variations in assembly height. Claim 4, 6-7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2008/0293232 to Kang et al. (Kang) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda) and further in view of US Pat # 8,912,651 to Yu et al. (Yu). Regarding claim 4, Kang in view of Onoda does not expressly disclose an isolation member disposed over the board and surrounding the substrate and the attachment structure, wherein the third solder is disposed between the isolation member and the metallic member. However, Yu teaches an isolation member (molding compound 30) disposed over a board (first substrate 10) and between the first substrate (10) and second substrate (22), wherein the isolation member (30) surrounds the solder connections (28) between the substrates (see Fig. 19). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an isolation member (molding compound 30) of Yu over the board (substrate 56) of Kang and around the solder connections in the modified structure of Kang and Onoda, in order to encapsulate and protect the solder connections between the substrate and the board. Regarding claim 6, Kang in view of Onoda does not expressly disclose an isolation member disposed over the board and surrounding the substrate and the attachment structure. However, Yu teaches an isolation member (molding compound 30) disposed over a board (first substrate 10) and around the electrical connections (solder connectors 28) between the first substrate (10) and the second substrate (22) (see Fig. 19). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an isolation member (molding compound 30 of Yu) over the board (substrate 56 of Kang) and around the solder connections and modified attachment structure (metallic member 17 and solder portions 27, 29 of Onoda), in order to provide insulating encapsulation and protection for the connections between the substrate and the board. Regarding claim 7, Kang in view of Onoda and Yu further suggests wherein the isolation member (molding compound 30 of Yu) abuts the metallic member (terminal 17 of Onoda), the first solder (27 of Onoda), and the second solder (29 of Onoda), in the proposed modified structure (see Fig. 19 of Yu and Fig. 4 of Onoda). Yu teaches a molding compound (30) disposed between opposing substrates (10, 22) and around the electrical connections therebetween. It would have been obvious to one of ordinary skill in the art to provide the molding compound (30) of Yu in contact with the metallic member (17) and solder portions (27, 29) of the modified Kang structure to encapsulate and protect the peripheral attachment structure. Regarding claim 9, Kang in view of Onoda and Yu is proposed to further teach: a first conductive pad (electrode 13b of Onoda, corresponding to a conductive pad on substrate 54 of Kang in the proposed modified structure) disposed on the substrate (die 54 of Kang); a second conductive pad (conductive pad 12 of Yu, proposed for incorporation on board 56 of Kang) disposed on the board (56), wherein the attachment structure (metallic member 17 and solder portions 27 and 29 of Onoda) is disposed between the first conductive pad (13b) and the second conductive pad (12), the first solder (27) abuts the first conductive pad (13b), and the second solder (29) abuts the second conductive pad (12); a plurality of third conductive pads (proposed conductive contact regions associated with working solder bumps 52 of Kang) disposed on the substrate (die 54 of Kang); and a plurality of fourth conductive pads (metal conductors 62 of Kang) disposed on the board (substrate 56), wherein the plurality of conductive bumps (working solder bumps 52) are disposed between the plurality of third conductive pads and the plurality of fourth conductive pads (see Fig. 5 of Kang, Fig. 4 of Onoda, and Fig. 19 of Yu). It would have been obvious to one of ordinary skill in the art to provide conductive pads at the solder attachment locations of the modified Kang structure, as taught by Yu and Onoda, to establish solder-bonded interfaces between the opposing components and facilitate electrical connections. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2008/0293232 to Kang et al. (Kang) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda) and further in view of US Pub # 2009/0146314 to Akaike et al. (Akaike). Regarding claim 8, Kang in view of Onoda does not expressly disclose a die disposed over the substrate, wherein the substrate is disposed between the die and the first solder. However, Akaike teaches a die (electronic component 24, which may be a semiconductor chip) disposed over a substrate (second wiring board 21), wherein the substrate (21) is disposed between the die (24) and an inside connection terminal (97, which may comprise a solder bump) (see Fig. 7). It would have been obvious to one of ordinary skill in the art to incorporate an additional semiconductor die over the substrate of the modified Kang structure, as taught by Akaike, to accommodate additional semiconductor components in a packaged assembly. Claims 10-11 and 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2008/0293232 to Kang et al. (Kang) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda), and further in view of US Pat # 8,912,651 to Yu et al. (Yu). Regarding independent claim 10, Kang discloses a semiconductor structure (Fig. 4A-4C) comprising: a substrate (die 54) attached to a board (substrate 56) by a first solder (peripheral standoff solder bump 60) and a second solder (another peripheral standoff solder bump 60), wherein the first solder (60) and the second solder (60) are attached to a first end and a second end, respectively, of the substrate (die 54) (see Figures 4A-5); a conductive bump (working solder bump 52) disposed between the substrate (die 54) and the board (substrate 56) along a first direction, wherein the conductive bump (52) is disposed between the first solder (60) and the second solder (60) along a second direction different from the first direction (see Figures 4A–5). Kang does not expressly disclose an isolation member disposed over the board, wherein the isolation member is disposed along a sidewall of the first solder, a sidewall of the second solder, and sidewalls of the conductive bump. However, Yu discloses an isolation member (molding compound 30) disposed over a board (substrate 10) and around solder connections (28), wherein the isolation member (30) is disposed along sidewalls of the solder connections (28) between opposing substrates (10 and 22) (see Figures 8 and 19). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the isolation member (molding compound 30) of Yu over the board (substrate 56) of Kang and along the sidewalls of the first solder (60), the second solder (60), and the conductive bump (52), in order to provide an insulating encapsulation material around the solder connections between the substrate and the board. Kang further does not expressly disclose a first metallic member and a second metallic member disposed between the isolation member and the conductive bump along the second direction. However, Onoda discloses a metallic member (terminal 17) disposed between a first solder portion (27) and a second solder portion (29), wherein the metallic member (17) is sandwiched between the first and second solder portions (27 and 29) (see Figure 4). Onoda further discloses: wherein the first solder (solder portion 27) is disposed between the first metallic member (terminal 17) and the substrate (semiconductor chip 132, corresponding to die 54 of Kang) along the first direction, the first solder (solder portion 29) is disposed between the first metallic member (terminal 17) and the board (substrate 56 of Kang, corresponding to heat sink 162 in the secondary reference) along the first direction, the second solder (solder portion 27 at the opposite peripheral location) is disposed between the second metallic member (another terminal 17) and the substrate (die 54 of Kang) along the first direction. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the first solder (peripheral standoff solder bump 60) and the second solder (another peripheral standoff solder bump 60) of Kang by incorporating a first metallic member (terminal 17) and a second metallic member (another terminal 17), respectively, as taught by Onoda, in order to provide alternative solder-bonded attachment structures and accommodate variations in assembly height (¶0084). In the proposed modified structure, the first metallic member (17) and the second metallic member (17) would be disposed between the isolation member (molding compound 30) and the conductive bump (52) along the second direction. Regarding claim 11, Kang in view of Onoda and Yu further suggests wherein a total height of the first metallic member (metallic terminal 17 of Onoda) and the first solder (solder portions 27 and 29 of Onoda, incorporated at a peripheral standoff location 60 of Kang) is substantially the same as a distance (standoff height 61 of Kang) between the substrate (die 54 of Kang) and the board (substrate 56 of Kang) (see Fig. 4 of Onoda and Figs. 4A and 5 of Kang). Kang teaches maintaining a desired standoff height (61) between die 54 and substrate 56 using peripheral standoff bumps 60. Onoda further teaches solder-bonded metallic terminal 17 and the use of solder material to reduce variations in assembly height (¶0084). It would have been obvious to one of ordinary skill in the art to dimension the first metallic member (17) and associated solder portions (27, 29) to provide a total height substantially the same as the distance (61) between the substrate (54) and the board (56), in order to maintain the desired standoff height and accommodate variations in assembly height. Regarding claim 21, Kang in view of Onoda and Yu further suggests: a first metal pad (emitter electrode 13b of Onoda, incorporated on substrate 54 of Kang) disposed on the substrate (54), wherein the first solder (solder portion 27 of Onoda) is disposed between the first metal pad (13b) and the first metallic member (terminal 17 of Onoda); and a second metal pad (conductive pad 12 of Yu, proposed for incorporation on board 56 of Kang) disposed on the board (56), wherein the first solder (solder portion 29 of Onoda, under the provisional solder-structure interpretation applied to claim 10) is disposed between the second metal pad (12) and the first metallic member (17). It would have been obvious to one of ordinary skill in the art to provide conductive pads at the solder attachment locations of the modified Kang structure, as taught by Onoda and Yu, to provide suitable interfaces for bonding the solder portions to the substrate and the board. Regarding claim 22, Kang in view of Onoda and Yu further suggests wherein the first metallic member (terminal 17 of Onoda, incorporated at a first peripheral standoff location 60 of Kang) is disposed at a first corner (47) of the substrate (die 54 of Kang), and the second metallic member (another terminal 17 of Onoda, incorporated at a second peripheral standoff location 60 of Kang) is disposed at a second corner (47) of the substrate (54) (see Fig. 4C of Kang and Fig. 4 of Onoda). It would have been obvious to one of ordinary skill in the art to provide the metallic-member-and-solder structures of Onoda at the first and second corner locations (47) of Kang to maintain the desired separation between the substrate and the board while accommodating variations in assembly height. Claims 12 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2008/0293232 to Kang et al. (Kang) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda) in view of US Pat # 8,912,651 to Yu et al. (Yu) and further in view of US Pub # 2009/0146314 to Akaike et al. (Akaike). Regarding claim 12, Kang in view of Onoda and Yu does not expressly disclose wherein the first solder surrounds the first metallic member, such that the first solder is disposed between the isolation member and a sidewall of the first metallic member; and the second solder surrounds the second metallic member, such that the second solder is disposed between the isolation member and a sidewall of the second metallic member. However, Akaike teaches an inside connection terminal (23), which may comprise solder, connected to a conductive pad (91-1), an end surface electrode (151-1) disposed along a sidewall of semiconductor element 86-1, and another conductive pad (92-1). Akaike further teaches an isolation member (sealing resin 27) surrounding the semiconductor elements and electrical connections (see Fig. 7). It would have been obvious to one of ordinary skill in the art to incorporate Akaike’s sidewall conductive connection arrangement into the modified Kang structure to provide an electrical connection along the sidewall of the metallic member and protect the connection with an insulating sealing material. Regarding claim 23, Kang in view of Onoda and Yu does not expressly disclose wherein the first metallic member, the second metallic member, or both includes more than one metallic member segment. However, Akaike teaches a metallic structure (the combination of conductive pads 92-1 and 91-1 and end surface electrode 151-1), including more than one metallic segment (92-1, 151-1, and 91-1), wherein the metallic segments are electrically connected to one another (see Fig. 7). It would have been obvious to one of ordinary skill in the art to provide the first metallic member (17 of Onoda), the second metallic member (another 17 of Onoda), or both with multiple electrically connected metallic segments, as taught by Akaike, to provide an alternative metallic connection arrangement using interconnected conductive components. Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 8,912,651) in view of Kang et al. (US 2008/0293232), and further in view of US Pub # 2018/0269166 to Onoda et al. (Onoda). Regarding independent claim 24, Yu discloses a package structure (Fig. 19) comprising: a substrate (22); a printed circuit board (first substrate 10, comprising an interposer) attached to the substrate (22); an electrical connection bump structure (stud bulb 18 and reflowed solder connector 28) between the substrate (22) and the printed circuit board (10), wherein the substrate (22) is electrically connected to the printed circuit board (10) by the electrical connection bump structure (18, 28) (Fig. 19); and Yu does not expressly disclose a corner reinforcement structure between the substrate and the printed circuit board, wherein in a cross-sectional view, the corner reinforcement structure includes a first corner portion and a second corner portion, wherein a portion of the electrical connection bump structure is between the first corner portion and the second corner portion. However, Kang teaches peripheral standoff solder bumps (60) disposed between a substrate (die 54) and a board (substrate 56), wherein in a cross-sectional view, the standoff solder bumps (60) are disposed at opposite peripheral regions of the substrate (54), corresponding to a first corner portion (60) and a second corner portion (another 60), wherein a portion of the electrical connection bump structure (working solder bumps 52) is between the first corner portion (60) and the second corner portion (60) (Figs. 4A-4C). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide peripheral standoff structures at opposite corner regions of the substrate (22) of Yu, as taught by Kang, in order to provide additional peripheral support and maintain a desired separation between the substrate (22) and the printed circuit board (proposed substrate 10). However, Yu in view of Kang does not expressly disclose that the first corner portion and the second corner portion each include: a first solder layer, a second solder layer, and a metal layer disposed between the first solder layer and the second solder layer, wherein the first solder layer is between the substrate and the metal layer and the second solder layer is between the printed circuit board and the metal layer. However, Onoda teaches: a first solder layer (solder 27), a second solder layer (solder 29), and a metal layer (metallic terminal 17) disposed between the first solder layer (27) and the second solder layer (29), wherein the first solder layer (27) is between a semiconductor chip (132) and the metal layer (17) and the second solder layer (29) is between a heat sink (162) and the metal layer (17) (Fig. 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the peripheral standoff structures (60) of Kang, as incorporated into Yu, by providing a metallic member (17) between first and second solder layers (27, 29), as taught by Onoda, in order to provide an alternative solder-bonded attachment structure capable of accommodating variations in assembly height (¶0084). In the proposed modified structure, the first and second corner portions would each include a metal layer (17) disposed between a first solder layer (27) and a second solder layer (29), with the first solder layer (27) adjacent to the substrate (22) and the second solder layer (29) adjacent to the printed circuit board (10). Further, the electrical connection bump structure (18, 28) would be disposed between the first and second corner portions in a cross-sectional view. Examiner’s Note Regarding Independent claim 24: Regarding claim 24, the examiner notes that the claim recites a “first corner portion” and a “second corner portion” of the corner reinforcement structure. Although the specification describes corner reinforcement structures at different corners of the substrate, it does not expressly identify the first and second corner portions. Applicant is encouraged to clarify whether these portions correspond to the separate corner reinforcement structures illustrated on opposite sides of the conductive bumps 126 in Figure 8. Claims 25-26 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 8,912,651) in view of Kang et al. (US 2008/0293232) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda) and further in view of US Pub # 2020/0006184 to Liu et al. (Liu). Regarding claim 25, Yu in view of Kang and Onoda does not expressly disclose wherein the metal layer is disposed at a corner of the substrate, and in a top view, the metal layer is rectangular-shaped. However, Liu teaches a metallic reinforcement member (support billet 156) disposed at a corner (101) of a substrate (100), wherein the metallic reinforcement member (156) has a rectangular shape in a cross-sectional view (see Fig. 12). It would have been obvious to one of ordinary skill in the art to provide the metal layer (17 of Onoda) with a rectangular shape, as taught by Liu, to provide additional mechanical support at the corner of the substrate (¶0054). Regarding claim 26, Yu in view of Kang and Onoda does not expressly disclose wherein the metal layer is disposed at a corner of the substrate, and in a top view, the metal layer is L-shaped. However, Liu teaches a metallic reinforcement member (support billet 156) disposed at a corner (101) of a substrate (100), wherein the metallic reinforcement member (156) has an L-shaped cross section (see Fig. 13). It would have been obvious to one of ordinary skill in the art to provide the metal layer (17 of Onoda) with an L-shaped configuration, as taught by US 2020/0006184 A1, to reinforce the corner of the substrate and provide additional mechanical support (¶0054). Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 8,912,651) in view of Kang et al. (US 2008/0293232) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda) and further in view of US Pub # 2021/0013156 to Kim et al. (Kim). Regarding claim 28, Yu in view of Kang and Onoda does not expressly disclose wherein the metal layer is disposed at a corner of the substrate, and in a top view, the metal layer is triangular-shaped. However, Kim teaches a package substrate (100) having triangular-shaped corner regions (CR) in a top view, wherein the corner regions (CR) include the corners (POT) of the package substrate (100) (see Figs. 1, 6, and 7). It would have been obvious to one of ordinary skill in the art to provide the metal layer (17 of Onoda) at the corner of the substrate with a triangular-shaped configuration, as suggested by the triangular corner regions (CR) of Kim, to provide a corner reinforcement arrangement suitable for reducing mechanical deformation and improving package reliability (¶0002-0003). Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 8,912,651) in view of Kang et al. (US 2008/0293232) in view of US Pub # 2018/0269166 to Onoda et al. (Onoda) and further in view of US Pub # 2023/0064277 to Lai et al. (Lai). Regarding claim 28, Yu in view of Kang and Onoda does not expressly disclose wherein the metal layer is disposed at a corner of the substrate, and in a top view, the metal layer is C-shaped. However, Lai teaches a reinforcing structure (302A-302D) disposed at a corner of a die package (10′), wherein the reinforcing structure may have a C-shaped top-view profile (see Fig. 4 and ¶0072). It would have been obvious to one of ordinary skill in the art to provide the metal layer (17 of Onoda) with a C-shaped top-view configuration, as taught by Lai, in order to provide additional structural support at the corners of the substrate and reduce the risk of cracking, thereby improving package reliability (see ¶0073 and 0089 of Lai). Response to Arguments Applicant’s arguments with respect to claim(s) 1-12 and 21-28 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHSEN AHMADI whose telephone number is (571)272-5062. The examiner can normally be reached M-F: 9:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William F Kraig can be reached at 571-272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHSEN AHMADI/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Sep 22, 2023
Application Filed
Apr 21, 2026
Non-Final Rejection mailed — §103, §112
Aug 18, 2026
Response Filed
Oct 15, 2026
Final Rejection mailed — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12772584
SOLID-STATE IMAGING DEVICE PACKAGE MANUFACTURING METHOD AND SOLID-STATE IMAGING DEVICE PACKAGE
3y 1m to grant Granted Oct 20, 2026
Patent 12765407
SEMICONDUCTOR PACKAGE
3y 0m to grant Granted Oct 13, 2026
Patent 12764958
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
2y 7m to grant Granted Oct 13, 2026
Patent 12764922
SEMICONDUCTOR STRUCTURE
2y 5m to grant Granted Oct 13, 2026
Patent 12757588
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
2y 6m to grant Granted Oct 06, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
96%
With Interview (+9.5%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 472 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month