DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4-7, and 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hoya (US 2021/0407899) in view of Hatano et al. (US 2018/0145007).
In reference to claim 1, Hoya (US 2021/0407899), hereafter “Hoya,” discloses a half-bridge power device comprising:
a module substrate, 40 in Figure 4, an upper surface of the module substrate including a first half-bridge area, a second half-bridge area, a first half-bridge lead-out area, and a second half-bridge lead-out area, which are separate;
a plurality of half-bridge power chips, including a first half-bridge power chip and a second half-bridge power chip, the first half-bridge power chip and the second half- bridge power chip being connected to the first half-bridge area and the second half- bridge area, respectively;
a plurality of power connector terminals, including a first power connector terminal, a second power connector terminal, and a third power connector terminal, the first power connector terminal, the second power connector terminal, and the third power connector terminal being connected to the first half-bridge area, the second half- bridge area, the first half-bridge power chip, and the second half-bridge power chip to form a power loop of the half-bridge power device;
wherein a first end of the first power connector terminal, Pu in Figure 5, is connected to a DC positive electrode (DC+) 255 through a positive busbar 211/251/253 and extended beyond a first end of the module substrate, wherein a second end of the third power connector terminal Nu/31/35 is connected to a DC negative electrode (DC-) and extended beyond a first end of the module substrate, and wherein the positive busbar is located above the third power connector terminal, and a second end of the positive busbar and the second end of the third power connector terminal have a first height difference, Figures 7 and 8.
Hoya does not disclose wherein the first half-bridge lead-out area and the second half-bridge lead-out area are located at ends of the module substrate, respectively.
Hatano et al. (US 2018/0145007), hereafter “Hatano,” discloses a half-bridge power device including teaching a first half-bridge lead-out area, RT at top in Figure 46A, and a second half-bridge lead-out area, RT at bottom, are located at ends of the module substrate, respectively, paragraph 407. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first half-bridge lead-out area and the second half-bridge lead-out area to be located at ends of the module substrate, respectively. One would have been motivated to do so in order to connect the device to a signal unit to control operation of the device, paragraph 437.
In reference to claim 2, Hoya discloses a second end of the first power connector terminal Pu is connected to the first half-bridge area and also connected to a drain electrode of the first half-bridge power chip, Sup11/Qup11 in Figures 3 and 4,
wherein a first end of the second power connector terminal is connected to a source electrode of the first half-bridge power chip, Sup11/Qup11, a second end of the second power connector terminal serves as an alternating current (AC) output terminal of the half-bridge power device Ou/49 in Figures 3-5, paragraph 85, a third end of the second power connector terminal is connected to the second half-bridge area and also connected to a drain electrode of the second half-bridge power chip, Slo11/Qlo11 and the second end of the second power connector terminal is extended beyond a second end of the module substrate, Figure 1 and paragraph 91, and
wherein a first end of the third power connector terminal Nu is connected to a source electrode of the second half-bridge power chip Slo11/Qlo11, Figure 3 and paragraph 48.
In reference to claim 4, Hoya discloses the second half-bridge power chip comprises a plurality of second chips, Slo11, Slo12, Figure 4.
Hoya does not disclose in the first embodiment, wherein the first end of the third power connector terminal is divided into multiple connecting pins which are connected to the source electrodes of the plurality of second chips.
However, Hoya disclose in the second embodiment of Figure 12, wherein the first end of the third power connector terminal Nu is divided into multiple connecting pins 395 which are connected to the source electrodes of the plurality of second chips, Slo11, Slo12, paragraphs 147, 156 and 157. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first end of the third power connector terminal to be divided into multiple connecting pins which are connected to the source electrodes of the plurality of second chips. One would have been motivated to do so in order to provide connection at multiple points, paragraph 157.
In reference to claim 5, Hoya does not disclose the connection of the first half-bridge power chip and the second half- bridge power chip to the first half-bridge lead-out area and the second half-bridge lead- out area, respectively, comprises: a gate electrode of the first half-bridge power chip and the first half-bridge lead-out area connected through a bonding line, and a gate electrode of the second half-bridge power chip and the second half- bridge lead-out area connected through a bonding line.
Hatano teaches the connection of the first half-bridge power chip Q1 in Figure 57, and the second half- bridge power chip Q4 to the first half-bridge lead-out area and the second half-bridge lead- out area, respectively, comprises: a gate electrode of the first half-bridge power chip and the first half-bridge lead-out area connected through a bonding line GW1, and a gate electrode of the second half-bridge power chip and the second half- bridge lead-out area connected through a bonding line GW4, paragraphs 523.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the connection of the first half-bridge power chip and the second half- bridge power chip to the first half-bridge lead-out area and the second half-bridge lead- out area, respectively, to comprise; a gate electrode of the first half-bridge power chip and the first half-bridge lead-out area connected through a bonding line, and a gate electrode of the second half-bridge power chip and the second half- bridge lead-out area connected through a bonding line.
One would have been motivated to do so in order to connect the device to a signal unit to control operation of the device, paragraph 437.
In reference to claim 6, Hatano discloses wherein the first half-bridge power chip and the second half-bridge power chip are connected to the first half-bridge lead-out area and the second half-bridge lead-out area, respectively, to form a signal control loop of the half-bridge power device, paragraph 437.
In reference to claim 7, Hoya does not disclose the upper surface of the module substrate comprises a copper clad layer, the copper clad layer including the first half-bridge area, the second half-bridge area, the first half-bridge lead-out area, and the second half-bridge lead-out area, which are separate.
Hatano discloses the upper surface of the module substrate comprises a copper clad layer, the copper clad layer including the first half-bridge area, 25D1 in Figure 57, the second half-bridge area, 25D4, the first half-bridge lead-out area, GL1, and the second half-bridge lead-out area GL4, which are separate, Figure 57 and paragraphs 531 and 582. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the upper surface of the module substrate to comprise a copper clad layer, the copper clad layer including the first half-bridge area, the second half-bridge area, the first half-bridge lead-out area, and the second half-bridge lead-out area, which are separate. To do so would have merely been to combine prior art elements according to known methods to yield predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007). MPEP 2143 I. A. In this case combining Hoya and Hatano to apply the copper clad substrate of Hatano as the unspecified substrate of Hoya.
In reference to claim 10, Hoya does not disclose materials used for the power connector terminals include copper.
Hatano teaches materials used for the power connector terminals include copper, paragraph 581. It would have been obvious to one of ordinary skill in the art before the effective filing date of the inventio for materials used for the power connector terminals to include copper. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting copper for the unspecified conductor of Hoya.
In reference to claim 11, Hoya does not disclose materials used for the module substrate include active metal brazing (AMB) ceramic substrate or direct bonding copper (DBC) ceramic substrate.
Hatano teaches materials used for the module substrate include active metal brazing (AMB) ceramic substrate or direct bonding copper (DBC) ceramic substrate, paragraph 205. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for materials used for the module substrate to include active metal brazing (AMB) ceramic substrate or direct bonding copper (DBC) ceramic substrate. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting AMB or DBC for the unspecified substrate of Hoya.
In reference to claim 12, Hoya discloses a half-bridge power module assembly comprising a plurality of parallelly connected half-bridge power devices according to claim 1, Figures 1 and 2 and paragraphs 29-31 and 36.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Hoya (US 2021/0407899) in view of Hatano et al. (US 2018/0145007) as applied to claim 1 above and further in view of Nikitin et al. (US 2023/0411254).
In reference to claim 3, Hoya discloses the first half-bridge power chip comprises a plurality of first chips, Sup11, Sup12, Sup21, Sup22, paragraph 33.
Hoya does not disclose the first end of the second power connector terminal is divided into multiple connecting pins which are connected to the source electrodes of the plurality of first chips, respectively, and wherein a connection location between the second end of the first power connector terminal and the first half-bridge power area is situated in an area between two connecting pins among the multiple connecting pins.
Nikitin et al. (US 2023/0411254) discloses a half-bridge power device including teaching wherein the first half-bridge power chip comprises a plurality of first chips, wherein the first end of the second power connector terminal is divided into multiple connecting pins 5, 16 in Figure 1, which are connected to the source electrodes of the plurality of first chips 116, respectively, and wherein a connection location between the second end of the first power connector terminal 136 and the first half-bridge power area 110 is situated in an area between two connecting pins among the multiple connecting pins, paragraphs 44-46.
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[AltContent: textbox (Connecting pins of the 2nd power connector)][AltContent: textbox (connection location of the second end of the first power connector terminal)][AltContent: arrow][AltContent: arrow][AltContent: arrow]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first end of the second power connector terminal to be divided into multiple connecting pins which are connected to the source electrodes of the plurality of first chips, respectively, and wherein a connection location between the second end of the first power connector terminal and the first half-bridge power area is situated in an area between two connecting pins among the multiple connecting pins.
To do so would have merely been to apply a known technique to improve similar devices in the same way, KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. C. In this case applying the stacked configuration of power connector terminals of Hoya to the branched power connector terminals of Nikitin.
Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Hoya (US 2021/0407899) in view of Hatano et al. (US 2018/0145007) as applied to claim 1 above and further in view of Kapusta et al. (US 2020/0176360).
In reference to claim 8, Hoya discloses wherein the first end of the positive busbar is connected to the first end of the first power connector terminal by welding, paragraph 117.Ho
Hoya does not disclose the second end of the positive busbar has a first weld spot for connection to a lead frame corresponding to the DC positive electrode (DC+) by welding, and wherein the second end of the third power connector terminal has a second weld spot for connection to a lead frame corresponding to the DC negative electrode (DC-) by welding.
Kapusta et al. (US 2020/0176360), hereafter “Kapusta,” discloses a half-bridge power device including teaching a terminal, 184 (DC+) in Figure 11, that has a first weld spot for connection to a lead frame corresponding to the DC positive electrode (DC+) by welding, and a terminal 184 (DC-) that has a second weld spot for connection to a lead frame corresponding to the DC negative electrode (DC-) by welding, paragraph 45. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the second end of the positive busbar to have a first weld spot for connection to a lead frame corresponding to the DC positive electrode (DC+) by welding, and the second end of the third power connector terminal to have a second weld spot for connection to a lead frame corresponding to the DC negative electrode (DC-) by welding. One would have been motivated to do so in order to make outside electrical connections, id.
In reference to claim 9, Hoya in view of Hatano does not disclose the second end of the second power connector terminal is connected to a lead frame corresponding to the alternating current (AC) output terminal.
Kapusta discloses a half-bridge power device including teaching the second end of the second power connector terminal is connected to a lead frame corresponding to the alternating current (AC) output terminal, paragraph 45. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the second end of the second power connector terminal to be connected to a lead frame corresponding to the alternating current (AC) output terminal. One would have been motivated to do so in order to make outside electrical connections, id.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al. (US 2014/0218871), Cole et al. (US 2022/0102260), Hoya (US 2020/0303362), Yoshihara et al. (US 2012/0256194) and Bayerer et al. (DE 102005063532).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRYAN R. JUNGE whose telephone number is (571)270-5717. The examiner can normally be reached M-F 8:00-4:30 CT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRYAN R JUNGE/ Primary Examiner, Art Unit 2897