DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
2. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
3. Claim(s) 1-6, 11, is/are rejected under 35 U.S.C. 103 as being unpatentable over Cho et al., US 2022/0199750 A1.
Claim 1. Cho et al., disclose a display device (such as the one in figs. 2, 4 and 7) comprising:
-a substrate (item 100) including a display area (item AA) including a plurality of pixels (item PX, [0046]) and a non-display area (item PA) around the display area;
-data lines (item DL) extending from the display area;
-a multiplexer (item MCP, [0046]) in the non-display area and connected to the data lines;
-a display driving circuit (item DD) in the non-display area and on one side of the multiplexer;
-and fan-out lines (item DSL) connecting the multiplexer and the display driving circuit.
In the embodiment of FIG. 2, Cho et al., appear not to explicitly disclose wherein the fan-out lines include first fan-out lines connected to the multiplexer and second fan-out lines connected to the first fan-out lines and the display driving circuit, and the first fan-out lines and the second fan-out lines are on different layers.
However, in other embodiments (see the embodiment of FIG. 7, [0116]), Cho et al., disclose the area from the left side of the display area AA to the left side of the multiplexer circuit unit MCP, i.e., the portion of the display area AA protruding leftward from the left side of the multiplexer circuit unit MCP may be defined as an LCUT portion. As described in FIG. 1, the data lines DL disposed more outside in the first direction DR1 than the spider line DSPL disposed in the first lower peripheral area, the bending area BA, and the second peripheral area PAb may be connected to the spider line DSPL through the connection line CL due to the formation of the LCUT portion.
Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention to use multiple fan-out lines to connect a multiplexer to a display driving circuit via different layers in a multilayer PCB that provides significant advantages in terms of signal integrity, routing density, and space optimization. This technique allows for complex, high-density connections required by modern, compact display systems.
Claim 2. Cho et al., disclose the display device of claim 1, wherein the first fan-out lines and the second fan-out lines include different materials (this limitation would read through [0132] wherein is disclosed the 4a_2 connection line CL4a_2 and the 3a data line DL3a are located in the different conductive layers, and thus may be insulated from each other).
Claim 3. Cho et al., disclose the display device of claim 1, wherein the first fan-out lines include a first-first fan-out line and a first-second fan-out line spaced apart from each other, and the first-first fan-out line and the first-second fan-out line are alternately arranged along one direction (this limitation would read through [0132] wherein is disclosed the 4a_2 connection line CL4a_2 and the 3a data line DL3a are located in the different conductive layers, and thus may be insulated from each other).
Claim 4. Cho et al., disclose the display device of claim 3, wherein the first-first fan-out line is electrically connected to a first one of the second fan-out lines corresponding to the first-first fan-out line through a first contact hole, and the first-second fan-out line is electrically connected to a second one of the second fan-out lines corresponding to the first-second fan-out line through a second contact hole (this limitation would read through [0133] wherein is disclosed the 4a_1 connection line CL4a_1 and the 4a_3 connection line CL4a_3 may be connected to the 4a_2 connection line CL4a_2 through a first contact hole CNT1. The first contact hole CNT1 may completely penetrate the first insulating layer 160 in the thickness direction).
Claim 5. Cho et al., disclose the display device of claim 1, wherein the non-display area includes:
-a first gate metal layer (item GE2) on the substrate;
-a first interlayer insulating layer (item 130) on the first gate metal layer;
-a second gate metal layer (item GE6) on the first interlayer insulating layer;
-a second interlayer insulating layer (item 140) on the second gate metal layer;
-and a data metal layer (item DL) on the second interlayer insulating layer.
Claim 6. Cho et al., disclose the display device of claim 5, wherein the first fan-out lines include a first-first fan-out line and a first-second fan-out line spaced apart from each other, the first-first fan-out line is made of the first gate metal layer, the first-second fan-out line is made of the second gate metal layer, and the second fan-out lines are made of the data metal layer (this limitation would read through [0132] wherein is disclosed the 4a_2 connection line CL4a_2 and the 3a data line DL3a are located in the different conductive layers, and thus may be insulated from each other).
Allowable Subject Matter
4. Claims 7-10, 12-15, are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
(A) Claim 7 contains allowable subject matter because none of references of record teach or suggest, either singularly or in combination, at least the limitation of a driving voltage line on the non-display area of the substrate and between the multiplexer and the display driving circuit, wherein the driving voltage line overlaps a first fan-out line from among the first fan-out lines and does not overlap a second fan-out line from among the second fan-out lines.
(B) Claims 8-10, are also allowable as depend on claim 7.
(C) Claim 12 contains allowable subject matter because none of references of record teach or suggest, either singularly or in combination, at least the limitation of a driving voltage line on the second interlayer insulating layer and spaced apart from the second fan-out lines; a via layer on the driving voltage line and the second interlayer insulating layer; a coupling member on the driving voltage line and the second interlayer insulating layer; and an encapsulation substrate on the coupling member.
(D) Claims 13-15, are also allowable as depend on claim 12.
5. Claims 16-24 are allowed.
Reasons for Allowance
6. The following is an examiner's statement of reasons for allowance:
7. Regarding claims 16-24, the prior art failed to disclose or reasonably suggest a driving voltage line in the non-display area and configured to apply a driving voltage to the display area; a display driving circuit in the non-display area and on one side of the driving voltage line; and fan-out lines electrically connecting the display area and the display driving circuit to each other, wherein the fan-out lines include first fan-out lines that overlap the driving voltage line and second fan-out lines that do not overlap the driving voltage line, and the first fan-out lines and the second fan-out lines include different materials.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILNER JEAN BAPTISTE whose telephone number is (571)270-7394. The examiner can normally be reached M-T 8:00-6:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/W.J/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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