DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group (claims 1-20) in the reply filed on 01/26/2026 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3, 5, and 14- 20 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Weng (US 2021/0223489).
Regarding claim 1, Weng discloses a method of forming a semiconductor package, comprising: bonding at least one integrated circuit structure (Fig.10A, numeral 1001) to an interposer structure (101); bonding a photonic structure (105) to the interposer structure (101), wherein the photonic structure (105) has a recessed feature (Fig.1B, numeral 171) covered by a mask (173) (Fig.1A); forming an encapsulation layer (109) around the at least one integrated circuit structure (1001) and the photonic structure (105); and removing at least a portion of the mask layer from the photonic structure ([0056]).
Regarding claim 3, Weng discloses wherein the mask layer (173) is partially removed from the photonic structure, and the remaining mask layer (173) remains in the recessed feature (171) (Fig.1A; Fig.2).
Regarding claim 5, Weng discloses wherein a top surface of the remaining mask (173) layer is higher than a top surface of the photonic structure (105) (Fig. 1A).
Regarding claim 14, Weng discloses a method of forming a semiconductor package, comprising: providing an interposer structure (Fig.10A, numeral 101); bonding at least one integrated circuit structure (1001) disposed on onto the interposer structure (101); bonding a photonic structure (105) disposed on onto the interposer structure (101) and aside the at least one integrated circuit structure (1001), wherein the photonic structure (105) has a recessed feature (Fig.1A, numeral 110; Fig.1B, numeral 171; [0049]) at a top surface thereof; and forming an encapsulation layer (Fig.1A, numeral 109) disposed around the at least one integrated circuit structure (1001) and the photonic structure (105) (Fig.10A).
Regarding claim 15, Weng discloses wherein the recessed feature (171) of the photonic structure (105) is free of the encapsulation layer (109).
Regarding claim 16, Weng discloses forming a mask layer (Fig.1A, numeral 173) in the recessed feature.
Regarding claim 17, Weng discloses wherein the mask layer (173) comprises a transparent material ([0049]).
Regarding claim 18, Weng discloses wherein a top surface of the mask layer is flushed with a top surface of the encapsulation layer (Fig.2; [0056]).
Regarding claim 19, Weng discloses wherein a top surface of the mask layer (Fig.1A, numeral 173) is higher than a top surface of the photonic structure (105).
Regarding claim 20, Weng discloses wherein the photonic structure comprises a first substrate (151) bonded to a second substrate (161-165), the first substrate (151) faces the interposer structure (101), and the recessed feature (173) is at a surface of the second substrate (161-165) facing away the interposer structure (101).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 4, 6, and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Paital (US 2023/0420378) in view of Hsia (US 2022/0043208).
Regarding claim 1, Paital discloses a method of forming a semiconductor package, comprising: bonding at least one integrated circuit structure (Fig. 5, numeral 2256) to an interposer structure (2257); bonding a photonic structure (2256) ([0078]; [0099]) to the interposer structure (2257), forming an encapsulation layer (2268) around the at least one integrated circuit structure (2256) and the photonic structure (2256).
Paital does not disclose wherein the photonic structure has a recessed feature covered by a mask; and removing at least a portion of the mask layer from the photonic structure.
Hsia however discloses wherein the photonic structure (Fig. 12, numeral 100; [0028]) has a recessed feature (129) covered by a mask (Fig.13, numeral 130); and removing at least a portion of the mask layer from the photonic structure ([0050]: removing of excess material).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Paital with Hsia to have the photonic structure has a recessed feature covered by a mask; and removing at least a portion of the mask layer from the photonic structure for the purpose of improving optical coupling from an edge-mounted optical fiber (Hsia, [0051]).
Regarding claim 3, Hsia discloses wherein the mask layer is partially removed from the photonic structure, and the remaining mask layer remains in the recessed feature ([0051]).
Regarding claim 4, Hsia discloses wherein a top surface of the remaining mask layer (Fig.13, numeral 130) is flushed with a top surface of the photonic structure (102C).
Regarding claim 6, Hsia discloses wherein the photonic structure comprises a first substrate (125) bonded to a second substrate (102C), the first substrate (125) faces the interposer structure (140), and the recessed feature (129); (130) is provided at a surface of the second substrate (102C) facing away the interposer structure (140).
Regarding claim 7, Hsia discloses wherein the first substrate (125) is bonded to the second substrate (102c) through a first passivation layer (126) and a second passivation layer (102B), respectively, and an optical coupler (107) ([0058]) is embedded in the first passivation layer (102B) (Fig.14).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Paital in view of Hsia as applied to claim 1 above, and further in view of He (US 2023/0197543).
Regarding claim 8, Paital does not disclose after forming the encapsulation layer, thinning the interposer structure until surfaces of through substrate vias within the interposer structure are exposed.
He however discloses after forming the encapsulation layer, thinning the interposer structure until surfaces of through substrate vias within the interposer structure are exposed ([0351]; [0052]; Fig, 5C).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was field to modify Paital with He to perform after forming the encapsulation layer, thinning the interposer structure until surfaces of through substrate vias within the interposer structure are exposed for the purpose of revealing conductive contacts (He, [0052]).
Claim(s) 9, and 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weng in view of Hsia.
Regarding claim 9, Weng discloses a method of forming a semiconductor package, comprising: bonding a memory device (Fig.10A, numeral 1001; [0092]) to an interposer structure (101); bonding a system device (1003) to the interposer structure (101); bonding a photonic device (104) to the interposer (101) , wherein the photonic device comprises a recess feature (Fig.1B, numeral 171) and a mask layer (173) is formed in the recessed feature (171); forming an encapsulation layer (Fig.1A; Fig. 10A, numeral 109) covering the memory device, the system device, the photonic device and the mask layer (Fig.10A); and polishing the encapsulation layer ([0095]).
Weng does not discloses wherein the photonic device comprises connectors at a first side and a recessed feature at a second side opposite to the first side.
Hsia however discloses wherein the photonic device (110); (120) (Fig.10; Fig.12) comprises connectors (112); (116) at a first side and a recessed feature (129) at a second side opposite to the first side (Fig.12).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Weng with Hsia to have the photonic device comprising connectors at a first side and a recessed feature at a second side opposite to the first side for the purpose of providing electrical routing (Hsia, [0040]).
Regarding claim 11, Weng discloses partially removing the mask layer ([0056]).
Regarding claim 12, Weng discloses wherein a height of the photonic device (Fig. 10A, numeral 105) is substantially the same as a height of the memory device or the system device (1001), (1003).
Regarding claim 13, Weng wherein a height of the photonic device is less than a height of the memory device or the system device (Figs. 16; numerals 105; 1101l 901; [0114]; note: height of (105) and (1101) is less than (1001) and (1003)).
Allowable Subject Matter
Claims 2 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The search of the prior art does not disclose or reasonably suggest completely removing the mask layer as required by claims 2 and 10.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIA SLUTSKER whose telephone number is (571)270-3849. The examiner can normally be reached Monday-Friday, 9 am-6 pm.
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/JULIA SLUTSKER/ Primary Examiner, Art Unit 2891
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