DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 15-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. As to claim 15 the claim requires and forming an insulator horizontally adjacent the cavity and below a portion of the extrinsic base such that the insulator is below the notch.
However, the cavity is formed in the insulator thus the insulator could not be formed adjacent to the cavity since the cavity does not exist at the time of formation of the insulator.
Likewise, Applicant does not teach forming an insulator horizontally adjacent the cavity and below a portion of the extrinsic base such that the insulator is below the notch. Applicant forms the insulator that is below the notch before the extrinsic bas is formed, see figure 10 the insulator is formed and in figure 11 the intrinsic and extrinsic base after forming the insulator thus applicant does not form the insulator under the notch.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
a. As to claims 1 and 15 there is no solid structure set forth to define a cavity. The plain ordinary meaning of cavity is: an empty space within a solid object, in particular the human body.
Or
an unfilled space within a mass.
Recitation of extending over a cavity
And
an insulator horizontally adjacent the cavity
does not set forth what the cavity is in or the mass or solid object that has the empty portion.
Further notch lacks antecedent basis.
b. As to claim 5, it is not clear what the trench is provided in.
b. As to claim 7 it is unclear if the notch in the upper surface is the same notch as in claim 1 or a different notch
c. As to claim 8 there is no solid structure set forth to define a cavity. The plain ordinary meaning of cavity is: an empty space within a solid object, in particular the human body.
Or
an unfilled space within a mass.
Recitation of extending over a cavity
And
an insulator horizontally adjacent the cavity
does not set forth what the cavity is in or the mass or solid object that has the empty portion.
d. As to claim 12, it is not clear what the trench is provided in.
e. As to claim 19 it is unclear if the notch in claim 19 is the same as the notch in claim 15.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1,2,7-9 is/are rejected under 35 U.S.C. 102a1/a2 as being anticipated by Adkisson (20150014747) cited on Ids.
a. As to claims 1, 7, 15 Adkisson teach a device and method of forming a device comprising: a bipolar transistor structure (figure 9-20 specifically especially figures 19 and 20) including an extrinsic base (item 72) protruding from an intrinsic base (item 22) of the bipolar transistor structure the extrinsic base comprising a notch in the upper surface (see attached it is equivalent to a corner notch used in watch straps) and extending over a cavity (element 69 reference in other figures e.g. figure 12); and an insulator horizontally adjacent the cavity (item 77 see figure 12) and below a portion of the extrinsic base such that the insulator is below the notch ( 77 extends below the notch), wherein a collector extension region of the bipolar transistor structure extends laterally below the insulator and the cavity (region 16 that extends under 77 and 69 can be considered a collector extension.
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b. As to claim 2 Adkisson teaches wherein the extrinsic base includes a monocrystalline semiconductor specifically paragraph 46:
Epitaxial growth according to embodiments herein is performed via selective epitaxy. Selective epitaxial growth (SEG) of the Si/SiGe layer 87 may occur by mixing gases including: a gas containing a p-type impurity, such as di-borane (B.sub.2H.sub.6) or another boron (B)-containing gas; a silicon (Si)-containing gas, for example, one of silane (SiH.sub.4) and disilane (Si.sub.2H.sub.6); and a germanium (Ge)-containing gas, for example, one of germane (GeH.sub.4) and digermane (Ge.sub.2H.sub.6). The SEG process is usually performed at a sub-atmospheric process pressure (e.g., 40 torr) and typically with a substrate temperature between about 400.degree. C. and about 750.degree. C. The growth temperature may be at the lower end of the range if the film is grown with more Ge content. The film is only grown over exposed single-crystal Si or poly Si surfaces, but not on dielectric films such as oxide or nitride. The Si/SiGe layer 87 mainly forms an extrinsic base 72, which may be electrically connected to the intrinsic base 22.
Thus, if it is epitaxially grown over only single crystal it would also be single crystal (monocrystalline).
c. As to claim 8, Adkisson teaches a vertical bipolar transistor structure including: a collector on a substrate (see figure especially figure 19 and 20 collector item 16 on at least sidewalls of substrate 15), an intrinsic base on the collector (item 22), an extrinsic base protruding from the intrinsic base (item 72), and extending over a cavity (item 72 over item 69 figure 12), wherein an upper surface of the extrinsic base includes a notch (see figure below the notch resembles a corner notch used in watch straps), and an emitter on a portion of the intrinsic base (item 99); and an insulator horizontally adjacent the cavity and below a portion of the extrinsic base such that the insulator is below the notch (item 77 figure 12), wherein a collector extension region of the bipolar transistor structure extends laterally below the insulator and the cavity (item 17 that extends below item 69 and 77).
d. As to claim 9 Adkisson teaches wherein the extrinsic base includes a monocrystalline semiconductor specifically paragraph 46:
Epitaxial growth according to embodiments herein is performed via selective epitaxy. Selective epitaxial growth (SEG) of the Si/SiGe layer 87 may occur by mixing gases including: a gas containing a p-type impurity, such as di-borane (B.sub.2H.sub.6) or another boron (B)-containing gas; a silicon (Si)-containing gas, for example, one of silane (SiH.sub.4) and disilane (Si.sub.2H.sub.6); and a germanium (Ge)-containing gas, for example, one of germane (GeH.sub.4) and digermane (Ge.sub.2H.sub.6). The SEG process is usually performed at a sub-atmospheric process pressure (e.g., 40 torr) and typically with a substrate temperature between about 400.degree. C. and about 750.degree. C. The growth temperature may be at the lower end of the range if the film is grown with more Ge content. The film is only grown over exposed single-crystal Si or poly Si surfaces, but not on dielectric films such as oxide or nitride. The Si/SiGe layer 87 mainly forms an extrinsic base 72, which may be electrically connected to the intrinsic base 22.
The intrinsic base is SiGe paragraph 22 item 22.
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Allowable Subject Matter
Claims 3-6, 10-14, and 16-20 and would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
In conjunction with the independent claims:
As to claim 3, prior art fails to teach and or suggest wherein the collector extension region includes a silicide region extending laterally below the cavity to the insulator such the cavity is vertically between the silicide region and the extrinsic base.
As to claim 4 prior art fails to teach and or suggest wherein the insulator includes: a nitride encapsulating the cavity, and an oxide below a portion of the nitride and adjacent a portion of the collector.
As to claim 6, prior art fails to teach and or suggest further comprising a void within the extrinsic base above the insulator, wherein the void electrically separates an emitter of the bipolar transistor structure from an adjacent emitter.
As to claim 10 prior art fails to teach and or suggest wherein the collector includes a silicide region extending laterally below the cavity to the insulator such the cavity is vertically between the silicide region and the extrinsic base.
As to claim 11 prior art fails to teach and or suggest wherein the insulator includes: a nitride encapsulating the cavity, and an oxide below a portion of the nitride and adjacent a portion of the collector.
As to claim 13, prior art fails to teach hand or suggest further comprising a void within the extrinsic base above the insulator, wherein the void electrically separates an emitter of the vertical bipolar transistor structure from an adjacent emitter.
As to claim 14 prior art fails to teach and or suggest further comprising a silicide material on an upper surface, a sidewall, and a lower surface of the extrinsic base.
As to claim 17 prior art fails to teach and or suggest wherein forming the insulator includes: forming a nitride to encapsulate the cavity, and forming an oxide below a portion of the nitride and adjacent a portion of the collector.
As to claim 19 while the prior art teaches an insulator in the notch item 93 figure 19 prior art does not teach forming it at the same time as the insulator that forms the cavity.
As to claim 20 prior art fails to teach and or suggest further comprising forming a void within the extrinsic base above the insulator, wherein the void electrically separates an emitter of the bipolar transistor structure from an adjacent emitter.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW L REAMES whose telephone number is (571)272-2408. The examiner can normally be reached M-Th 6:00 am-4:00 pm EST.
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/MATTHEW L. REAMES/
Primary Examiner
Art Unit 2896
/MATTHEW L REAMES/Primary Examiner, Art Unit 2896