Prosecution Insights
Last updated: August 18, 2026
Application No. 18/485,966

POWER MODULE PACKAGE HAVING MIRRORED LEADS

Final Rejection §103
Filed
Oct 12, 2023
Priority
Oct 13, 2022 — provisional 63/379,387
Examiner
NADAV, ORI
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Components Industries LLC
OA Round
2 (Final)
60%
Grant Probability
Moderate
3-4
OA Rounds
11m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
424 granted / 704 resolved
-7.8% vs TC avg
Strong +21% interview lift
Without
With
+21.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
51 currently pending
Career history
773
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
55.1%
+15.1% vs TC avg
§102
9.9%
-30.1% vs TC avg
§112
31.2%
-8.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 704 resolved cases

Office Action

§103
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA DETAILED ACTION Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 9-13 and 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (11,562,948) in view of Pollock (2002/0014693) and Carson et al. (10,535,611). Regarding claim 9, Lin et al. teach in figure 15 and related text a method, comprising: coupling a semiconductor die 10 to a substrate 4 (see figure 3); coupling a leadframe 20 (see figure 11) to at least one of the semiconductor die or the substrate; and forming a package by encapsulating the semiconductor die, the substrate, and a portion of the leadframe in a molding material 300, the molding material including an elongated protrusion (the portion located above ST in figure 3) on a top surface of the package, wherein a notch ST (see figure 3) is defined in a side surface of the package between a pair of extensions, the elongated protrusion being parallel with the side surface. Lin et al. do not explicitly state encapsulating the substrate and wherein the molding material including an elongated protrusion being parallel with the side surface. Pollock teaches in figures 2 and related text molding 5 encapsulating substrate 2. Carson et al. teach in figure 4 and related text molding material 140 including an elongated protrusion being parallel with the side surface. Carson et al., Lin et al. and Pollock are analogous art because they are directed to packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lin et al. because they are from the same field of endeavor.It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to encapsulate the substrate, as taught by Pollock, and to form the molding material including an elongated protrusion being parallel with the side surface, in Lin et al.’s device, in order to improve the structural integrity and the characteristics of the device, respectively. Regarding claim 10, Lin et al. do not teach that the semiconductor die is coupled to the substrate via a printed solder. Carson et al. teach in figure 3B and related text that the semiconductor die 130 is coupled to the substrate 105 via a printed solder 134. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to couple the semiconductor die is coupled to the substrate via a printed solder, as taught by Carson et al., in prior art’s device, in order to simplify the processing steps of making the device by using conventional solder attachment. Regarding claim 11, Lin et al. teach in figure 15 and related text that the lead frame is coupled to the semiconductor die via interconnects or a wirebond 131. Regarding claim 12, Lin et al. do not teach that forming the package includes forming at least the elongated protrusion using a transfer molding process. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form at least the elongated protrusion using a transfer molding process in prior art’s device, in order to simplify the processing steps of making the device by using conventional transfer molding process (see rejection of claim 26 below). Regarding claim 13, Lin et al. teach in figure 5A and related text trimming the leadframe to define a plurality of leads 200 extending from the molding material along a first direction, the plurality of leads including a pair of leads extending respectively from the pair of extensions (see figure 15), the elongated protrusion being aligned along a second direction orthogonal to the first direction, Regarding claims 21-22, in the combined device, the package includes defining a trench in the molding material, the trench being disposed on the top surface of the package between the elongated protrusion (see Carson figure 4) and a conductive surface of the substrate that is exposed through the molding material, and wherein the trench is parallel to the elongated protrusion. Regarding claims 23-24, in the combined device, a surface of the elongated protrusion and a surface of the trench collectively define at least a portion of a lead- substrate creepage distance, and wherein the notch has a surface that defines at least a portion of a lead-lead creepage distance. Regarding claim 25, Lin et al. teach in figure 15 and related text that the notch is disposed between a pair of extensions made from the molding material. Claims 26-30 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (11,562,948) in view of Carson et al. (10,535,611) and Long (5,206,794). Regarding claims 26 and 29, Lin et al. teach in figure 15 and related text a method, comprising: coupling a semiconductor die 10 to a substrate 4 (see figure 3); coupling a leadframe 20 (see figure 11) to at least one of the semiconductor die or the substrate, the leadframe including at least a first lead 200 and a second lead (another 200) extending in a first direction; and forming a molding material 300 around at least a portion of the semiconductor die and at least a portion of the leadframe using a molding process, the molding process defining a trench (in-between moldings 300) and a notch ST (see figure 3) in the molding material, the trench being aligned along a second direction orthogonal to the first direction, the notch ST being disposed between the first lead 200 and the second lead (another 200). Lin et al. do not explicitly state having a trench and do not teach using transfer molding process. Carson et al. teach in figure 4 and related text molding material 140 comprising trenches. Long teaches in figure 2A and related text using transfer molding process. Carson et al., Lin et al. and Long are analogous art because they are directed to packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lin et al. because they are from the same field of endeavor.It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use a transfer molding process and to use a trench, as taught by Long and Carson et al., respectively, in Lin et al.’s device, in order to simplify the processing steps of making the device and improve the device characteristics, respectively. The combination is motivated by the teaching of Long who states that it conventional to use transfer molding process. Regarding claim 27, in the combined device, the molding material defines an elongated protrusion disposed between the trench and notch. Regarding claim 28, in the combined device, the trench and the elongated protrusion collectively define at least a portion of a lead-substrate creepage distance. Regarding claim 30, Lin et al. teach in figure 15 and related text that the notch is disposed between a pair of extensions made from the molding material. Claims 32-36 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (11,562,948) in view of Carson et al. (10,535,611). Regarding claim 32, Lin et al. teach in figure 15 and related text a method, comprising: coupling a semiconductor die 10 to a substrate 4 (see figure 3); coupling a leadframe 20 (see figure 11) to at least one of the semiconductor die or the substrate, the leadframe including at least a first lead 200 and a second lead (another 200) extending in a first direction; and forming a package by encapsulating the semiconductor die, at least a portion of the substrate 4 (see figure 4), and at least a portion of the leadframe in a molding material 300 such that a surface of the substrate 4 is exposed through the molding material 300 (see figure 4), the molding material defining an elongated protrusion (the portion located above ST in figure 3) and a trench ST (see figure 3) between the elongated protrusion and the surface of the substrate, the elongated protrusion and the trench being aligned along a second direction orthogonal to the first direction, wherein, after formation of the package, a surface of the package includes the elongated protrusion and the trench. Lin et al. do not explicitly state having a trench. Carson et al. teach in figure 4 and related text molding material 140 comprising trenches. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use a trench, as taught by Carson et al., in Lin et al.’s device, in order to improve the device characteristics. Regarding claim 33, Lin et al. teach in figure 15 and related text that forming the molding material includes forming a notch ST between the first lead 200 and the second lead (another 200). Regarding claim 34, Lin et al. do not teach that that a surface of the elongated protrusion is coplanar with the surface of the substrate. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a surface of the elongated protrusion coplanar with the surface of the substrate, in Lin et al.’s device, in order to simplify the processing steps of making the device. Regarding claim 35, in the combined device, the trench and the elongated protrusion collectively define at least a portion of a lead-substrate creepage distance. Regarding claim 36, Lin et al. do not teach that the elongated protrusion and the trench are defined during a transfer molding process. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the elongated protrusion and the trench defined during a transfer molding process in prior art’s device, in order to simplify the processing steps of making the device by using conventional transfer molding process (see rejection of claim 26 above). Response to Arguments Applicant’s arguments with respect to claim(s) have been considered but are moot because of the new ground of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ORI NADAV whose telephone number is 571-272-1660. The examiner can normally be reached between the hours of 7 AM to 4 PM (Eastern Standard Time) Monday through Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). O.N. /ORI NADAV/ 6/29/2026 PRIMARY EXAMINER TECHNOLOGY CENTER 2800
Read full office action

Prosecution Timeline

Oct 12, 2023
Application Filed
Mar 18, 2026
Non-Final Rejection mailed — §103
Jun 05, 2026
Examiner Interview Summary
Jun 05, 2026
Applicant Interview (Telephonic)
Jun 17, 2026
Response Filed
Jul 02, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12696483
Integrated Assemblies and Methods of Forming Integrated Assemblies
2y 11m to grant Granted Jul 28, 2026
Patent 12660156
INTERCONNECT STRUCTURES FOR INTEGRATED CIRCUITS
6y 3m to grant Granted Jun 16, 2026
Patent 12648480
PACKAGE WITH MOLD-EMBEDDED INDUCTOR AND METHOD OF FABRICATION THEREFOR
3y 9m to grant Granted Jun 02, 2026
Patent 12642092
CHIP PACKAGE WITH DECOUPLED THERMAL MANAGEMENT
4y 2m to grant Granted May 26, 2026
Patent 12635556
SEMICONDUCTOR DEVICE
1y 10m to grant Granted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
60%
Grant Probability
82%
With Interview (+21.3%)
3y 9m (~11m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 704 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month