Prosecution Insights
Last updated: August 17, 2026
Application No. 18/486,211

INTEGRATED PROCESS FLOW FOR SENSOR PACKAGE

Non-Final OA §102§112
Filed
Oct 13, 2023
Examiner
GALVAN, ANGELICA ROS ESTIGOY
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
21 currently pending
Career history
11
Total Applications
across all art units

Statute-Specific Performance

§103
28.6%
-11.4% vs TC avg
§102
34.3%
-5.7% vs TC avg
§112
37.1%
-2.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §112
DETAILED ACTION This Office Action is in response to Application filed on October 13, 2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicants’ election without traverse of Species A drawn to a method of forming an integrated chip device as recited in claims 15-34 and drawn to the embodiments shown in Figs. 4-19 in the reply filed on June 17, 2026 is acknowledged. Claim Objections Claims 21, 23-25, and 27 are objected to because of the following informalities: On line 7 of claim 21, the limitation “etching first openings through the piezoelectric layer” should be written as “etching the piezoelectric layer to create first openings” or “etching the piezoelectric layer to form first openings” because an opening indicates a lack of material, and etching is a process which is performed on a material. On line 8 of claim 21, the limitation “etching second openings in the second semiconductor layer” should be written as “etching the second semiconductor layer to create second openings” or “etching the second semiconductor layer to form second openings” because an opening indicates a lack of material, and etching is a process which is performed on a material. The limitation “etching the second openings” in claim 23 should be written as “etching the second semiconductor layer to create second openings”. On line 9 of claim 21, the limitation “etching third openings in the sacrificial layer” should be written as “etching the sacrificial layer to create third openings” because an opening indicates a lack of material, and etching is a process which is performed on a material. The limitation “etching the third openings” in claim 23 should be written as “etching the sacrificial layer to create third openings”. The limitation “etching the third openings” in claim 24 should be written as “etching the sacrificial layer to create third openings”. The limitation “etching of the third openings” in claim 25 should be written as “etching the sacrificial layer to create third openings”. The limitation “etching of the third openings” in claim 27 should be written as “etching the sacrificial layer to create third openings”. On lines 5-6 of claim 25, a typo of “first segment” instead of “first portion” should be corrected. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 15-34 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 15-17, 20-21, and 26-27 are rendered as indefinite because they recite the term “second semiconductor layer”. The structure of the claimed “second semiconductor layer” shown in Fig. 7; the structure of the claimed “second semiconductor layer” shown in Figs. 8-9; the structure of the claimed “second semiconductor layer” shown in Figs. 10-16; the structure of the claimed “second semiconductor layer” shown in Figs. 17-18; and the structure of the claimed “second semiconductor layer” shown in Fig. 19 are all different from one another. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a second semiconductor layer” and “the second semiconductor layer”. There is a lack of antecedent basis for “the second semiconductor layer” (element 702) shown in Figs. 8-9; “the second semiconductor layer” (element 702) shown in Figs. 10-16; “the second semiconductor layer” (element 702) shown in Figs. 17-18; and “the second semiconductor layer” (element 702) shown in Fig. 19. Claims 16-20 depend on claim 15, and claims 22-27 depend on claim 21, and therefore, claims 16-20 and 22-27 are also indefinite. Claims 15-17, and 32 are rendered as indefinite because they recite the term “second sacrificial layer”. The structure of the claimed “second sacrificial layer” shown in Figs. 6-8; the structure of the claimed “second sacrificial layer” shown in Figs. 9-18; and the structure of the claimed “second sacrificial layer” shown in Fig. 19 are all different from one another. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a second sacrificial layer” and “the second sacrificial layer”. There is a lack of antecedent basis for “the second sacrificial layer” (element 602) shown in Figs. 9-18, and “the second sacrificial layer” (element 602) shown in Fig. 19. Claims 16-20 depend on claim 15, and therefore, claims 16-20 are also indefinite. Claim 17 is rendered as indefinite because it recites the term “plurality of trenches”. The structure of the claimed “plurality of trenches” shown in Figs. 8-9 is different from the structure of the claimed “plurality of trenches” shown in Fig. 10. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a plurality of trenches” and “the plurality of trenches”. There is a lack of antecedent basis for “the plurality of trenches” (element 806) shown in Fig. 10. Claims 15-16, 21, 26-28, 30, and 34 are rendered as indefinite because they recite the term “piezoelectric layer”. The structure of the claimed “piezoelectric layer” shown in Fig. 13; the structure of the claimed “piezoelectric layer” shown in Figs. 14-15; the structure of the claimed “piezoelectric layer” shown in Figs. 16-18; and the structure of the claimed “piezoelectric layer” shown in Fig. 19 are all different from one another. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a piezoelectric layer” and “the piezoelectric layer”. There is a lack of antecedent basis for “the piezoelectric layer” (element 106) shown in Figs. 14-15; “the piezoelectric layer” (element 106) shown in Figs. 16-18; and “the piezoelectric layer” (element 106) shown in Fig. 19. Claims 16-20 depend on claim 15, claims 22-27 depend on claim 21, and claims 29-34 depend on claim 28, and therefore, claims 16-20, 22-27, and 29-34 are also indefinite. Claims 15-16, 18-19, 21, 23-25, and 27-29 are rendered as indefinite because they recite the term “substrate”. The structure of the claimed “substrate” shown in Figs. 4-17 is different from the structure of the claimed “substrate” shown in Figs. 18-19. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a substrate” and “the substrate”. There is a lack of antecedent basis for “the substrate” (element 102) shown in Figs. 18-19. Claims 16-20 depend on claim 15, claims 22-27 depend on claim 21, and claims 29-34 depend on claim 28, and therefore, claims 16-20, 22-27, and 29-34 are also indefinite. Claims 15 and 18 are rendered as indefinite because they recite the term “first sacrificial layer”. The structure of the claimed “first sacrificial layer” shown in Figs. 4-17 is different from the structure of the claimed “first sacrificial layer” shown in Fig. 18. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a first sacrificial layer” and “the first sacrificial layer”. There is a lack of antecedent basis for “the first sacrificial layer” (element 402) shown in Fig. 18. Claims 16-20 depend on claim 15, and therefore, claims 16-20 are also indefinite. Claims 15-19, 21, and 23-27 are rendered as indefinite because they recite the term “first semiconductor layer”. The structure of the claimed “first semiconductor layer” shown in Figs. 5-17 is different from the structure of the claimed “first semiconductor layer” shown in Fig. 18. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a first semiconductor layer” and “the first semiconductor layer”. There is a lack of antecedent basis for “the first semiconductor layer” (element 502) shown in Fig. 18. Claims 16-20 depend on claim 15, and claims 22-27 depend on claim 21, and therefore, claims 16-20 and 22-27 are also indefinite. Claims 15, 21, 28, and 34 are rendered as indefinite because they recite the term “plurality of wires”. The structure of the claimed “plurality of wires” shown in Figs. 12-13; the structure of the claimed “plurality of wires” shown in Figs. 14-15; the structure of the claimed “plurality of wires” in Figs. 16-17; and the structure of the claimed “plurality of wires” in Fig. 19 are all different from one another. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a plurality of wires” and “the plurality of wires”. There is a lack of antecedent basis for “the plurality of wires” (element 109) shown in Figs. 14-15; “the plurality of wires” (element 109) shown in Figs. 16-17; and “the plurality of wires” (element 109) shown in Fig. 19. Claims 16-20 depend on claim 15, claims 22-27 depend on claim 21, and claims 29-34 depend on claim 28, and therefore, claims 16-20, 22-27, and 29-34 are also indefinite. Claims 15 and 28 are rendered as indefinite because they recite the term “plurality of contacts”. The structure of the claimed “plurality of contacts” shown in Figs. 15-18 is different from the structure of the claimed “plurality of contacts” shown in Fig. 19. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “a plurality of contacts” and “the plurality of contacts”. There is a lack of antecedent basis for “the plurality of contacts” (element 110) shown in Fig. 19. Claims 16-20 depend on claim 15, and claims 29-34 depend on claim 28, and therefore, claims 16-20, and 29-34 are also indefinite. Claims 15-16, 20, 28, and 33-34 are rendered as indefinite because they recite the term “air gap”. The structure of the claimed “air gap” shown in Fig. 17 is different from the structure of the claimed “air gap” in Fig. 19. Because these elements have different structures, they need to be referred to using different terms and clarified in the claims instead of “an air gap” and “the air gap”. There is a lack of antecedent basis for “the air gap” (element 114) shown in Fig. 19. Claims 16-20 depend on claim 15, and claims 29-34 depend on claim 28, and therefore, claims 16-20, and 29-34 are also indefinite. Claims 17, 26-27, and 30 are rendered as indefinite because they recite the term “cavity”. There are two cavities that are shown in the elected method shown in Figs. 4-19, and it is unclear whether “cavity” refers to “unsealed cavity” (element 904) or “sealed cavity” (element 112). Claims 18, 20, and 31are rendered as indefinite because they recites the term “proof mass”. One of the definitions for “proof mass” states that it is a known quantity of mass. This term is unclear because Applicants did not disclose a known quantity of mass associated with this element. It is also unclear how this known quantity of mass is created and measured in the method described. The limitations “a package comprising a port” and “an axis extending through a center of the sound port” recited in claim 19 are rendered as indefinite because the structure of the claimed “package”, the structure of the claimed “port” and the structure of the claimed “axis” are not shown in the elected method shown in Figs. 4-19. Claims 21, 23, 25-26, and 28-34 are rendered as indefinite because they recite the term “sacrificial layer”. There are two sacrificial layers which are shown in the elected method shown in Figs. 4-19, and it is unclear whether “sacrificial layer” refers to the “first sacrificial layer” (element 402) or the “second sacrificial layer” (element 602). Claims 22-27 depend on claim 21, and claims 29-34 depend on claim 28, and therefore, claims 22-27 and 29-34 are also indefinite. The limitation “wherein the first openings have first widths level with the plurality of wires” recited in claim 21 is rendered as indefinite because it lacks coherence. A width is a measurement which is represented by a numerical value, and a numerical value cannot be level with the plurality of wires because it is not a physical structure. It is also unclear which surface on the plurality of wires the first widths would be level with. The limitation “wherein the second openings have second widths level with the second semiconductor layer that are less than the first widths” recited in claim 21 is rendered as indefinite because it lacks coherence. A width is a measurement which is represented by a numerical value, and a numerical value cannot be level with the second semiconductor layer because it is not a physical structure. It is also unclear which surface on the second semiconductor layer the second widths would be level with. Claims 21-25, and 27 are rendered as indefinite because they recite the term “third openings”. The structure of the claimed “third openings” is not shown in the elected method shown in Figs. 4-19. Claims 22-27 depend on claim 21, and therefore, claims 22-27 are also indefinite. Claim 26 is rendered as indefinite because it recites the term “fourth opening”. The structure of the claimed “fourth openings” is not shown in the elected method shown in Figs. 4-19. The limitation “wherein the arm extends over a cavity extending through the substrate and the first semiconductor layer” recited in claim 27 is rendered as indefinite because the perspective and positional relationship of the elements recited in this limitation is unclear. The “first arm” (element 118) in Fig. 18 does not appear to be extending over a cavity. It is also unclear where the structure of the claimed “cavity” is in Fig. 18. Claims 28-32 are rendered as indefinite because they recite the term “first layer”. There are two layers described as the “first layer” in the elected method shown in Figs. 4-29, and it is unclear whether “first layer” refers to “first sacrificial layer” (element 402) or “first semiconductor layer” (element 502). Claims 29-34 depend on claim 28, and therefore, claims 29-34 are also indefinite. Claims 28-31, and 34 are rendered as indefinite because they recite the term “second layer”. There are two layers described as the “second layer” in the elected method shown in Figs. 4-29, and it is unclear whether “second layer” refers to “second sacrificial layer” (element 602) or “second semiconductor layer” (element 702). Claims 29-34 depend on claim 28, and therefore, claims 29-34 are also indefinite. The limitation “an isolated segment of the second layer is mechanically coupled to an underlying segment of the first layer by a remaining portion of the second segment of the sacrificial layer” recited in claim 31 is rendered as indefinite because it lacks coherence. An isolated segment of the second layer cannot be isolated if it is mechanically coupled to an underlying segment of the first layer. The limitation “forming a second sacrificial layer before forming the first layer of the first material” recited in claim 31 is rendered as indefinite because it is not shown in the elected method shown in Figs. 4-19. The second sacrificial layer (element 602) is formed after both the first semiconductor layer (element 502) and the first sacrificial layer (element 402). The limitation “patterning the second sacrificial layer, resulting in a first segment and a second segment surrounding the first segment” recited in claim 31 is rendered as indefinite because it is unclear when this step takes place in the elected method shown in Figs. 4-19. Claim 32 is rendered as indefinite because it recites the term “the first substrate” which lacks antecedent basis, and it is not shown in the elected method shown in Figs. 4-19. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 21 and 22, as best understood, are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chiu et al. (US 20210060610 A1) hereinafter referred to as “Chiu”. Regarding claim 21, as best understood, Chiu discloses a method of forming an integrated device (Figs. 13-22), comprising: forming a first semiconductor layer (132) on a first side of a substrate (104), wherein the first semiconductor layer (132) has a first portion and a second portion separated in a first direction; forming a sacrificial layer (134) on the first semiconductor layer (132); patterning the sacrificial layer (134) to have a plurality of discrete segments on the first portion and the second portion of the first semiconductor layer (132); forming a second semiconductor layer (136) covering the plurality of discrete segments and extending between the plurality of discrete segments; forming a piezoelectric layer (1302) over the second semiconductor layer (136); forming a plurality of wires (126) on the piezoelectric layer (1302); etching first openings (142) through the piezoelectric layer (1302), isolating a first piezoelectric segment on the first portion from a second piezoelectric segment on the second portion; etching second openings (1008) in the second semiconductor layer (136) beneath the first openings, exposing portions of the sacrificial layer (134) extending between the first portion and the second portion of the first semiconductor layer (132); and etching third openings (148a, 148b, and 148c) in the sacrificial layer (134), removing portions of the sacrificial layer (134) extending between the first portion and the second portion of the first semiconductor layer (132), and exposing an upper surface of the first semiconductor layer (132), a first segment of the sacrificial layer (134) remaining over the first portion, and a second segment of the sacrificial layer (134) remaining over the second portion. Regarding claim 22, Chiu discloses, the method of claim 21, wherein the third openings (148a, 148b, and 148c) have third widths that are greater than the second widths of the second openings (1008). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANGELICA ROSE E. GALVAN whose telephone number is (571)270-0122. The examiner can normally be reached Monday - Friday 8:30am - 6:00pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C KIM/Primary Examiner, Art Unit 2815 /ANGELICA ROSE GALVAN/Examiner, Art Unit 2815
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Prosecution Timeline

Oct 13, 2023
Application Filed
Jul 21, 2026
Non-Final Rejection mailed — §102, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

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