Prosecution Insights
Last updated: April 19, 2026
Application No. 18/486,726

SYSTEMS AND METHODS FOR DIGITAL LITHOGRAPHY SCAN SEQUENCING

Non-Final OA §103
Filed
Oct 13, 2023
Examiner
PERSAUD, DEORAM
Art Unit
2882
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
5 (Non-Final)
76%
Grant Probability
Favorable
5-6
OA Rounds
2y 9m
To Grant
88%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
572 granted / 748 resolved
+8.5% vs TC avg
Moderate +12% lift
Without
With
+12.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
36 currently pending
Career history
784
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
46.3%
+6.3% vs TC avg
§102
34.5%
-5.5% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 748 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/09/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over De Jager et al. [US 2014/0071421 A1] in view of Morimoto et al. [US 2008/0273184 A1]. Regarding claim 1, De Jager et al. discloses a digital lithography system (Figs. 1) comprising: a stage (106) configured to support a substrate (114); a bridge (160) disposed above the stage (106, as shown in Figs. 2-4); and a first lithographic processing unit (104) coupled to the bridge (160), comprising: an optical system (104) configured to transmit optical signals along an optical path both to and from the substrate (114) and the first lithographic processing unit (104), wherein the optical path extends through one or more optical components of the optical system (as shown in Fig. 5, see also paragraphs [0091]-[0092]); a scanning unit comprising an sensor (150), the sensor configured to measure the substrate via the optical path wherein the scanning unit is configured to determine, based on the measurements, surface data indicative of positions of features on a surface of the substrate, wherein the measure measurements are taken prior to digital lithographic exposure performed with respect to the substrate (paragraphs [0091]-[0093] teaches wherein the sensor captures radiation to determine alignment between the substrate 114 and, for example, the individually addressable elements 102 before and/or during exposure of the substrate) a lithographic exposure unit (104) configured to perform, based on the surface data determined using the captured measurements, digital lithographic exposure of the substrate via the along the optical path through the at least one of the one or more optical components of the optical system (paragraphs [0061] and [0235]-[0236]). De Jager et al. does not teach a scanning unit comprising an image sensor, the image sensor configured to capture images of the substrate via the optical path wherein the scanning unit is configured to determine, based on the captured images, surface data indicative of positions of features on a surface of the substrate. However, Morimoto et al. discloses a digital lithographic exposure apparatus for forming a pattern on a topside surface of a substrate has an alignment unit, which detects a position of the substrate from image data obtained through a camera from the topside surface of the substrate (paragraphs [0043]-[0044], see also Figs. 1 and 3). Therefore, it would have been obvious to one of ordinary skill in the art to provide an alignment unit comprising a camera to capture wafer image before and/or during exposure of the substrate, as taught by Morimoto et al. in the system of De Jager et al. because such a modification provides a suitable alternative alignment unit for a pattern-forming apparatus capable of achieving high throughput efficiencies (paragraph [0023] of Morimoto et al.). Regarding claim 13, De Jager et al. discloses a digital lithography system (Figs. 1) comprising: a stage (106) configured to support a first substrate at a first region and a second substrate at a second region (paragraph [0310] teaches two or more substrate tables used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure); a bridge (160) disposed above the stage (106, as shown in Figs. 2-4); a first scanning unit (150) coupled to the stage and disposed above the stage (106) at the first region (as shown in Figs. 2-4); the first scanning unit comprising a sensor, the sensor configured to measure the first substrate, wherein the scanning unit is configured to determine, based on the measurements, surface data indicative of positions of features on a surface of the first substrate, wherein the measurements are captured prior to digital lithographic exposure performed with respect to the first substrate (paragraphs [0091]-[0093] teaches wherein the sensor captures radiation to determine alignment between the substrate 114 and, for example, the individually addressable elements 102 before and/or during exposure of the substrate); a first lithographic exposure unit (104) coupled to the stage and disposed above the stage at the second region (as shown in Figs. 2-4); wherein the first lithographic exposure unit (104) is to perform, based on the surface data determined using the captured images, digital lithographic exposure of the first substrate the responsive to the first substrate being moved to the second region at a same time the first scanning unit is to generate measurements of a third substrate disposed at the first region (paragraph [0310] teaches two or more substrate tables used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure). De Jager et al. does not teach a scanning unit comprising an image sensor, the image sensor configured to capture images of the substrate via the optical path wherein the scanning unit is configured to determine, based on the captured images, surface data indicative of positions of features on a surface of the substrate. However, Morimoto et al. discloses a digital lithographic exposure apparatus for forming a pattern on a topside surface of a substrate has an alignment unit, which detects a position of the substrate from image data obtained through a camera from the topside surface of the substrate (paragraphs [0043]-[0044], see also Figs. 1 and 3). Therefore, it would have been obvious to one of ordinary skill in the art to provide an alignment unit comprising a camera to capture wafer image before and/or during exposure of the substrate, as taught by Morimoto et al. in the system of De Jager et al. because such a modification provides a suitable alternative alignment unit for a pattern-forming apparatus capable of achieving high throughput efficiencies (paragraph [0023] of Morimoto et al.). Regarding claim 17, De Jager et al. discloses a digital lithography system (Figs. 1) comprising: a stage (106) configured to support a substrate (114); a bridge (160) disposed above the stage (106, as shown in Figs. 2-4); a first scanning unit (150) coupled to the bridge (160) and disposed above the stage at a first region (as shown in Figs. 2-4); the first scanning unit comprising an sensor, the sensor configured to measure the substrate, wherein the scanning unit is configured to determine, based on the measurements, surface data indicative of positions of features on a surface of the substrate, wherein the measurements are captured prior to digital lithographic exposure performed with respect to the substrate (paragraphs [0091]-[0093] teaches wherein the sensor captures radiation to determine alignment between the substrate 114 and, for example, the individually addressable elements 102 before and/or during exposure of the substrate); and a first lithographic exposure unit (104) coupled to the bridge (160) and disposed above the stage at a second region (as shown in Figs. 2-4); wherein the first scanning unit (150) is to perform scanning of a first portion of the substrate while the first portion of the substrate is positioned in the first region at a first time, and to perform scanning of a second portion of the substrate while the second portion of the substrate is positioned in the first region at a second time; and wherein the first lithographic exposure unit is to perform, based on the surface data determined using the captured measurements, digital lithographic exposure of the first portion of the substrate while the first portion of the substrate is positioned in the second region at the second time based at least in part on the scanning performed of the first portion of the substrate at the first time (paragraph [0235]-[0236] teaches wherein a detection beam reflected off the substrate surface, pass through the lens 122 and is directed toward a detector by a half-silvered mirror between the lens 122 and the individually addressable element 102 and paragraph [0310] teaches two or more substrate tables used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure). De Jager et al. does not teach a scanning unit comprising an image sensor, the image sensor configured to capture images of the substrate via the optical path wherein the scanning unit is configured to determine, based on the captured images, surface data indicative of positions of features on a surface of the substrate. However, Morimoto et al. discloses a digital lithographic exposure apparatus for forming a pattern on a topside surface of a substrate has an alignment unit, which detects a position of the substrate from image data obtained through a camera from the topside surface of the substrate (paragraphs [0043]-[0044], see also Figs. 1 and 3). Therefore, it would have been obvious to one of ordinary skill in the art to provide an alignment unit comprising a camera to capture wafer image before and/or during exposure of the substrate, as taught by Morimoto et al. in the system of De Jager et al. because such a modification provides a suitable alternative alignment unit for a pattern-forming apparatus capable of achieving high throughput efficiencies (paragraph [0023] of Morimoto et al.). Regarding claims 2, 11, 12, 14 and 19, De Jager et al. in view of Morimoto et al. discloses further comprising: a controller configured to: cause the first lithographic processing unit to capture the measurements of the substrate at a first time during a measurement operation; determine remedial updates for a lithographic exposure pattern based on the measurements; and cause the first lithographic processing unit to perform the digital lithographic exposure of the substrate according to the lithographic exposure pattern as adjusted by the remedial updates at a second time during an exposure operation (paragraph [0235]-[0236] teaches wherein a detection beam reflected off the substrate surface, pass through the lens 122 and is directed toward a detector by a half-silvered mirror between the lens 122 and the individually addressable element 102 and paragraph [0310] teaches two or more substrate tables used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure), further comprising: a chuck to clamp the substrate to the stage prior to the measurement operation or the exposure operation, wherein the clamp of the substrate to the stage is not released until after the exposure operation, wherein the chuck comprises an electrostatic chuck (paragraphs [0065] and [0087]-[0088] of De Jager et al. and paragraphs [0043]-[0044], see also Figs. 1 and 3 of Morimoto et al.). Regarding claims 3, 16 and 20, De Jager et al. discloses further comprising: a plurality of adjacent processing regions spanning a surface profile of the substrate, wherein the first lithographic processing unit is positioned to operate on a first processing region of the plurality of adjacent processing regions (as shown in Fig. 30); and one or more additional lithographic processing units, each of the one or more additional lithographic processing units is positioned to operate on an additional processing region of the plurality of adjacent processing regions at a same time that the first lithographic processing unit is to operate on the first processing region (as shown in Figs. 2-4, 7, 8, 19, 23-27, see also paragraph [0235]-[0236] teaches wherein a detection beam reflected off the substrate surface, pass through the lens 122 and is directed toward a detector by a half-silvered mirror between the lens 122 and the individually addressable element 102 and paragraph [0310] teaches two or more substrate tables used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure). Regarding claim 4, De Jager et al. in view of Morimoto et al. discloses wherein the lithographic exposure unit comprises an actinic light source (paragraph [0074]) and a spatial light modulator (paragraph [0005]), and scanning unit comprises an image sensor (paragraphs [0043]-[0044], see also Figs. 1 and 3 of Morimoto et al.). Regarding claims 5-7, De Jager et al. discloses wherein the first lithographic processing unit further comprises a first brightfield light source, wherein the scanning unit further comprises a second brightfield light source or a darkfield light source, wherein the scanning unit further comprises a second brightfield light source and a darkfield light source (as shown in Figs. 2-5, 7, 8, 19, 23-27). Regarding claim 8, De Jager et al. discloses wherein the optical system, the scanning unit, and the lithographic exposure unit transmit and receive optical signals along a common longitudinal axis of the first lithographic processing unit (as shown in Figs. 2-5, 7, 8, 19, 23-27). Regarding claim 9, De Jager et al. discloses wherein the optical system comprises reduction optics configured to reduce an image of a lithographic mask pattern onto a surface of the substrate (as shown in Figs. 2-5, 7, 8, 19, 23-27). Regarding claims 10, 15 and 18, De Jager et al. in view of Morimoto et al. discloses wherein the stage is configured to support the substrate at a first region and is further configured to support a second substrate at a second region, the digital lithography system further comprising: a second lithographic processing unit coupled to the bridge, comprising: a second scanning unit; a second lithographic exposure unit; and a second optical system shared by the second scanning unit and the second lithographic exposure unit; wherein the second scanning unit is to use the second optical system to generate measurements of the second substrate during a measurement operation, and wherein the second lithographic exposure unit is to use the second optical system to perform digital lithographic exposure of the second substrate using the second optical system during an exposure operation (as shown in Figs. 2-5, 7, 8, 19, 23-27, see also paragraph [0235]-[0236] teaches wherein a detection beam reflected off the substrate surface, pass through the lens 122 and is directed toward a detector by a half-silvered mirror between the lens 122 and the individually addressable element 102 and paragraph [0310] teaches two or more substrate tables used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure and paragraphs [0043]-[0044], see also Figs. 1 and 3 of Morimoto et al.). Response to Arguments Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEORAM PERSAUD whose telephone number is (571)270-5476. The examiner can normally be reached M-F 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Minh-Toan Ton can be reached at 571-272-2303. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DEORAM PERSAUD/Primary Examiner, Art Unit 2882
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Prosecution Timeline

Oct 13, 2023
Application Filed
Mar 11, 2025
Non-Final Rejection — §103
Jun 05, 2025
Examiner Interview Summary
Jun 05, 2025
Applicant Interview (Telephonic)
Jun 10, 2025
Response Filed
Jun 24, 2025
Final Rejection — §103
Jul 31, 2025
Examiner Interview Summary
Jul 31, 2025
Applicant Interview (Telephonic)
Aug 13, 2025
Request for Continued Examination
Aug 14, 2025
Response after Non-Final Action
Aug 27, 2025
Non-Final Rejection — §103
Nov 07, 2025
Response Filed
Dec 08, 2025
Final Rejection — §103
Mar 04, 2026
Examiner Interview Summary
Mar 04, 2026
Applicant Interview (Telephonic)
Mar 09, 2026
Request for Continued Examination
Mar 17, 2026
Response after Non-Final Action
Mar 29, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
76%
Grant Probability
88%
With Interview (+12.0%)
2y 9m
Median Time to Grant
High
PTA Risk
Based on 748 resolved cases by this examiner. Grant probability derived from career allow rate.

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