DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6 and 8-20 are rejected under 35 U.S.C. 103 as being unpatentable over ONO (JP 6184539 B2, hereinafter refer to ONO) in view of Ang et al. (U.S. 2015/0097256 A1, hereinafter refer to Ang).
Regarding Claim 1: ONO discloses a method for manufacturing a photodetection device (see ONO, Figs.1 and 6A-6J as shown below and page.1), comprising:
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performing an ion implantation process to form a charge region (105) into a semiconductor substrate (101/102/112), wherein the charge region (105) has a first conductive type (note: p-Si region 105 is formed by implanting, for example, B (boron) ions) (see ONO, Fig.6D as shown above and page.3);
performing an ion implantation process to form an anode (104) with a second conductive type (note: P (phosphorus) ions are partially implanted into the Si slab waveguide 103 to form two n-Si contact regions 104) into the semiconductor substrate (101/102/112), wherein the anode (104) is laterally spaced apart from the charge region (105), and a portion of the semiconductor substrate (106, note: multiplication region 106 is non-doped Si (i-Si)) in between the charge region (105) and the anode (104) defines a charge multiplication region (see ONO, Figs.6C-6D as shown above and page.3);
forming a recess into the charge region (105), such that the charge region (105) is shaped into a charge layer (105) defining the recess (107) (see ONO, Figs.6D-6E as shown above and page.3);
forming an absorption structure (108) in the recess (107) (see ONO, Figs.6E-6F as shown above and page.3);
forming a capping material layer (111) covering the absorption structure (108) and the charge layer (105) (see ONO, Figs.6F-6H as shown above and page.4); and
performing an ion implantation process to form a cathode (109) with the first conductive type (note: B (boron) into the upper surface of the i-Ge absorption region 108 to form p-Ge contact region 109), wherein the cathode (109) is in contact with the absorption structure (108), and remained portions of the capping material layer (111) define a capping layer (111) entirely covering topmost surfaces of the charge layer (105) (see ONO, Figs.1 and 6F-6H as shown above and page.6).
ONO is silent upon explicitly disclosing wherein performing an ion implantation process to form a cathode with the first conductive type into the capping material layer.
Before effective filing date of the claimed invention the disclosed processing conditions were known in order to form a cathode layer.
For support see Ang, which teaches wherein performing an ion implantation process to form a cathode (104) with the first conductive type into the capping material layer (96) (see Ang, Figs.7- 9 as shown below and ¶ [0027]- ¶ [0028]).
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Thus, it would have been within the scope of one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of ONO and Ang to enable the cathode of ONO to be formed according to the teachings of Ang because one of ordinary skill in the art before effective filing date of the claimed invention would have been motivated to look to alternative suitable methods of performing the disclosed cathode of ONO and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP § 2144.07.
Regarding Claim 2: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 1 as above. The combination of ONO and Ang further teaches wherein the anode (104), the charge layer (105) and the absorption structure (108) are each formed in a line shape (rectangular shape), and are substantially parallel with one another (see ONO, Fig.2 as shown above).
Note: the configuration of the claimed the anode, the charge layer, and the absorption structure was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed the anode, the charge layer, and the absorption structure was significant.
Regarding Claim 3: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 1 as above. The combination of ONO and Ang further teaches wherein patterning the semiconductor substrate (101/102/112) to form a waveguide directly in lateral contact with the absorption structure (108) (see ONO, Figs.1 and 2 as shown above).
Regarding Claim 4: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 3 as above. The combination of ONO and Ang further teaches wherein the waveguide is directly in lateral contact with the charge layer (105) as well (see ONO, Figs.1 and 2 as shown above).
Regarding Claim 5: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 3 as above. The combination of ONO and Ang further teaches wherein the waveguide has a line portion and a divergent portion with a narrow end in contact with the line portion and a wide end in contact with the absorption structure (108) and the charge layer (105) (see ONO, Figs.1 and 2 as shown above).
Note: the configuration of the claimed the anode, the charge layer, and the absorption structure was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed the anode, the charge layer, and the absorption structure was significant.
Regarding Claim 6: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 1 as above. The combination of ONO and Ang further teaches wherein forming a trench into the semiconductor substrate before formation of the anode (104), wherein the trench is positioned in a region of the semiconductor substrate (101/102/112) to be formed with the anode (104) (note: the top Si layer 112 is patterned on the SOI substrate 113 by photolithography and dry etching to form the Si slab waveguide 103) (see ONO, Figs.6A-6B as shown above and page.6).
Regarding Claim 8: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 1 as above. The combination of ONO and Ang further teaches wherein a method for forming the capping material layer (96) comprises:
forming a passivation layer (22/24) covering the charge multiplication region (14) and the anode (62/64), while exposing the absorption structure (90) (see Ang, Figs.7- 9 as shown above); and
performing an epitaxial process to selectively grow a semiconductor material on the exposed absorption structure (90), for forming the capping material layer (96) (see Ang, Figs.7- 9 as shown above and ¶ [0027]).
The combination of ONO and Ang is silent upon explicitly disclosing wherein forming a passivation layer covering the charge multiplication region and the anode, while exposing the charge layer and the absorption structure; and
performing an epitaxial process to selectively grow a semiconductor material on the exposed charge layer, for forming the capping material layer.
However, the combination of ONO and Ang teaches wherein a method for forming the capping material layer (96) comprises:
forming a passivation layer (22/24) covering the charge multiplication region (14) and the anode (62/64), while exposing the absorption structure (90) (see Ang, Figs.7- 9 as shown above); and
performing an epitaxial process to selectively grow a semiconductor material on the exposed absorption structure (90), for forming the capping material layer (96) (see Ang, Figs.7- 9 as shown above and ¶ [0027]).
Hence, it would It would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the ranges of exposed regions of charge layer and absorption structure for forming capping layer on the exposed regions of charge layer and absorption structure through routine experimentation and optimization to obtain optimal or desired device performance because the ranges of exposed regions of charge layer and absorption structure for forming capping layer on the exposed regions of charge layer and absorption structure is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05
Regarding Claim 9: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 1 as above. The combination of ONO and Ang further teaches wherein forming a dielectric layer (112) covering the capping layer (96), the cathode (104), the charge multiplication region (14) and the anode (64) (see Ang, Figs.7- 9 as shown above); and
forming a first contact plug (114) and a second contact plug (114) through the dielectric layer (112), wherein the first contact plug (114) is landed on the cathode (104), and the second contact plug (114) is disposed on the anode (64) (see Ang, Figs.7- 9 as shown above).
Regarding Claim 10: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 9 as above. The combination of ONO and Ang further teaches wherein the dielectric layer (112) is spaced apart from the charge layer (48) via the capping layer (96) (see Ang, Fig. 9 as shown above).
Furthermore, it would It would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the range of dielectric layer spaced apart from the charge layer via the capping layer through routine experimentation and optimization to obtain optimal or desired device performance because the range of dielectric layer spaced apart from the charge layer via the capping layer is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05
Regarding Claim 11: ONO discloses a method for manufacturing a photodetection device (see ONO, Figs.1 and 6A-6J as shown above and page.1), comprising:
providing a semiconductor substrate (101/102/112) with a front semiconductor layer (112), a back semiconductor layer (101) and a buried insulating layer (102) sandwiched between the front semiconductor layer (112) and the back semiconductor layer (101) (see ONO, Fig.6A as shown above);
forming a charge region (105) into the front semiconductor layer (112), wherein the charge region (105) has a first conductive type (see ONO, Fig.6D as shown above);
forming an anode (104) with a second conductive type into the front semiconductor layer (112), wherein the anode (104) is laterally spaced apart from the charge region (105), and a portion of the front semiconductor layer (106) in between the charge region (105) and the anode (104) defines a charge multiplication region (see ONO, Figs.6C- 6D as shown above);
forming a recess (107) into the charge region (105), such that the charge region (105) is shaped into a charge layer (105) defining the recess (107) (see ONO, Figs.6D-6E as shown above);
forming an absorption structure (108) in the recess (107) (see ONO, Figs.6E-6F as shown above);
forming a capping material layer (111) covering the absorption structure (108) and the charge layer (105) (see ONO, Figs.6D-6H as shown above); and
wherein the cathode (109) is in contact with the absorption structure (108), and remained portions of the capping material layer (111) define a capping layer (111) entirely covering topmost surfaces of the charge layer (105) (see ONO, Figs.1 and 6J as shown above).
ONO is silent upon explicitly disclosing wherein forming a cathode with the first conductive type into the capping material layer.
Before effective filing date of the claimed invention the disclosed processing conditions were known in order to form a cathode layer.
For support see Ang, which teaches wherein forming a cathode (104) with the first conductive type into the capping material layer (96) (see Ang, Figs.7- 9 as shown above and ¶ [0027]- ¶ [0028]).
Thus, it would have been within the scope of one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of ONO and Ang to enable the cathode of ONO to be formed according to the teachings of Ang because one of ordinary skill in the art before effective filing date of the claimed invention would have been motivated to look to alternative suitable methods of performing the disclosed cathode of ONO and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP § 2144.07.
Regarding Claim 12: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 11 as above. The combination of ONO and Ang further teaches wherein the charge layer (105), the charge multiplication region (106) and the anode (104) respectively span from a top surface of the front semiconductor layer (112) to a top surface of the buried insulating layer (102) (see ONO, Figs.1 and 6J as shown above).
Regarding Claim 13: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 11 as above. The combination of ONO and Ang further teaches wherein patterning the front semiconductor layer (112) to form a waveguide directly in lateral contact with the absorption structure (108) (see ONO, Figs.1 and 6J as shown above).
Regarding Claim 14: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 13 as above. The combination of ONO and Ang further teaches wherein the waveguide is directly in lateral contact with the charge layer (105) as well (see ONO, Figs.1 and 6J as shown above).
Regarding Claim 15: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 13 as above. The combination of ONO and Ang further teaches wherein the absorption structure (108), the charge layer (105) and the anode (104) are each formed in a line (rectangular) shape, and the absorption structure (108) and the charge layer (105) are respectively in lateral contact with the waveguide by one end (see ONO, Fig.2 as shown above).
Note: the configuration of the claimed the anode, the charge layer, and the absorption structure was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed the anode, the charge layer, and the absorption structure was significant.
Regarding Claim 16: ONO discloses a method for manufacturing a photodetection device (see ONO, Figs.1 and 6A-6J as shown above and page.1), comprising:
performing an ion implantation process to form a charge region (105) into a semiconductor substrate (101/102/112), wherein the charge region (105) has a first conductive type (note: p-Si region 105 is formed by implanting, for example, B (boron) ions) (see ONO, Fig.6D as shown above and page.3);
performing an ion implantation process to form anodes (104) with a second conductive type (note: P (phosphorus) ions are partially implanted into the Si slab waveguide 103 to form two n-Si contact regions 104) into the semiconductor substrate (101/102/112), wherein the anodes (104) at opposite sides of the charge region (105) are laterally spaced apart from the charge region (105), and portions of the semiconductor substrate (106) in between the charge region (105) and the anodes (104) respectively define a charge multiplication region (see ONO, Figs.6C-6D as shown above and page.3);
forming a recess (107) into the charge region (105), such that the charge region (105) is shaped into a charge layer (105) defining the recess (107) (see ONO, Figs. 6D-6E as shown above);
forming an absorption structure (108) in the recess (107) (see ONO, Figs. 6E-6F as shown above);
forming a capping material layer (111) covering the absorption structure (108) and the charge layer (105) (see ONO, Figs. 6H as shown above); and
wherein the cathode (109) is in contact with the absorption structure (108), and remained portions of the capping material layer (111) define a capping layer (111) entirely covering topmost surfaces of the charge layer (105) (see ONO, Figs.1 and 6J as shown above).
ONO is silent upon explicitly disclose wherein performing an ion implantation process to form a cathode with the first conductive type into the capping material layer.
Before effective filing date of the claimed invention the disclosed processing conditions were known in order to form a cathode layer.
For support see Ang, which teaches wherein performing an ion implantation process to form a cathode (104) with the first conductive type into the capping material layer (96) (see Ang, Figs.7- 9 as shown above and ¶ [0027]- ¶ [0028]).
Thus, it would have been within the scope of one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of ONO and Ang to enable the cathode of ONO to be formed according to the teachings of Ang because one of ordinary skill in the art before effective filing date of the claimed invention would have been motivated to look to alternative suitable methods of performing the disclosed cathode of ONO and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP § 2144.07.
Regarding Claim 17: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 16 as above. The combination of ONO and Ang further teaches wherein the charge layer (105), the charge multiplication regions (106) and the anodes (104) extends into the semiconductor substrate (101/102/112) by an identical depth (see ONO, Figs.1 and 6J as shown above).
Regarding Claim 18: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 16 as above. The combination of ONO and Ang further teaches wherein patterning the semiconductor substrate (101/102/112) to form a waveguide directly in lateral contact with the absorption structure (108) and the charge layer (105) (see ONO, Figs.1 and 6J as shown above).
Regarding Claim 19: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 16 as above. The combination of ONO and Ang further teaches wherein forming a dielectric layer (112) covering the capping layer (96), the cathode (104), the charge multiplications region (14) and the anodes (62/64) (see Ang, Figs.7- 9 as shown above); and
forming a first contact plug (114) and second contact plugs (114) through the dielectric layer (112), wherein the first contact plug (114) is landed on the cathode (104), and the second contact plugs (114) are disposed on the anodes (62/64), respectively (see Ang, Figs.7- 9 as shown above).
Regarding Claim 20: ONO as modified teaches a method for manufacturing a photodetection device as set forth in claim 19 as above. The combination of ONO and Ang further teaches wherein the dielectric layer (112) is spaced apart from the charge layer (48) via the capping layer (96) (see Ang, Fig.9 as shown above).
Furthermore, it would It would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the range of dielectric layer spaced apart from the charge layer via the capping layer through routine experimentation and optimization to obtain optimal or desired device performance because the range of dielectric layer spaced apart from the charge layer via the capping layer is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05
Claim(s) 7 is rejected under 35 U.S.C. 103 as being unpatentable over ONO (JP 6184539 B2, hereinafter refer to ONO) and Ang et al. (U.S. 2015/0097256 A1, hereinafter refer to Ang) as applied to claim 6 above, and further in view of Lo et al. (U.S. 2020/0098803 A1, hereinafter refer to Lo).
Regarding Claim 7: ONO as modified teaches a method for manufacturing a photodetection device as applied to claim 6 above. The combination of ONO and Ang further teaches wherein performing an ion implantation process to form a heavily doped region (86/88) into the anode (62/64), wherein the heavily doped region (86/88) has the second conductive type (see Ang, Fig.9 as shown above and Figs.5-6); however, the combination of ONO and Ang is silent upon explicitly disclosing wherein a sidewall of the heavily doped region is shared with the trench.
Before effective filing date of the claimed invention the disclosed sidewall of the heavily doped region were known to be shared with the trench in order to obtain a CMOS image sensor having improved timing resolution.
For support see Lo, which teaches wherein a sidewall of the heavily doped region (202) is shared with the trench (702) (see Lo, Figs.7 and 13 and ¶ [0017]).
Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of ONO, Ang, and Lo to enable the sidewall of the heavily doped region of the combinations of ONO and Ang to be shared with the trench as taught by Lo in order to obtain a CMOS image sensor having improved timing resolution.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BITEW A DINKE whose telephone number is (571)272-0534. The examiner can normally be reached M-F 7 a.m. - 5 p.m..
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/BITEW A DINKE/Primary Examiner, Art Unit 2812