DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 09/26/2024 and 11/07/2024, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Specification
The disclosure is objected to because of the following informalities:
Paragraph [0027] recites “formation of low resistivity alpha-tungsten (β-W) vias”; which should be written as “formation of low resistivity alpha-tungsten (α-W) vias”
Paragraphs [0027], [0037], [0042], and [0047] recite “in a range of about 30-90 nm2” which should be written as “in a range of about 30-90 nm” since the typical unit of grain size is nm.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 11, 17, 19, and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “substantially” in claims 1 and 19 is a relative term which renders the claim indefinite. The term “substantially” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The limitation “uniform phase” is rendered indefinite by use of the term “substantially”.
Claim 5 recites “a grain size in a range of between about 30-90 nm2” which is indefinite because the typical unit of grain size in nm. The examiner interprets this as “a grain size in a range of between about 30-90 nm” for examination purposes.
Claim 17 recites “the grain size of the first metal layer is in a range of between about 30-90 nm2” which is indefinite because the typical unit of grain size in nm. The examiner interprets this as “the grain size of the first metal layer is in a range of between about 30-90 nm” for examination purposes.
Claim 20 recites “the grain size of the first metal layer is in a range of between about 30-90 nm2” which is indefinite because the typical unit of grain size in nm. The examiner interprets this as “the grain size of the Co layer is in a range of between about 30-90 nm” for examination purposes.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 4, 6, 11 – 14, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US20200105586A1; hereinafter Hsu) in view of Hwang et al. (US20220069100A1; hereinafter Hwang).
Regarding Claim 1, Hsu discloses a method, comprising:
forming a first opening (82) in a dielectric layer (second ILD 80, the first ILD 62, and the CESL 60) to expose a source/drain region (56), FIG. 6, FIG. 12A reproduced below, [0035];
depositing a first metal layer (conductive fill material 100 of first conductive features 90) in the opening (82) and over the source/drain region (56), FIG. 7, [0036];
depositing a second metal layer (206) over the wet-cleaned first metal layer (100), FIGS. 10A, 12A, [0043], [0054];
wherein the second metal layer (206) has a substantially uniform phase [0056]. Hsu [0056] discloses the ratio of the amount of α phase tungsten to β phase tungsten in the second conductive features 206 may be about 100% because stable α phase tungsten is preferred on SiO2, indicating the second metal layer 206 is uniform in phase with predominantly α phase tungsten.
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Hsu: FIG. 12A
Hsu does not disclose “performing an annealing process to modulate a grain size of the first metal layer; and depositing a second metal layer over the annealed first metal layer.”
In a similar art, Hwang discloses a process of forming a contact structure in the semiconductor device 100, [0053].
Hwang discloses: performing an annealing process to modulate a grain size (changes the grain size G2 to G2’) of the first metal layer (185), FIG. 5D reproduced below, [0049].
depositing a second metal layer (190) over the annealed first metal layer (grain adjustment region 189 of the contact plug 185), FIG. 5E, [0068].
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Hwang: FIG. 5D
Hwang discloses that a method as taught enables implementation of a low-resistance contact structure [0049]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu’s method in order to implement a low-resistance contact structure as disclosed by Hwang [0049].
Regarding Claim 2, The combination of Hsu and Hwang disclose the method of claim 1.
Hsu discloses: wherein the first metal layer (conductive fill 100) defines a contact plug (conductive feature 90 including conductive fill 100) may be referred to as contacts, plugs, FIG. 7, [0039]), and wherein the second metal layer (206) defines a via (206 may be referred to as vias, FIG. 12A, [0057]).
Regarding Claim 3, The combination of Hsu and Hwang disclose the method of claim 1.
Hsu discloses: wherein the first metal layer (100) includes cobalt (Co), (conductive fill material 100 may be cobalt, [0039]) and wherein the second metal layer include tungsten (W), (206 may be tungsten, [0054]).
Regarding Claim 4, The combination of Hsu and Hwang disclose the method of claim 1.
Hsu does not disclose “wherein prior to performing the annealing process, the grain size of the first metal layer is less than about 30 nm.”
Hwang discloses: wherein prior to performing the annealing process, the grain size of the first metal layer (185) is less than about 30 nm, (7 nm or more, e.g., 10 nm or more, [0041], [0049]. Hwang [0041] discloses the grain G2 of the contact plug 185 may have a size of 7 nm or more; and [0049] discloses the annealing process may be applied to the upper surface of the contact plug 185 to change a size of the grain G2 of the contact plug 185.The grain size G2 of the first metal layer (185) prior to performing the annealing process may be 7nm or more, indicating the grain size can be less than 30nm.
Hwang discloses that a method as taught enables implementation of a low-resistance contact structure [0041]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu’s method in order to implement a low-resistance contact structure as disclosed by Hwang [0041].
Regarding Claim 6, The combination of Hsu and Hwang disclose the method of claim 1.
Hsu discloses: wherein the second metal layer (206) includes alpha-tungsten (α-W), (second conductive features 206 comprise alpha phase tungsten, [0055]).
Regarding Claim 11, The combination of Hsu and Hwang disclose the method of claim 1.
Hsu discloses: further comprising prior to depositing the first metal layer (100), forming a barrier layer (96) in the opening (82), and depositing the first metal layer (100) over the barrier layer (96), FIG. 7, [0037], [0039].
Regarding Claim 12, Hsu discloses a method, comprising:
forming a first contact plug (first plug 90) in contact with a first source/drain region (first source/drain region 56) and a second contact plug (second plug 90) in contact with a second source/drain region (second source/drain 56), FIG. 7, [0035], [0036]; Hsu [0035], [0036] discloses the formation of plurality of openings 82, each with source/drain regions 56.
wherein a phase of a second metal layer (206) used to form each of the first and second vias (first and second vias 120) includes an alpha phase, [0056]. Hsu [0056] discloses the ratio of the amount of α phase tungsten to β phase tungsten in the second conductive features 206 may be about 100% because stable α phase tungsten is preferred on SiO2, indicating the second metal layer 206 is uniform in phase with predominantly α phase tungsten.
Hsu does not disclose “annealing the first and second contact plugs to increase a grain size of a first metal layer used to form each of the first and second contact plugs;”
In a similar art, Hwang discloses a process of forming a contact structure in the semiconductor device 100 [0053].
Hwang discloses: annealing the first and second contact plugs (first and second contact plugs 185) to increase a grain size of a first metal layer (increases the grain size of the metal in the contact plug 185 from G2 to G2’) used to form each of the first and second contact plugs (first and second contact plugs 185), [0032], [0049]. Hwang [0032] discloses forming plurality of contact structure CS1 and CS2 with contact plugs 185, indicating the formation of first and second contact plugs 185.
after annealing the first and second contact plugs (first and second contact plugs 185), forming a first via (first via hole VH) over the first contact plug (first contact plug 185) and a second via (second via hole VH) over the second contact plug (second contact plug 185), FIG. 2A, [0066]).
Hwang discloses that a method as taught enables implementation of a low-resistance contact structure [0049]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu’s method in order to implement a low-resistance contact structure as disclosed by Hwang [0049].
Regarding Claim 13, The combination of Hsu and Hwang disclose the method of claim 12.
Hsu discloses: further comprising prior to forming the first and second contact plugs (first plug 90 and second plug 90), forming a silicide layer (98) over each of the first and second source/drain regions (56), and forming the first and second contact plugs (first plug 90 and second plug 90) over the silicide layer, FIG. 7, [0036].
Regarding Claim 14, The combination of Hsu and Hwang disclose the method of claim 12.
Hsu does not explicitly disclose “wherein the first source/drain region includes an N-type source/drain region, and wherein the second source/drain region includes a P-type source/drain region.”
Hwang discloses: wherein the first source/drain region (110) includes an N-type source/drain region (in case of an NMOS transistor, the source/drain regions 110 may be doped with N-type impurities), and wherein the second source/drain region (110) includes a P-type source/drain region (in the case of a PMOS transistor, the source/drain regions 110 may be doped with P-type impurities, [0029].
Hwang discloses that a method as taught reduces contact resistance and improves device performance [0115]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu’s method in order to reduce contact resistance and improves device performance as disclosed by Hwang [0115].
Regarding Claim 16, The combination of Hsu and Hwang disclose the method of claim 12.
Hsu discloses: wherein the first metal layer (100) includes cobalt (Co) (conductive fill material 100 may be cobalt, [0039]), and wherein the second metal layer (206) include tungsten (W), (206 may be tungsten, [0054]).
Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu in view of Yeong-Maw et al. (Influence of Post-Annealing on the Structural and Nanomechanical Properties of Co Thin Films; hereinafter Yeong-Maw).
Regarding Claim 19, Hsu discloses a semiconductor device, comprising:
a source/drain region (56), FIG. 12A, [0036];
a contact plug (90) formed over the source/drain region (56), wherein the contact plug includes a cobalt (Co) layer, FIG. 12A, [0036];
a via (120) formed over the contact plug (90), wherein the via (120) includes a tungsten (W) layer (206) having a substantially uniform phase, the substantially uniform phase including an alpha phase [0043], [0056].
Hsu [0056] discloses the ratio of the amount of α phase tungsten to β phase tungsten in the second conductive features 206 may be about 100% because stable α phase tungsten is preferred on SiO2, indicating 206 is uniform in phase with predominantly α phase tungsten.
Hsu does not disclose “wherein a majority of the Co layer has a hexagonal close-packed (HCP) crystal structure.”
In a similar art, Yeong-Maw discloses an investigation of the effects of thermal annealing on the microstructural and nanomechanical properties of cobalt [Abstract].
The combination of Hsu and Yeong-Maw disclose: wherein a majority of the Co layer (Hsu:100) has a hexagonal close-packed (HCP) crystal structure, (Yeong-Maw: 76% HCP-Co(002), Page 3, Section:3.Results).
Yeong-Maw discloses that annealed cobalt exhibits a phase composition of about 76% hexagonal close-packed (HCP) structure and 24% of face-centered cubic structure (FCC), indicating the majority of the Co layer (Hsu:100) can have an HCP structure (Yeong-Maw: Page 3, Section: 3.Results).
Yeong-Maw discloses that the method as taught enables the achievement of desired mechanical properties of the cobalt layer [Page 4, Section: 3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu’s method in order to achieve the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section: 3.Results, para 3].
Regarding Claim 20, The combination of Hsu and Yeong-Maw disclose the semiconductor device of claim 19.
The combination of Hsu and Hwang does not disclose “wherein a grain size of the Co layer is in a range of between about 30-90 nm.”
The combination of Hsu and Yeong-Maw disclose: wherein a grain size of the Co layer (Hsu: 100) is in a range of between about 30-90 nm. (Yeong-Maw: mean annealed grain sizes of 32, 37, 38, 39, 45 nm, Page 5, Section: 3.Results, Table 1).
Yeong-Maw discloses that modulating the grain sizes can influence the mechanical properties of the cobalt layer [Page 4, Section:3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu’s method in order to obtain the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section:3.Results, para 3].
Claims 5, 8, 9, 10, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu in view of Hwang, further in view of Yeong-Maw.
Regarding Claim 5, The combination of Hsu and Hwang disclose the method of claim 1.
The combination of Hsu and Hwang does not disclose “wherein the annealed first metal layer has a grain size in a range of between about 30-90 nm.”
In a similar art, Yeong-Maw discloses an investigation of the effects of thermal annealing on the microstructural and nanomechanical properties of cobalt [Abstract].
The combination of Hwang and Yeong-Maw disclose: wherein the annealed first metal layer (Hwang: annealed first plug 185 metal, [0049]) has a grain size in a range of between about 30-90 nm (Yeong-Maw: mean annealed grain sizes of 32, 37, 38, 39, 45 nm, Page 5, Section: 3.Results, Table 1).
Yeong-Maw discloses that modulating the grain sizes can influence the mechanical properties of the cobalt layer [Page 4, Section:3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order to obtain the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section:3.Results, para 3].
Regarding Claim 8, The combination of Hsu and Hwang disclose the method of claim 1.
The combination of Hsu and Hwang does not disclose “wherein the annealing process modulates the grain size of the first metal layer by a factor that is greater than one and less than or equal to three.”
The combination of Hwang and Yeong-Maw disclose: wherein the annealing process modulates the grain size of the first metal layer (Hwang: first plug 185 metal, [0049]) by a factor that is greater than one and less than or equal to three (Yeong-Maw: mean annealed grain sizes of 32, 37, 38, 39, 45 nm, Page 5, Section: 3.Results, Table 1).
Yeong-Maw discloses the pre-annealed cobalt film grain size of 24nm and post-annealed grain size range of 32-45nm, resulting in modulating factor in the range of 1.33 to 1.88, which is greater than one and less than or equal to three. Modulating factor = post-annealed grain size ÷ pre-annealed grain size.
Yeong-Maw discloses that modulating the grain sizes can influence the mechanical properties of the cobalt layer [Page 4, Section:3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order to obtain the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section:3.Results, para 3].
Regarding Claim 9, The combination of Hsu and Hwang disclose the method of claim 1.
The combination of Hsu and Hwang does not disclose “wherein greater than 50% of the annealed first metal layer has a hexagonal close-packed (HCP) crystal structure.”
The combination of Hwang and Yeong-Maw disclose: wherein greater than 50% of the annealed first metal layer (Hwang: annealed first plug 185 metal, [0049]) has a hexagonal close-packed (HCP) crystal structure (Yeong-Maw: 76% HCP-Co(002), Page 3, Section:3.Results).
Yeong-Maw discloses that annealed cobalt exhibits a phase composition of about 76% hexagonal close-packed (HCP) structure and 24% of face-centered cubic (FCC) structure, indicating greater than 50% of the annealed first metal layer (Hwang: annealed first plug 185 metal, [0049]) can have an HCP structure (Yeong-Maw: Page 3, Section: 3.Results).
Yeong-Maw discloses that the method as taught enables the achievement of desired mechanical properties of the cobalt layer [Page 4, Section: 3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order to achieve the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section: 3.Results, para 3].
Regarding Claim 10, The combination of Hsu and Hwang disclose the method of claim 1.
The combination of Hsu and Hwang does not disclose “wherein a ratio of a first portion of the annealed first metal layer that has a hexagonal close-packed (HCP) crystal structure to a second portion of the annealed first metal layer that has a face-centered cubic (FCC) crystal structure is greater than about 1.”
The combination of Hwang and Yeong-Maw disclose: wherein a ratio of a first portion of the annealed first metal layer (annealed first plug 185 metal, [0049]) that has a hexagonal close-packed (HCP) crystal structure to a second portion of the annealed first metal layer (annealed first plug 185 metal, [0049]) that has a face-centered cubic (FCC) crystal structure is greater than about 1 (Yeong-Maw: 24% FCC-Co(111) and 76% HCP-Co(002), Page 3, Section:3.Results, para 3).
Yeong-Maw discloses that annealed cobalt exhibits a phase composition of about 76% hexagonal close-packed (HCP) structure and 24% of face-centered cubic (FCC) structure. The ratio of the annealed first metal layer with HCP structure to FCC structure = 76÷24 = 3.1, indicating a ratio of a first portion of the annealed first metal layer that has a hexagonal close-packed (HCP) crystal structure to a second portion of the annealed first metal layer that has a face-centered cubic (FCC) crystal structure is greater than about 1.
Yeong-Maw discloses that the method as taught enables the achievement of desired mechanical properties of the cobalt layer [Page 4, Section: 3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order to achieve the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section: 3.Results, para 3].
Regarding Claim 17, The combination of Hsu and Hwang disclose the method of claim 12.
The combination of Hsu and Hwang does not disclose “wherein after annealing the first and second contact plugs, the grain size of the first metal layer is in a range of between about 30-90 nm.”
The combination of Hwang and Yeong-Maw disclose: wherein after annealing the first and second contact plugs (first and second contact plugs 185, [0049]), the grain size of the first metal layer (first contact plug 185 metal) is in a range of between about 30-90 nm, (Yeong-Maw: mean annealed grain sizes of 32, 37, 38, 39, 45 nm, Page 5, Section: 3.Results, Table 1).
Yeong-Maw discloses that modulating the grain sizes can influence the mechanical properties of the cobalt layer [Page 4, Section:3.Results, para 3]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order to obtain the desired mechanical properties of the cobalt layer as disclosed by Yeong-Maw [Page 4, Section:3.Results, para 3].
Claims 7 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu in view of Hwang, further in view of Wang et al. (US20170170061A; hereinafter Wang).
Regarding Claim 7, The combination of Hsu and Hwang disclose the method of claim 1.
The combination of Hsu and Hwang does not disclose “wherein the annealing process is performed at a temperature of between about 250-400 degrees Celsius, in a 30-70% H2 ambient environment, at a pressure of between about 10-30 Torr, and for a duration of between about 5-10 minutes.”
In a similar art, Wang discloses a method 100 of fabricating a contact structure of a semiconductor device [0013].
Wang discloses: wherein the annealing process is performed at a temperature of between about 250-400 degrees Celsius (about 200°C and about 800°C), in a 30-70% H2 ambient environment (the gas may be hydrogen (H2) at a concentration at a level between about 1% and 100%), at a pressure of between about 10-30 Torr (pressure during annealing may be between about 1*10−4 torr and 1520 Torr), and for a duration of between about 5-10 minutes (for a time of between about 10 seconds and about 30 minutes), [0052].
Wang discloses that a method as taught enables implementation of a low-resistance contact structure [0003], [0052]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order implement a low-resistance contact structure as disclosed by Wang [0003], [0052].
Regarding Claim 18, The combination of Hsu and Hwang disclose the method of claim 12.
Hsu does not disclose “wherein the annealing the first and second contact plugs is performed at a temperature of between about 250-400 degrees Celsius, in a 30-70% H2 ambient environment, at a pressure of between about 10-30 Torr, and for a duration of between about 5-10 minutes.”
Hwang discloses annealing of first and second contact plugs (first and second contact plugs185) but does not disclose “the annealing is performed at a temperature of between about 250-400 degrees Celsius, in a 30-70% H2 ambient environment, at a pressure of between about 10-30 Torr, and for a duration of between about 5-10 minutes.”
Wang discloses: wherein the annealing process is performed at a temperature of between about 250-400 degrees Celsius (about 200°C and about 800°C), in a 30-70% H2 ambient environment (the gas may be hydrogen (H2) at a concentration at a level between about 1% and 100%), at a pressure of between about 10-30 Torr (pressure during annealing may be between about 1*10−4 torr and 1520 Torr), and for a duration of between about 5-10 minutes (for a time of between about 10 seconds and about 30 minutes), [0052].
Wang discloses that a method as taught enables implementation of a low-resistance contact structure [0003], [0052]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order implement a low-resistance contact structure as disclosed by Wang [0003], [0052].
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Hsu in view of Hwang, further in view of Leo et al. (US20200381298A1; hereinafter Leo).
Regarding Claim 15, The combination of Hsu and Hwang disclose the method of claim 12.
The combination of Hsu and Hwang does not disclose “wherein at least one of the first and second vias includes a slot via with an adjacent gate via to provide a composite via, and wherein the composite via provides an electrical connection between the at least one of the first and second vias and a gate electrode layer of an adjacent gate structure.”
In a similar art, Leo discloses methods of forming a shared contact structure in a semiconductor device [0011].
Leo discloses: wherein at least one of the first and second vias (openings 259 and 281) includes a slot via (opening 281) merged with an adjacent gate via (opening 259 exposes gate conductive material 226) to provide a composite via (butted contact opening 238), and wherein the composite via (butted contact opening 238) provides an electrical connection between the at least one of the first and second vias and a gate electrode layer of an adjacent gate structure (the conductive fill 227 in the butted contact opening 238 electrically connects opening 259 to the gate conductive material 226), FIG. 15, 17A, [0058].
Leo discloses that a method as taught enables electrical connection without a horizontal metal interconnect layer, improving throughput and reducing manufacturing cost [0058], [0062]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu and Hwang’s method in order to improve throughput and reduce manufacturing cost as disclosed by Leo [0058], [0062].
Conclusion
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/Krishna J. Palaniswamy/
Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899