Prosecution Insights
Last updated: July 17, 2026
Application No. 18/493,317

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE

Non-Final OA §102§103
Filed
Oct 24, 2023
Examiner
MENZ, DOUGLAS M
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Vanguard International Semiconductor Corporation
OA Round
3 (Non-Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
686 granted / 776 resolved
+20.4% vs TC avg
Minimal +5% lift
Without
With
+4.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
32 currently pending
Career history
807
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
52.1%
+12.1% vs TC avg
§102
36.2%
-3.8% vs TC avg
§112
0.6%
-39.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 776 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chong et al. (US 2021/0184010). Regarding claim 1, Chong discloses a method for forming a semiconductor structure, comprising: forming a second semiconductor layer (120, fig. 1) on a first semiconductor layer (110, fig. 1), wherein the first semiconductor layer and the second semiconductor layer have different energy bandgaps (figs. 1, 2 and paragraph 0095); performing an etching process to form an opening exposing a first vertical sidewall of the first semiconductor layer and a second vertical sidewall of the second semiconductor layer (fig. 7 and paragraph 0120); and forming an electrode structure in the opening to cover the first vertical sidewall and the second vertical sidewall (510, 610, figs. 1,7-11 and paragraph 0120), wherein the method further comprises forming a passivation layer on the second semiconductor layer covering a top surface of the second semiconductor layer (410, 420, figs. 3-6 and paragraphs 0115-0119); wherein the electrode structure (510, 610, figs. 1, 11) has a continuous portion extending from inside the opening along a side surface of the passivation layer (410, 420, figs. 1, 11) and onto a top surface of the passivation layer (420, figs. 1, 11). Note: the electrode structure is defined as 510 combined with 610 making a single conductive electrode structure, as such, the structure has a continuous portion extending from inside the opening along a surface of the passivation layer and onto a top surface of the passivation layer. Also note, electrode structure (520 combined with 522, fig. 8) also satisfies the claim since the electrode structure has a continuous portion extending from inside the opening along a surface of the passivation layer (410, fig. 8) and onto a top surface of the passivation layer (410, fig. 8). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-8, 10-11, 13-14 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Neufeld et al. (US 2021/0043750) in view of Chong et al. (US 2021/0184010). Regarding claim 1, Neufeld discloses a method for forming a semiconductor structure, comprising: forming a second semiconductor layer (116, fig. 1) on a first semiconductor layer (114, fig. 1), wherein the first semiconductor layer and the second semiconductor layer have different energy bandgaps (figs. 1, 2A-B and paragraphs 0053-0054); performing an etching process to form an opening exposing a first vertical sidewall of the first semiconductor layer and a second vertical sidewall of the second semiconductor layer (121, 122, figs. 1, 3A-B and paragraph 0065); and forming an electrode structure in the opening to cover the first vertical sidewall and the second vertical sidewall (121, 122, figs. 1, 3A-B and paragraph 0065), wherein the method further comprises forming a passivation layer on the second semiconductor layer covering a top surface of the second semiconductor layer (118, fig. 1 and paragraph 0038) and the electrode structure further covers a side surface of the passivation layer (118, fig. 1 and paragraph 0038). Neufeld does not disclose wherein the electrode structure has a continuous portion extending from inside the opening along a side surface of the passivation layer and onto a top surface of the passivation layer. Chong discloses a similar structure for which all the limitations of claim 1 are met (see above 102 rejection). Chong’s structure differs from Neufeld’s device in that Chong’s passivation layer includes an upper portion (420, fig. 1) and Chong also includes an electric-field relaxation film (610, fig. 1 and paragraph 0105) by a source electrode extension that covers the top surface of the passivation layer (420, fig. 1), thus forming a single conductive electrode structure. It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate such modifications into Neufeld’s device since Chong explicitly discloses that such feature may limit and/or prevent the concentration of an electric field between the conductive material portion 300 and the drain electrode pattern 520 (fig. 1 and paragraph 0105). Regarding claim 2, Neufeld further discloses wherein each inclination angle of the first vertical sidewall and the second vertical sidewall is between 85° and 95° (121, 122, figs. 1, 3A-B and paragraph 0065, note: vertical is 90°). Regarding claim 3, Neufeld further discloses wherein the first vertical sidewall and the second vertical sidewall have the same inclination angle (121, 122, fig. 1). Regarding claim 4, Neufeld further discloses wherein a sum of heights of the first vertical sidewall and the second vertical sidewall is greater than 20 nm (paragraph 0054, note: layer 116 is about 30nm and source drain contact holes go through entire layer). Regarding claim 5, Neufeld further discloses wherein the electrode structure is in direct contact with the first vertical sidewall (121, 122, fig. 1). Regarding claim 6, Neufeld further discloses wherein the first vertical sidewall extends from a bottom surface of the opening to a junction of the first semiconductor layer and the second semiconductor layer, and the second vertical sidewall extends from the junction to a top surface of the second semiconductor layer (121, 122, fig. 1). Regarding claim 7, Neufeld further discloses wherein a two-dimensional electron gas (2DEG) is generated in the first semiconductor layer and adjacent to the second semiconductor layer (119, fig. 1 and paragraph 0037). Regarding claim 8, Neufeld further discloses wherein the electrode structure forms an ohmic contact with the two-dimensional electron gas (paragraph 0037). Regarding claim 10, Neufeld further discloses wherein height of the first vertical sidewall is greater than thickness of the two-dimensional electron gas (fig. 1). Regarding claim 11, Neufeld further discloses wherein the two-dimensional electron gas has a uniform electron concentration in a horizontal direction (119, fig. 1 and paragraph 0037). Regarding claim 13, Neufeld further discloses wherein the passivation layer, the second semiconductor layer, and the first semiconductor layer are sequentially etched in the etching process, and the passivation layer, the second semiconductor layer, and the first semiconductor layer are etched with the same etchant (121, 122, fig. 1 and paragraph 0039). Regarding claim 14, Neufeld further discloses wherein a side surface of the passivation layer has the same inclination angle as the first vertical sidewall and the second vertical sidewall (fig. 1). Regarding claim 16, Neufeld further discloses wherein the formation of the electrode structure comprises conformally forming a bottom metal layer in the opening (paragraph 0039). Regarding claim 17, Neufeld further discloses wherein the formation of the electrode structure further comprises sequentially forming an inter-metal dielectric layer and a top metal layer on the bottom metal layer (paragraph 0039). Regarding claim 18, Neufeld further discloses wherein the electrode structure is a source or a drain of the semiconductor structure (paragraph 0037). Regarding claim 19, Neufeld further discloses wherein the energy bandgap of the first semiconductor layer is smaller than the energy bandgap of the second semiconductor layer (paragraph 0054). Regarding claim 20, Neufeld further discloses wherein the first semiconductor layer is formed of undoped gallium nitride, and the second semiconductor layer is formed of aluminum-doped gallium nitride (paragraphs 0053-0054). Claims 9 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Neufeld et al. (US 2021/0043750) in view of Chong et al. (US 2021/0184010). Regarding claim 9, Neufeld in view of Chong discloses the method as claimed in claim 8, as mentioned above. Neufeld further discloses that the source and drain contacts are formed in the recess to allow for lower contact resistance. Neufeld does not explicitly disclose wherein contact resistance between the electrode structure and the two-dimensional electron gas is lower than 0.5 ohm*mm. However, given Neufeld’s disclosure it would have been obvious to one of ordinary skill in the art to realize a contact resistance between the electrode structure and the two-dimensional electron gas is lower than 0.5 ohm*mm. Regarding claim 15, Neufeld in view of Chong discloses the method as claimed in claim 1, as mentioned above. Neufeld does not explicitly disclose wherein an etchant used in the etching process comprises CHF₃, C4F₈, CF₄, or Cl₂. However, Examiner takes official notice that such etchants were well known at the time of filing and would therefore be deemed obvious to one of ordinary skill in the art at the time of filing. Response to Arguments Applicant's arguments filed 6/1/26 have been fully considered but they are not persuasive. Applicant has amended independent claim 1 to include the limitation, “wherein the electrode structure has a continuous portion extending from inside the opening along a side surface of the passivation layer and onto a top surface of the passivation layer.” and argues that Chong does not disclose such features. Examiner disagrees, as mentioned in the above rejection, the electrode structure is defined as 510 combined with 610 making a single conductor as the electrode structure, as such, the structure has a continuous portion extending from inside the opening along a surface of the passivation layer and onto a top surface of the passivation layer. Also note, electrode structure (520 combined with 522, fig. 8) also satisfies the claim since the electrode structure has a continuous portion extending from inside the opening along a surface of the passivation layer (410, fig. 8) and onto a top surface of the passivation layer (410, fig. 8). Applicant is advised to amend the independent claim to overcome the rejection and to more precisely define Applicant’s invention. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS M MENZ whose telephone number is (571)272-1877. The examiner can normally be reached Monday-Friday 8:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DOUGLAS M MENZ/ Primary Examiner, Art Unit 2897 6/24/26
Read full office action

Prosecution Timeline

Oct 24, 2023
Application Filed
Dec 31, 2025
Non-Final Rejection mailed — §102, §103
Mar 26, 2026
Response Filed
Apr 10, 2026
Final Rejection mailed — §102, §103
Jun 01, 2026
Request for Continued Examination
Jun 03, 2026
Response after Non-Final Action
Jun 26, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
93%
With Interview (+4.6%)
2y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 776 resolved cases by this examiner. Grant probability derived from career allowance rate.

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