DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1; 7; 14; and 20 have been considered but are moot because the new ground of rejection(s) rely on a reference; and a reference combination not applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
A. No specific arguments have been presented regarding the prior art used to reject dependent claims 2-6; 8-13; 15-19; and 21-25. Therefore, the examiner offers no comment.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1; 7; 14; and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by VINCENT et al (US 2015/0270233 A1, hereafter Vincent).
Re claim 1, Vincent discloses in FIG. 5 (with references to FIGS. 2-3) a semiconductor device (60), comprising:
a first electrical component (52; [0025]) including an active surface (54; [0025]) with a contact pad (64; [0023]) formed on the active surface (54);
a flexible encapsulant (molded panel encapsulant 70; [0024] and [0027]) disposed over the first electrical component (52) with a surface (top side) of the flexible encapsulant (molded panel encapsulant 70) coplanar (level) with the active surface (54) and contact pad (64); and
an interconnect structure (66; [0026]) formed in contact with (physically touching) the surface (top side) of the flexible encapsulant (molded panel encapsulant 70) and the active surface (54) of the first electrical component (52).
Re claim 7, Vincent discloses in FIG. 5 (with references to FIGS. 2-3) a semiconductor device (60), comprising:
a first thin electrical component (see claim 1); and
a flexible encapsulant disposed over the first thin electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first thin electrical component (see claim 1).
Re claim 14, Vincent discloses in FIGS. 3-5 (with references to FIG. 2) a method of making a semiconductor device (60), comprising:
providing a first electrical component (FIG. 3; see claim 1);
disposing a flexible encapsulant over the first electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first electrical component (FIG. 3; see claim 1); and
forming an interconnect structure in contact with the surface of the flexible encapsulant and the active surface of the first electrical component (FIG. 4; see claim 1).
Re claim 20, Vincent discloses in FIGS. 3-5 (with references to FIG. 2) a method of making a semiconductor device (60), comprising:
providing a first thin electrical component (FIG. 3; see claim 1); and
disposing a flexible encapsulant over the first thin electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first thin electrical component (FIG. 3; see claim 1).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-5; 7, 9-12; 14, 16-18; 20 and 22-24 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (of record) in view of VINCENT et al (US 2015/0270233 A1, hereafter Vincent).
Re claim 1, Chen discloses in FIG. 15 (with references to FIG. 1) a semiconductor device (4), comprising:
a first electrical component (16a; [0032] and [0069]);
a flexible encapsulant (22; [0069]) disposed over the first electrical component (16a); and
an interconnect structure (18: 181/182; [0069]-[0070]) formed over the first electrical component (16a).
Chen fails to disclose the first electrical component including an active surface with the contact pad formed on the active surface; the flexible encapsulant disposed over the first electrical component with a surface of the flexible encapsulant coplanar with the active surface and contact pad; and the interconnect structure formed in contact with the surface of the flexible encapsulant and the active surface of the first electrical component.
However, Vincent discloses these limitations (see claim 1 of 35 U.S.C. 102 section above).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Chen with teachings of Vincent of the first electrical component including an active surface with the contact pad formed on the active surface; the flexible encapsulant disposed over the first electrical component with a surface of the flexible encapsulant coplanar with the active surface and contact pad; and the interconnect structure formed in contact with the surface of the flexible encapsulant and the active surface of the first electrical component, to form thinner, more flexible with delamination resistant interconnects (Vincent; [0001]).
Re claim 3, Chen discloses the semiconductor device of claim 1, wherein the flexible encapsulant (22) includes a material selected from the group consisting of polyimide ([0030]), thermoplastic elastomer, thermoplastic vulcanizate, thermoplastic urethane, and polyvinyl chloride.
Re claim 4, Chen discloses the semiconductor device of claim 1, wherein the interconnect structure (18) includes: an insulating layer (IN; [0039]) formed over the first electrical component (16a); and a conductive layer (18a; [0039]) formed over the insulating layer (IN).
Re claim 5, Chen discloses the semiconductor device of claim 1, further including a second electrical component (16b; [0032] and [0069]), wherein the flexible encapsulant (22) is disposed over the second electrical component (16b).
Re claim 7, Chen discloses in FIG. 15 a semiconductor device (4), comprising:
a first thin electrical component (16a; [0032] and [0069]); and
a flexible encapsulant (22; [0069]) disposed over the first thin electrical component (16a).
Chen fails to disclose with a surface of the flexible encapsulant coplanar with an active surface of the first thin electrical component.
However, Vincent discloses these limitations (see claim 7 of 35 U.S.C. 102 section above).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Chen with teachings of Vincent of the surface of the flexible encapsulant coplanar with an active surface of the first thin electrical component, to form thinner, more flexible with delamination resistant interconnects (Vincent; [0001]).
Re claim 9, Chen discloses the semiconductor device of claim 7, wherein the flexible encapsulant (22) includes a material selected from the group consisting of polyimide ([0030]), thermoplastic elastomer, thermoplastic vulcanizate, thermoplastic urethane, and polyvinyl chloride.
Re claim 10, Chen discloses the semiconductor device of claim 7, further including an interconnect structure formed over the first thin electrical component (see claim 1).
Chen fails to disclose the interconnect structure formed in contact with the surface of the flexible encapsulant and the active surface of the first thin electrical component.
However, Vincent discloses these limitations (see claim 1 of 35 U.S.C. 102 section above), as would be part of the thinner, more flexible with delamination resistant interconnects discussed for claims 1 and 7.
Re claim 11, Chen discloses the semiconductor device of claim 10, wherein the interconnect structure includes: an insulating layer formed over the first thin electrical component; and a conductive layer formed over the insulating layer (see claims 1 and 4).
Re claim 12, Chen discloses the semiconductor device of claim 7, further including a second thin electrical component, wherein the flexible encapsulant is disposed over the second thin electrical component (see claim 5).
Re claim 14, Chen discloses in FIG. 15 a method of making a semiconductor device (4), comprising:
providing a first electrical component (16a; [0032] and [0069]);
disposing a flexible encapsulant (22; [0069]) over the first electrical component (16a); and
forming an interconnect structure (18: 181/182; [0069]-[0070]) over the first electrical component (16a).
Chen fails to disclose disposing the flexible encapsulant over the first electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first electrical component; and forming the interconnect structure in contact with the surface of the flexible encapsulant and the active surface of the first electrical component.
However, Vincent discloses these limitations (see claim 14 of 35 U.S.C. 102 section above).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Chen with teachings of Vincent of disposing the flexible encapsulant over the first electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first electrical component; and forming the interconnect structure in contact with the surface of the flexible encapsulant and the active surface of the first electrical component, to form thinner, more flexible with delamination resistant interconnects (Vincent; [0001]).
Re claim 16, Chen discloses the method of claim 14, wherein the flexible encapsulant (22) includes a material selected from the group consisting of polyimide ([0030]), thermoplastic elastomer, thermoplastic vulcanizate, thermoplastic urethane, and polyvinyl chloride.
Re claim 17, Chen discloses the method of claim 14, wherein forming the interconnect structure includes: forming an insulating layer over the first electrical component; and forming a conductive layer over the insulating layer (see claim 11).
Re claim 18, Chen discloses the method of claim 14, further including providing a second electrical component, wherein the flexible encapsulant is disposed over the second electrical component (see claim 5).
Re claim 20, Chen discloses in FIG. 15 a method of making a semiconductor device (4), comprising:
providing a first thin electrical component (16a; [0032] and [0069]); and
disposing a flexible encapsulant (22; [0069]) over the first thin electrical component (16a).
Chen fails to disclose disposing the flexible encapsulant over the first thin electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first thin electrical component.
However, Vincent discloses these limitations (see claim 20 of 35 U.S.C. 102 section above).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Chen with teachings of Vincent of disposing the flexible encapsulant over the first thin electrical component with a surface of the flexible encapsulant coplanar with an active surface of the first thin electrical component, to form thinner, more flexible with delamination resistant interconnects (Vincent; [0001]).
Re claim 22, Chen discloses the method of claim 20, wherein the flexible encapsulant (22) includes a material selected from the group consisting of polyimide ([0030]), thermoplastic elastomer, thermoplastic vulcanizate, thermoplastic urethane, and polyvinyl chloride.
Re claim 23, Chen discloses the method of claim 20, further including forming an interconnect structure (18: 181/182; [0069]-[0070]) over the first thin electrical component (16a).
Chen fails to disclose forming the interconnect structure in contact with the surface of the flexible encapsulant and the active surface of the first thin electrical component.
However, Vincent discloses these limitations (see claim 14 of 35 U.S.C. 102 section above), as would be part of the thinner, more flexible with delamination resistant interconnects discussed for claims 14 and 20.
Re claim 24, Chen discloses the method of claim 20, further including providing a second thin electrical component, wherein the flexible encapsulant is disposed over the second thin electrical component (see claim 5).
Claims 2; 8; 15; and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Chen and Vincent as applied to claims 1; 7; 14; and 20 above, and further in view of IYER et al (US 2019/0287927 A1-of record, hereafter Iyer 927).
Re claim 2, Chen discloses the semiconductor device of claim 1.
But, fails to disclose wherein the first electrical component (16a) includes a thickness of 400 micrometers.
However,
Iyer 927 discloses in FIG. 2 a semiconductor comprising electrical components (200; [0048]) up to a few hundred microns thick ([0048]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Chen by using (through routine experimentation; MPEP § 2144.05) Iyer 927’s disclosure of electrical components up to a few hundred microns thick, such that the first electrical component (16a) includes a thickness of 400 micrometers, which lends greater flexibility to the device, as manifested by, for example, a larger tolerated bending angle without noticeable damage or performance impact (Iyer 927).
Re claim 8, Chen and Iyer 927 disclose the semiconductor device of claim 7, wherein the first thin electrical component includes a thickness of 400 micrometers (see claim 2).
Re claim 15, Chen and Iyer 927 disclose the method of claim 14, wherein the first electrical component includes a thickness of 400 micrometers (see claim 2).
Re claim 21, Chen and Iyer 927 disclose the method of claim 20, wherein the first thin electrical component includes a thickness of 400 micrometers (see claim 2).
Claims 6; 13; 19; and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Chen and Vincent as applied to claims 1; 7; 14; and 20 above, and further in view of IYER et al (US 2021/0074648 A1-of record, Iyer 648).
Re claim 6, Chen discloses the semiconductor device of claim 5.
But, fails to disclose wherein the second electrical component (16b) has a different electrical function from the first electrical component (16a).
However,
Iyer 648 discloses in FIG. 2 a semiconductor device comprising electrical components (200; [0053]) having a variety of electrical functions (such as energy storage components, passive device components (e.g., inductors, capacitors, resistors, memristors, and so forth), active device components (e.g., processors, memory dies, and so forth), light-emitting diodes, lasers, imaging device components, radio device components, microelectromechanical system (MEMS) components, and sensors, amongst others; [0053]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Chen by using the variety electrical functions of the electronic components of Iyer 648, such that the second electrical component (16b) has a different electrical function from the first electrical component (16a), leading to flexible semiconductor devices with simple to complex architecture.
Re claim 13, Chen and Iyer 648 disclose the semiconductor device of claim 12, wherein the second thin electrical component has a different electrical function from the first thin electrical component (see claim 6).
Re claim 19, Chen and Iyer 648 disclose the method of claim 18, wherein the second electrical component has a different electrical function from the first electrical component (see claim 6).
Re claim 25, Chen and Iyer 648 disclose the method of claim 24, wherein the second thin electrical component has a different electrical function from the first thin electrical component (see claim 6).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408) 918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC W JONES/Primary Examiner, Art Unit 2892
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