DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of species I, claims 1-3 and 5-11, in the reply filed on February 18, 2026 is acknowledged.
Claims 4 and 12-14 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on February 18, 2026.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on June 25, 2025 and March 4, 202 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: “223 ([0046]). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "213" and "223" have both been used to designate “gate structure”. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words. It is important that the abstract not exceed 150 words in length since the space provided for the abstract on the computer tape used by the printer is limited. The form and legal phraseology often used in patent claims, such as "means" and "said," should be avoided. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, "The disclosure concerns," "The disclosure defined by this invention," "The disclosure describes," etc.
The abstract of the disclosure is objected to because improper language. Changing the word "comprises" on line 1 to the word "includes" is suggested. Correction is required. See MPEP § 608.01(b).
The disclosure is objected to because of the following informalities: Undefined acronyms/symbols, such as “PSOP”, “PQFN” and “TOLL” ([0078]). The examiner suggests that applicant spell out all the acronyms/symbols when using them for the first time in the disclosure.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claims 1-3 and 5-11 are objected to because of the following informalities: a comma should be inserted after “structure” (claim 1, line 1). Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-3 and 5-11 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There appears to be no adequate description in the specification for the claim limitation of "a transistor structure comprising: … a biasing circuit configures to bias the semiconductor substrate", as recited in claim 1, “the positive voltage being selectively applied depending on a state of transistor structure”, as recited in claim 7; “the positive bias voltage changing depending on a state of the transistor structure”, as recited in claim 8; and “the biasing circuit comprising: a transistor, a drain of the transistor being connected to the substrate contact layer, a gate of the transistor being coupled to an inverter circuit, a source of the transistor being connected to ground”, as recited in claim 10 (note: paragraph [0038] discloses that “Fig. 1 illustrates a transistor structure 100 that embodies a HEMT” and Fig. 1 shows a HEMT device with an external bias circuit 120).
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-3 and 5-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term "proximate" in claim 1 is a relative term which renders the claim indefinite. The term "proximate" is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
The term "rigidly" in claim 1 is a relative term which renders the claim indefinite. The term "rigidly" is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
The claimed limitation of “a transistor structure comprising: … a biasing circuit configures to bias the semiconductor substrate”, as recited in claim 1, which indefinite and renders the claim uncertain because said limitation is inconsistent with the specification disclosure: i.e. [0038] and Fig. 1. See MPEP §2173.03.
The claimed limitation of "a transistor", as recited in claim 10, is unclear as to whether said limitation is the same as or different from "a transistor structure", as recited in claim 1.
The claimed limitation of "the transistor", as recited in claim 10, lines 2-3, is unclear as to whether said limitation is the same as or different from "a transistor structure", as recited in claim 1 and/or “a transistor”, as recited in claim 10, line 2.
The claimed limitation of "an inverter circuit", as recited in claim 10, is unclear as to whether said limitation is the same as or different from "a transistor structure", as recited in claim 1.
The claimed limitation of "a drain of the transistor", as recited in claim 10, is unclear as to whether said limitation is the same as or different from "a drain contact", as recited in claim 1.
The claimed limitation of "a gate of the transistor", as recited in claim 10, is unclear as to whether said limitation is the same as or different from "a gate terminal", as recited in claim 1.
The claimed limitation of "a source of the transistor", as recited in claim 10, is unclear as to whether said limitation is the same as or different from "a source contact", as recited in claim 1.
Claim 11 recites the limitation "the semiconductor substrate contact layer" in lines 2-3. There is insufficient antecedent basis for this limitation in the claim. Also, it is unclear as to whether said limitation is the same as or different from “a substrate contact layer”, as recited in claim 1.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 5-8, 10 and 11, as best understood, is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Kanomata et al. (2022/0385196).
As for claim 1, Kanomata et al. show in Figs. 1A, 1B, 2A-2C and related text a transistor structure comprising:
a barrier semiconductor layer 5115;
a channel semiconductor layer 5114 immediately beneath the barrier semiconductor layer to form a heterojunction interface with the barrier semiconductor layer, the heterojunction inducing a two-dimensional electron gas (2DEG) within the channel semiconductor layer;
a source contact 51151A/5116A in conductive contact with the 2DEG;
a drain contact 51151A/5116A in conductive contact with the 2DEG;
a gate terminal 5119A/5118A (or 5119B/5118B) that is proximate to the 2DEG such that voltages applied to the gate terminal control whether the 2DEG is continuous between the source contact and the drain contact;
a semiconductor substrate 5111 beneath and rigidly coupled to the channel semiconductor layer and the barrier semiconductor layer;
a substrate contact layer 5153 disposed immediately beneath the semiconductor substrate, the substrate contact layer being electrically disconnected from the source contact to allow for a different voltage to be applied to the substrate contact layer as compared to the source contact; and
a biasing circuit 100 configured to bias the semiconductor substrate (Fig. 1A).
The limitations "such that voltages applied to the gate terminal control whether the 2DEG is continuous between the source contact and the drain contact; and configured to bias the semiconductor substrate" have not been given patentable weight because it is considered to be intended use and/or functional language. This type of description does not affect the structure of the final device. It is respectfully noted that intended use and/or other types of functional language must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In a claim drawn to a process of making, the intended use must result in a manipulative difference as compared to the prior art. In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). Note that Applicant has burden of proof in such cases, as the above case law makes clear. Furthermore, it has been held that where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).
As for claim 2, Kanomata et al. show the semiconductor substrate being a Silicon substrate ([0041]).
As for claim 3, Kanomata et al. show the barrier semiconductor layer being an AlGaN layer, the channel semiconductor layer being a GaN layer ([0042]).
As for claim 5, Kanomata et al. show the biasing circuit being configured to bias the semiconductor substrate by applying a positive bias voltage to the substrate contact layer, the positive bias voltage being positive relative to a source voltage applied to the source terminal (Figs. 2A-2C).
Regarding the limitations ("applying a positive bias voltage to the substrate contact layer, the positive bias voltage being positive relative to a source voltage applied to the source terminal") these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Furthermore, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danley, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett -Packard Co. v. Bausch & Lomb Inc., 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
As for claim 6, Kanomata et al. show the positive bias voltage being a fixed positive voltage relative to the source voltage (Fig. 2B).
Regarding the limitations ("the positive bias voltage being a fixed positive voltage relative to the source voltage") these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Furthermore, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danley, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett -Packard Co. v. Bausch & Lomb Inc., 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
As for claim 7, Kanomata et al. show the positive bias voltage being selectively applied depending on a state of the transistor structure (Fig. 2A).
Regarding the limitations ("the positive bias voltage being selectively applied depending on a state of the transistor structure") these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Furthermore, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danley, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett -Packard Co. v. Bausch & Lomb Inc., 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
As for claim 8, Kanomata et al. show the positive bias voltage changing depending on a state of the transistor structure (Fig. 2A).
Regarding the limitations ("the positive bias voltage changing depending on a state of the transistor structure") these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Furthermore, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danley, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett -Packard Co. v. Bausch & Lomb Inc., 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
As for claim 10, Kanomata et al. show the biasing circuit comprising:
a transistor Q2, a drain SQ2 of the transistor being connected to the substrate contact layer, a gate GQ2 of the transistor being coupled to an inverter circuit R2/Q21, a source DQ2 of the transistor being connected to ground T2.
As for claim 11, Kanomata et al. show the biasing circuit further being configured to bias the semiconductor substrate contact layer, the biasing circuit being connected to the semiconductor substrate contact layer with a wire S3 (Figs. 1A-1B).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 9, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Kanomata et al. (2022/0385196).
Kanomata et al. disclosed substantially the entire claimed invention, as applied to claim 5 above, except the positive bias voltage has a maximum voltage of more than 40 Volts to the semiconductor substrate.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the positive bias voltage having a maximum voltage of more than 40 Volts to the semiconductor substrate, in order to optimize the performance of the device. Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Furthermore, it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Conclusion
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/MEIYA LI/Primary Examiner, Art Unit 2811
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