Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 17, and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Guo et al, US 20210335944, hereafter ‘Guo’.
Regarding claim 1, Guo discloses : A display device comprising: a substrate(Fig. 4, #1); an insulating layer disposed on the substrate(#14), wherein an isolation groove is defined in the insulating layer(#12), and a plurality of isolation areas is defined by the isolation groove(#12 defined in layers #14, #9, #7); and a pixel circuit disposed in each of the isolation areas(#TFT disposed on both sides of a pinhole #4 where #4 can include light shielding materials or insulating layers [0099] creating an isolation between #TFT on sides of #12), wherein at least two portions of the isolation groove have different widths from each other(#12 may be a tapered shape [0075]).
Regarding claim 2, Guo discloses : The display device of claim 1, wherein a portion of the isolation groove overlaps a pinhole area defined by patterns of the pixel circuit(Fig. 4, #12 to overlap #4 between #TFT and #3), and the portion of the isolation groove overlapping the pinhole area has a greater width than a portion of the isolation groove not overlapping the pinhole area(#12 may be a tapered shape such as a truncated prism or truncated cone where an upper portion of #12 is greater in width than a bottom portion as shown in Fig. 4).
Regarding claim 3, Guo discloses : The display device of claim 2, wherein the portion of the isolation groove overlapping the pinhole area has a greater depth than the portion of the isolation groove not overlapping the pinhole area(Fig. 4, #12 in #4 shown to have a depth defined in multiple layers to include #9 and #7. #14 in areas that is not aligned with #4 shown to be one depth.
Regarding claim 17, Guo discloses : A display device comprising: a substrate(Fig. 4, #1); an insulating layer disposed on the substrate(#14), wherein an isolation groove is defined in the insulating layer(#12), and a plurality of isolation areas is defined by the isolation groove(#12 defined in #14, 9, and 7); and a pixel circuit disposed in each of the isolation areas(#TFT), wherein at least two portions of the isolation groove have different widths or depths from each other(#12 may be a tapered shape [0075]).
Regarding claim 18, Guo discloses : The display device of claim 17, wherein a portion of the isolation groove overlaps a pinhole area defined by patterns of the pixel circuit(Fig. 4, #12 overlaps #4 and defined by #TFT on both sides of #12), and the portion of the isolation groove overlapping the pinhole area has a greater width or depth than a portion of the isolation groove not overlapping the pinhole area(#12 in #4 shown to have a greater depth than #14 not in #4).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-7, 11, 13, and 19-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al, US 20210335944, hereafter ‘Guo’, in view of Chen et al, US 20230031404, hereafter ‘Chen’.
Regarding claim 4, Guo discloses : The display device of claim 2.
Guo does not disclose : further comprising: an upper light blocking layer disposed on the insulating layer, wherein having an opening overlapping the pinhole area is defined through the upper light blocking layer.
However, in the same field of endeavor, Chen teaches : further comprising: an upper light blocking layer disposed on the insulating layer(#14), wherein having an opening overlapping the pinhole area is defined through the upper light blocking layer(Fig. 1, U2 to be used as imaging pinholes [0033]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Chen to Guo to have an opening in a light blocking layer overlapping a pinhole area to allow light to reach a photosensitive sensor (Chen, [0061]).
Regarding claim 5, Guo discloses : The display device of claim 2.
Guo does not disclose : further comprising: wherein the isolation groove is further defined in a transmissive area in which a pixel comprising the pixel circuit is not disposed.
However, in the same field of endeavor, Chen teaches : wherein the isolation groove is further defined in a transmissive area in which a pixel comprising the pixel circuit is not disposed(Fig. 1, #U5 disposed in a region overlapping #U2 [0051] with #U2 disposed in the pixel non opening region [0033]. #U1 is disposed in a region with #TFT).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Chen to Guo to disposed isolation grooves in an area where a pixel circuit is not disposed.
Regarding claim 6, Guo as modified by Chen teaches : The display device of claim 5.
Cheng teaches : further comprising: an upper light blocking layer disposed on the insulating layer, wherein an opening overlapping the transmissive area is defined through the upper light blocking layer(Fig. 4, #14 with opening #U2).
Regarding claim 7, Guo as modified by Chen discloses : The display device of claim 6.
Guo teaches : further comprising : a line disposed in the transmissive area(Fig. 6, #16) and connecting pixels disposed at opposing sides of the transmissive area to each other(#TFT shown to overlap #3 and not to overlap #4).
Regarding claim 11, Guo as modified by Chen discloses : The display device of claim 5.
Guo teaches : wherein the portion of the isolation groove overlapping the pinhole area has a different depth from a portion of the isolation groove overlapping the transmissive area(Fig. 4, #14 in #4 shown to have a depth in #9 and #7).
Regarding claim 13, Guo discloses : The display device of claim 2.
Gou does not disclose : wherein the pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and a capacitor.
However, in the same field of endeavor Chen teaches : wherein the pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and a capacitor(Pixel circuit may include a plurality of transistors [0034] and capacitor [0050]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Chen to Guo to include a pixel circuit with multiple transistors and capacitor.
Regarding claim 19, Guo discloses : The display device of claim 18.
Guo does not disclose : further comprising: an upper light blocking layer disposed on the insulating layer, wherein an opening overlapping the pinhole area is defined through the upper light blocking layer.
However, in the same field of endeavor, Chen teaches : further comprising: an upper light blocking layer disposed on the insulating layer(#14 disposed on a top surface with film layers to include insulating layers [0073]), wherein an opening overlapping the pinhole area is defined through the upper light blocking layer(#U2 to align with pinhole [0061]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Chen to Guo to have an opening in a light blocking layer overlapping a pinhole area to allow light to reach a photosensitive sensor (Chen, [0061]).
Regarding claim 20, Guo discloses : The display device of claim 18.
Guo does not disclose : wherein the isolation groove is further defined in a transmissive area in which a pixel comprising the pixel circuit is not disposed.
However, in the same field of endeavor, Chen teaches : wherein the isolation groove is further defined in a transmissive area in which a pixel comprising the pixel circuit is not disposed(Fig. 3, #U5 disposed on a side away from light emitting devices[0071]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Chen to Guo to include isolation grooves in areas without a pixel circuit to allow light to reach a photosensitive sensor (Chen, [0061]).
Regarding claim 21, Guo as modified by Cheng discloses : The display device of claim 20.
Chen teaches : further comprising: an upper light blocking layer disposed on the insulating layer, wherein an opening overlapping the transmissive area is defined through the upper light blocking layer(Fig. 3, Openings #U1 and #U2 disposed to aligned with pinholes to improve light transmittance to photosensitive sensors [0061]).
Claims 8 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al, US 20210335944, hereafter ‘Guo’, in view of Chen et al, US 20230031404, hereafter ‘Chen’ in further view of Park et al, US 20190267440, hereafter ‘Park’.
Regarding claim 8, Guo as modified by Chen discloses : The display device of claim 7.
Guo as modified by Chen does not disclose : wherein the line comprise a data line, an intermediate connection electrode, a first initialization voltage line, and a second initialization voltage line.
However, in the same field of endeavor, Park teaches : wherein the line comprise a data line, an intermediate connection electrode, a first initialization voltage line, and a second initialization voltage line(Fig 2 and Fig. 3, data line, initialization voltage lines and intermediate connection electrodes are common components in a display device [0058].
Regarding claim 9, Guo as modified by Cheng and Park discloses : The display device of claim 7.
Chen teaches : wherein the line is disposed in the transmissive area not to overlap the opening of the upper light blocking layer(lines are shown to not be in a projection of pinhole in #14 to allow light to pass to a photosensitive sensor [0061-0062]).
Claim 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al, US 20210335944, hereafter ‘Guo’, in view of Chen et al, US 20230031404, hereafter ‘Chen’ in further view of Park et al, US 20190267440, hereafter ‘Park’, in further view of Kim et al, US 20200219915, hereafter ‘Kim’.
Regarding claim 10, Guo as modified by Chen and Park discloses : The display device of claim 9.
Guo as modified by Chen and Park does not disclose : wherein the line is bent in the transmissive area to bypass the opening of the upper light blocking layer.
However, in the same field of endeavor, Kim teaches : wherein the line is bent in the transmissive area to bypass the opening of the upper light blocking layer(Fig. 14cpinhole may have through-holes in #LBM [0102] where lines are bent to avoid #PHS [0178]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Park to Guo, Chen, and Park to improve light transmittance to an optical sensor (Kim [0003-0004]).
Claim 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al, US 20210335944, hereafter ‘Guo’, in view of Chen et al, US 20230031404, hereafter ‘Chen’ in further view of Shigei et al, US 20230246049, hereafter ‘Shigei’.
Regarding claim 12, Guo as modified by Chen discloses : The display device of claim 11.
Guo as modified by Chen does not disclose : wherein the portion of the isolation groove overlapping the transmissive area has a greater depth than the portion of the isolation groove overlapping the pinhole area.
However, in the same field of endeavor, Shigei teaches : wherein the portion of the isolation groove overlapping the transmissive area has a greater depth than the portion of the isolation groove overlapping the pinhole area(Improving aperture by increasing depth [0047]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Shigei to Guo and Chen to modify isolations grooves depth to maintain angle of view while suppressing impairment of sense of quality (Shigei [0048]).
Claim 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al, US 20210335944, hereafter ‘Guo’, in view of Chen et al, US 20230031404, hereafter ‘Chen’ in further view of Wang et al, US 20230157098, hereafter ‘Wang’.
Regarding claim 16, Guo as modified by Chen discloses : The display device of claim 13.
Guo as modified by Chen does not disclose : wherein the first transistor comprises a gate electrode connected to a third node, a first electrode connected to a first node and a second electrode connected to a second node, the second transistor comprises a gate electrode connected to a first gate line, a first electrode connected to a data line and a second electrode connected to the first node, the third transistor comprises a gate electrode connected to a second gate line, a first electrode connected to the third node and a second electrode connected to the second node, the fourth transistor comprises a gate electrode connected to a third gate line, a first electrode connected to the third node and a second electrode connected to a first initialization voltage line, the fifth transistor comprises the gate electrode connected to an emission control line, a first electrode connected to a first driving voltage line and a second electrode connected to the first node, the sixth transistor comprises a gate electrode connected to the emission control line, a first electrode connected to the second node and a second electrode connected to a pixel electrode, the seventh transistor comprises a gate electrode connected to a fourth gate line, a first electrode connected to the pixel electrode and a second electrode connected to a second initialization voltage line, and the capacitor comprises a first electrode connected to the first driving voltage line and a second electrode connected to the third node.
However, in the same field of endeavor, Wang teaches : wherein the first transistor comprises a gate electrode connected to a third node(Fig. 1, #t1 connected to #n1), a first electrode connected to a first node and a second electrode connected to a second node(#t11 connected to #t42 and #t12 connected to #t31), the second transistor comprises a gate electrode connected to a first gate line(#t2 connected to #gt [0095]), a first electrode connected to a data line and a second electrode connected to the first node(connected to #dt and #t42), the third transistor comprises a gate electrode connected to a second gate line(#t3 connected to #gn/gt), a first electrode connected to the third node and a second electrode connected to the second node(connected to #t32 and #t31), the fourth transistor comprises a gate electrode connected to a third gate line(#t6 connected to #rt1), a first electrode connected to the third node and a second electrode connected to a first initialization voltage line(connected to Vinit1 and #n1), the fifth transistor comprises the gate electrode connected to an emission control line(#t4 connected to #eml), a first electrode connected to a first driving voltage line and a second electrode connected to the first node(connected to #t42 and #vdd), the sixth transistor comprises a gate electrode connected to the emission control line(#t5 connected to #eml), a first electrode connected to the second node and a second electrode connected to a pixel electrode(connected to #20 and #t31), the seventh transistor comprises a gate electrode connected to a fourth gate line(connected to #scan), a first electrode connected to the pixel electrode and a second electrode connected to a second initialization voltage line(connected to #20 and Vinit2), and the capacitor comprises a first electrode connected to the first driving voltage line and a second electrode connected to the third node(#cst connected to #vdd and #n1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of the features of a pixel circuit of Wang to Guo and Chen for a 7T1C pixel circuit structure (Wang [0232]).
Allowable Subject Matter
Claims 14 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : US 20220271098 – Improvements to transmittance for image sensors.
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/D.T./Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897