DETAILED ACTION
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 11-13 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsieh (U.S. PGPub 2018/0158727).
Regarding claim 11, Hsieh teaches a method for forming a semiconductor device structure, comprising: forming an epitaxial structure beside a channel structure (Fig. 3E, 320, [0033], 310, [0017]); forming a dielectric layer surrounding and covering the epitaxial structure (Fig. 3F, 340, [0037]); partially removing the dielectric layer to form a contact opening exposing the epitaxial structure (Fig. 3K, 353, [0040]); forming a protective structure over sidewalls of the contact opening, wherein the protective structure has an inner portion and an outer portion, the inner portion is between the outer portion and the dielectric layer, and the outer portion has a higher atomic concentration of nitrogen than that of the inner portion (Fig. 3K-3L, 360/370, [0041]-[0042], same materials as 160/170; [0027] 160 may be silicon oxide, [0028] 170 may be silicon nitride); and forming a conductive contact filling the contact opening (Fig. 3P, 390, [0045]).
Regarding claim 12, Hsieh teaches forming a metal-semiconductor compound feature on the epitaxial structure after the protective structure is formed, wherein the metal-semiconductor compound feature is between the conductive contact and the epitaxial structure (Fig. 3P, 380, [0044]).
Regarding claim 13, Hsieh teaches wherein the metal-semiconductor compound feature is formed before the conductive contact is formed (Fig. 3O-3P, 380, [0044]).
Regarding claim 15, Hsieh teaches wherein the inner portion of the protective structure has a lower dielectric constant than that of the outer portion of the protective structure ([0041]-[0042], same materials as 160/170; [0027] 160 may be silicon oxide, [0028] 170 may be silicon nitride; silicon oxide has lower dielectric constant).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-5, 7-8, and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (U.S. PGPub 2022/0028994) in view of Hsieh (U.S. PGPub 2018/0158727).
Regarding claim 1, Chen teaches a method for forming a semiconductor device structure, comprising: forming a metal gate stack wrapped around a plurality of semiconductor nanostructures, wherein the semiconductor nanostructures are adjacent to an epitaxial structure (Fig. 21C, 54/55, [0043]; 102, [0078]; 92, [0066]); forming a dielectric layer over the metal gate stack and the epitaxial structure (106, [0084]); partially removing the dielectric layer to form a contact opening exposing the epitaxial structure (Fig. 22B, [0085]); and forming a conductive contact over the epitaxial layer to fill the contact opening (Fig. 23B, 112, [0087]).
Chen does not explicitly teach forming a first protective layer over sidewalls of the contact opening; forming a second protective layer over the first protective layer, wherein the first protective layer has a lower dielectric constant than that of the second protective layer; and forming the conductive contact over the second protective layer.
Hsieh teaches a method for forming a semiconductor device structure, comprising a metal gate stack over a semiconductor structure adjacent to an epitaxial structure (Fig. 3I, 322, 320, [0033], [0035]); forming a dielectric layer over the metal gate stack and the epitaxial structure (352, [0039]), partially removing the dielectric layer to form a contact opening exposing the epitaxial structure (Fig. 3J, 353, [0040]), forming a first protective layer over sidewalls of the contact opening (Fig. 3K, 360, [0041]), forming a second protective layer over the first protective layer (Fig. 3L, 370, [0042]), wherein the first protective layer has a lower dielectric constant than that of the second protective layer ([0041]-[0042], 360/370 same materials as 160/170; [0027] 160 may be silicon oxide, [0028] 170 may be silicon nitride; SiN has higher dielectric constant); and forming a conductive contact over the second protective layer and the epitaxial layer to fill the contact opening (390, [0045]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Hsieh with Chen such that the method comprises forming a first protective layer over sidewalls of the contact opening; forming a second protective layer over the first protective layer, wherein the first protective layer has a lower dielectric constant than that of the second protective layer; and forming the conductive contact over the second protective layer for the purpose of protecting the metal gate during cleaning (Shieh, [0043]).
Regarding claim 2, the combination of Chen and Hsieh teaches forming a metal-semiconductor compound feature on the epitaxial structure after the second protective layer is formed, wherein the metal-semiconductor compound feature is between the conductive contact and the epitaxial structure (Chen, Fig. 23C, [0086]-[0087]; Hsieh, Fig. 3P, 380, [0044]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 1.
Regarding claim 3, the combination of Chen and Hsieh teaches cleaning an exposed surface of the epitaxial structure after the second protective layer is formed and before the metal-semiconductor compound feature is formed (Hsieh, Fig. 3M, [[0043]).It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 1.
Regarding claim 4, the combination of Chen and Hsieh teaches wherein the second protective layer is at least partially consumed during the cleaning of the exposed surface of the epitaxial structure (Hsieh, Fig. 3M, [[0043]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 1.
Regarding claim 5, the combination of Chen and Hsieh teaches wherein the second protective layer has a higher atomic concentration of nitrogen than that of the first protective layer (Hsieh, [0027]-[0028], silicon oxide/silicon nitride). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 1.
Regarding claim 7, the combination of Chen and Hsieh teaches forming a gate spacer over a sidewall of a dummy gate stack; and replacing the dummy gate stack with the metal gate stack, wherein the first protective layer is in direct contact with the gate spacer and the dielectric layer (Chen, Fig. 15E, 76, 81, [0055], [0071]; Figs. 18C-20C, [0076]-[0078]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 1.
Regarding claim 8, the combination of Chen and Hsieh teaches forming a second dielectric layer over the metal gate stack and the conductive contact; and forming a conductive via penetrating through the second dielectric layer and electrically connected to the conductive contact (Chen, Fig. 24C, 120, [0091]-[0094]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 1.
Regarding claim 16, Chen teaches a semiconductor device structure, comprising: a plurality of semiconductor nanostructures and an epitaxial structure adjacent to the semiconductor nanostructures (Fig. 23C, 54/55, [0043]; 102, [0078]); a conductive contact electrically connected to the epitaxial structure (112, [0087]); and a dielectric layer laterally surrounding the epitaxial structure and the conductive contact (96, [0074]).
Chen does not explicitly teach a first protective layer over sidewalls of the contact opening; and a second protective layer over the first protective layer, wherein the first protective layer has a lower dielectric constant than that of the second protective layer; and forming the conductive contact over the second protective layer.
Hsieh teaches a semiconductor device structure, comprising: an epitaxial structure beside a channel structure (Fig. 3E, 320, [0033], 310, [0017]); a conductive contact electrically connected to the epitaxial structure (Fig. 3P, 390, [0045]); a dielectric layer surrounding and covering the epitaxial structure (Fig. 3F, 340, [0037]); a first protective layer between the dielectric layer and the conductive contact (Fig. 3K, 360, [0041]), a second protective layer between the first protective layer and the conductive contact (Fig. 3L, 370, [0042]), wherein the first protective layer has a lower dielectric constant than that of the second protective layer ([0041]-[0042], 360/370 same materials as 160/170; [0027] 160 may be silicon oxide, [0028] 170 may be silicon nitride; SiN has higher dielectric constant);
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Hsieh with Chen such that the device comprises a first protective layer over sidewalls of the contact opening; and a second protective layer over the first protective layer, wherein the first protective layer has a lower dielectric constant than that of the second protective layer; and forming the conductive contact over the second protective layer for the purpose of protecting the metal gate during cleaning (Shieh, [0043]).
Regarding claim 17, the combination of Chen and Hsieh teaches a metal-semiconductor compound feature between the epitaxial structure and the conductive contact (Chen, Fig. 23C, [0086]-[0087]; Hsieh, Fig. 3P, 380, [0044]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen and Hsieh for the reasons set forth in the rejection of claim 16.
Claims 6 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (U.S. PGPub 2022/0028994) in view of Hsieh (U.S. PGPub 2018/0158727) and Wu (U.S. PGPub 2022/0262792).
Regarding claim 6, the combination of Chen and Hsieh teaches wherein the first protective layer is 1.8 nm (Hsieh, [0027]) and is silent on the thickness of the second protective layer.
Wu teaches wherein a silicon nitride protective layer in a contact opening for an epitaxial source/drain feature is 1-3 nm in thickness ([0058], Fig. 16B). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05.
Therefore it would have been obvious to a person having ordinary skill in the art to combine the teachings of Wu with Chen and Hsieh such that the first protective layer is thicker than the second protective layer for the purpose of choosing an appropriate known thickness for each layer from the pertinent art.
Regarding claim 18, the combination of Chen and Hsieh teaches wherein the first protective layer is 1.8 nm (Hsieh, [0027]) and is silent on the thickness of the second protective layer.
Wu teaches wherein a silicon nitride protective layer in a contact opening for an epitaxial source/drain feature is 1-3 nm in thickness ([0058], Fig. 16B). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05.
Therefore it would have been obvious to a person having ordinary skill in the art to combine the teachings of Wu with Chen and Hsieh such that the first protective layer is thicker than the second protective layer for the purpose of choosing an appropriate known thickness for each layer from the pertinent art.
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (U.S. PGPub 2022/0028994) in view of Hsieh (U.S. PGPub 2018/0158727) and Chen 468 (U.S. PGPub 2021/0098468).
Regarding claim 9, the combination of Chen and Hsieh does not explicitly teach forming a second dielectric layer over the metal gate stack and the dielectric layer; and partially removing the second dielectric layer and the first dielectric layer to form the contact opening.
Chen 468 teaches a method for forming a semiconductor device structure, comprising a metal gate stack over a semiconductor structure adjacent to an epitaxial structure (Fig. 5, 222, 400, 212, [0049]-[0051]); forming a dielectric layer over the metal gate stack and the epitaxial structure (450, [0053]), forming a second dielectric layer over the metal stack and the dielectric layer (280, [0053]), and partially removing the dielectric layer and second dielectric layer to form a contact opening exposing the epitaxial structure (Fig. 8, 520).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Chen with Chen and Hsieh such that the method comprises forming a second dielectric layer over the metal gate stack and the dielectric layer; and partially removing the second dielectric layer and the first dielectric layer to form the contact opening for the purpose of protecting the gate structures (Chen 468, [0053]).
Regarding claim 10, the combination of Chen, Hsieh, and Chen 468 teaches forming a third dielectric layer over the second dielectric layer and the conductive contact; and forming a conductive via penetrating through the third dielectric layer and electrically connected to the conductive contact (Chen, Fig. 24C, 120, [0091]-[0094]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Chen, Hsieh, and Chen 468 for the reasons set forth in the rejection of claim 9.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Hsieh (U.S. PGPub 2018/0158727) in view of Kim (U.S. PGPub 2016/0043197).
Regarding claim 14, Hsieh teaches cleaning the epitaxial structure before the metal-semiconductor compound feature is formed (Fig. 3M, [0043]) but does not explicitly teach wherein the protective structure becomes thinner after the cleaning of the epitaxial structure.
Wei teaches wherein a cleaning process on a silicon nitride barrier layer in a source/drain contact opening reduces the thickness of the barrier layer (Figs. 18-19, [0106]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Wei with Hsieh such that the protective structure becomes thinner after the cleaning of the epitaxial structure for the purpose of increasing the size of the contact hole (Wei, [0106]).
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (U.S. PGPub 2022/0028994) in view of Hsieh (U.S. PGPub 2018/0158727) and Kim 738 (U.S. PGPub 2022/0246738).
Regarding claims 19-20, the combination of Chen and Hsieh does not explicitly teach a third protective layer between the first protective layer and the second protective layer, wherein the second protective layer has a higher dielectric constant than that of the third protective layer and a higher atomic concentration of nitrogen than that of the third protective layer. Hsieh teaches wherein the first protective layer is formed from silicon oxide and the second protective layer is formed from silicon nitride or silicon oxynitride ([0027]-[0028]).
Kim 738 teaches a protective layer comprising a first protective layer and second protective layer on a source/drain contact opening (Fig. 2C, 160, [0062]), wherein the protective layer may comprise a triple layer structure ([0062]), and wherein the protective layer may be formed of silicon oxynitride or silicon nitride ([0061]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Kim 738 with Chen and Hsieh such that the device comprises a third protective layer between the first protective layer and the second protective layer, wherein the second protective layer is formed of silicon oxynitride and therefore has a higher dielectric constant than that of the third protective layer and a higher atomic concentration of nitrogen than that of the third protective layer for the purpose of forming a triple layer structure with a third protective layer formed from a suitable known material (Kim 738, [0062]).
Conclusion
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/ALIA SABUR/Primary Examiner, Art Unit 2812