DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group II in the reply filed on 8/18/26 is acknowledged.
Applicant points to claims 16-35 as being elected. However, new claims 21-35 would not be separated from the originally filed claims 1-15 as they recite substantially the same features only with a “method of forming”. Therefore, new claims 16-35 are grouped with canceled claims 1-15 and not elected.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 18 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 18 recites “and forming source/drain regions in the substrate and on opposite sides of the source/drain regions” which seems to be in error. Claim 19 inherits this deficiency.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 16, 20 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sengupta (US 2017/0330070) in view of Chung (US 2016/0071582) and Ooishi (US 2006/0077737).
Regarding claim 16, Sengupta discloses a method for forming a neural network circuit (see Figures 4-6), comprising: forming a neuron unit (see Figure 5, SOT neuron), and forming a magnetic tunnel junction structure over and electrically connected to the heavily-doped P-type region; and forming a synapse unit (see Figure 5, memristor/PCM array), the synapse unit is electrically connected to the neuron unit (via 506).
Sengupta fails to teach the neuron unit and synapse unit formed over a substrate wherein the forming the neuron unit comprises: forming a heavily-doped N-type region in the substrate; forming a heavily-doped P-type region in the substrate, wherein the heavily-doped N-type region and the heavily-doped P-type region collective form a diode; wherein forming the synapse unit comprising: forming a transistor over the substrate; and forming a resistive element electrically connected to the transistor.
However, these were known techniques for forming such devices. For example Chung (see Figure 9a, paragraph 0031)teaching an MTJ (42, or phase change, or RRAM, etc) unit formed over a substrate wherein the forming the unit comprises: forming a heavily-doped N-type region (37) in the substrate; forming a heavily-doped P-type region (33) in the substrate, wherein the heavily-doped N-type region and the heavily-doped P-type region collective form a diode. Further, Ooishi teaches forming a RRAM unit wherein forming the unit comprising: forming a transistor over the substrate; and forming a resistive element electrically connected to the transistor (see Figure 2).
Therefore, it would have been obvious to one having ordinary skill at the time of filing to combine the teachings of Chung and Ooishi to implement the device of Sengupta since these were known techniques of forming MTJ units (as for the neurons of Sengupta) and RRAM units (as for the synapse array of Sengupta) and such combination would yield the predictable result of a combined RRAM and MTJ configuration in addition to their respectively taught benefits.
Regarding claim 20, Sengupta discloses the method of claim 16, wherein the magnetic tunnel junction structure comprises: a pinned layer; a free layer; and a tunneling barrier layer between the pinned layer and the free layer (see paragraph 0023).
Regarding claim 21, Sengupta discloses the method of claim 20, wherein the free layer comprises CoFeB, CoFe, FeB, CoB (see paragraph 0025).
Allowable Subject Matter
Claim 17 (18 and 19 provisionally—see above 112 rejection) are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 17, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including wherein forming the neuron unit further comprises: forming a dummy gate structure over the substrate prior to forming the heavily-doped N- type region and the heavily-doped P-type region, wherein the forming the heavily-doped N-type region and the heavily-doped P-type region are formed on opposite sides of the dummy gate structure.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
The remaining cited and attached references teach various embodiments of MTJ/resistive Neural network configurations.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS KING whose telephone number is (571)272-2311. The examiner can normally be reached M-F: 9:00AM-5:30PM.
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/DOUGLAS KING/Primary Examiner, Art Unit 2824
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