DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group III, claims 15-20 in the reply filed on 04/10/2026 is acknowledged.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description:
Figure 1: 110
Figure 3: 222, 250, 250T, and 420
Figure 19: 250 and 250T
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21-28 and 31 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 21 recites the limitation "the first transistor" in line 3. There is insufficient antecedent basis for this limitation in the claim. For the purpose of compact prosecution, the claim will be examined as if “the first transistor” was replaced with “the first device” which had been properly introduced within the claim and follows a similar pattern as the other independent claims.
Claim 22 recites “wherein the dielectric material is by a spin-coating process”. There is no verb provided in this limitation describing exactly how the “dielectric material” relates to “a spin-coating process”. As it is unclear exactly what is being required by this claim, it is indefinite. For the purpose of compact prosecution this claim will be examined such that any relationship between the step of dielectric material and a spin-coating process will be considered as meeting the claimed limitation.
Claims 24 and 25 recites the limitation "the introduced compound". There is insufficient antecedent basis for this limitation in the claim. For the purpose of compact prosecution, these claims will be examined with the interpretation that “the introduced compound” refers to group of compounds introduced in claim 23. Examiner suggests that claim 23 be amended to properly introduce the term “the introduced compound” to resolve this issue.
Claim 31 recites the limitation "the treatment". There is insufficient antecedent basis for this limitation in the claim. For the purpose of compact prosecution, the claim will be examined as if “the treatment” was replaced with “the microwave treatment” which had been properly introduced within claim 29.
Claims 22-28 are indefinite and rejected here due to their dependence upon claim 21.
Claim Rejections - 35 USC § 103
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (US-20230225115-A1) in view of Simsek-Ege et al. (US-20230207505-A1), Liang et al. (US-20110081782-A1), and Said et al. (20230328973-A1).
Regarding Claim 15, Wu teaches a method (Paragraph [0002] methods taught) comprising:
etching an opening extending through a dielectric layer disposed on the substrate (Paragraph [0022] Figure 2F part of stop layer (element 28) and barrier layer (element 29) are removed to form an opening over the capacitor contact layer (element 27). This opening extends vertically. Paragraph [0023] barrier layer (element 29) can be silicon nitride which can be considered a dielectric material);
filling the opening with a conductive material (Paragraph [0025] Figure 2G conductive material layer (element 30) fills the opening created over the capacitor contact layer (element 27);
etching back the conductive material to form another opening (Paragraph [0026] Figure 2H conductive material layer (element 30) is etched to form an opening (element 32));
fill the another opening with a dielectric material (Paragraph [0035] isolation material (element 34) is filled into the opening (element 32). Paragraph [0033] silicon oxide can be an isolation material which is a dielectric material).
Wu fails to teach forming a first transistor of a transistor stack on a substrate; forming a second transistor of the transistor stack, wherein the second transistor is disposed over the first transistor and that the opening extends vertically adjacent the first transistor and the second transistor.
Wu further teaches that the method can be used for forming a memory structure (Paragraph [0007]) and that the memory structure could comprise a plurality of memory cells that each include a transistor (Paragraph [0003]).
Simsek-ege teaches a microelectronic device structure (Paragraph [0021]). Simsek-ege teaches that the device includes a plurality of memory cells, where the memory cells include vertical stacks of transistors (Paragraph [0021]). Simsek-ege teaches that that the use of multiple dimensions in designing of the microelectronic devices can allow for compact designs that offer performance advantages (Paragraphs [0002-0004]).
It would have been obvious to one of ordinary skill in the art to have modified the method of Wu such that the method was conducted on a memory structure where some of the plurality of memory cells were formed in vertical stacks as taught by Simsek-ege. In such a case, this plurality of vertical stacks of memory cells would comprise vertical stacks of transistors such that the limitations of “forming a first transistor of a transistor stack on a substrate” and “forming a second transistor of the transistor stack, wherein the second transistor is disposed over the first transistor” would be met. The method of Wu, as outlined above, could then be conducted on some other of the plurality of memory cells within the same substrate, such that the limitation “wherein the opening extends vertically adjacent the first transistor and the second transistor” would be met.
One of ordinary skill in the art would have been motivated to make this modification because the use of multiple dimensions in designing of the microelectronic devices can allow for compact designs that offer performance advantages (Simsek-ege Paragraphs [0002-0004]). Additionally, this modification could be considered the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of provided a design for some of the plurality of memory cells within a memory structure. See MPEP 2143(I)(A).
Modified Wu, as outlined above fails to teach that the dielectric material that fills the “another opening” is deposited with a spin-on deposition process. Wu teaches that the dielectric material can be silicon oxide (Paragraph [0033]), but is silent on the methods to be used in depositing this material.
Said teaches methods related to forming semiconductor devices (Paragraph [0001]). Said teaches that a dielectric material, that can be silicon oxide, can be deposited to fill a cavity in an existing structure, and that this dielectric material can be deposited using a spin coating process (Paragraph [0076]).
It would have been obvious to one of ordinary skill in the art to have modified the method of modified Wu by using a spin coating process to deposit the silicon oxide material as taught by Said.
This modification would have been obvious to one of ordinary skill in the art as it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a suitable process for depositing a silicon oxide material to fill a cavity on a substrate. See MPEP 2143(I)(A).
Modified Wu fails to teach treating the dielectric material with a microwave plasma treatment.
Liang teaches methods of treating a silicon oxide material with a plasma (Paragraph [0005]). Liang teaches that the treatment of the silicon oxide material can densify the silicon oxide and make the properties of the material in areas that have different dimensions more similar than they would be otherwise (Paragraphs [0015-0018]). Liang teaches that the plasma treatment process utilizes microwave power (Paragraph [0036]).
It would have been obvious to one of ordinary skill in the art to have modified the method of modified Wu by conducting a microwave plasma treatment process on the dielectric material as taught by Liang.
One of ordinary skill in the art would have been motivated to make this modification because the treatment of the silicon oxide material can densify the silicon oxide and make the properties of the material in areas that have different dimensions more similar than they would be otherwise (Liang Paragraphs [0015-0018]). This could provide the benefit of modifying the properties of the dielectric material to be closer to target values, or could be useful in providing consistency in the properties of the dielectric material in cases where the dielectric would remain a part of the structure being formed in multiple places, with varied dimensions, on the substrate. Additionally, this modification would have been obvious to one of ordinary skill in the art as it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a microwave plasma treatment process that would densify a silicon oxide material. See MPEP 2143(I)(A).
Claims 21 and 27-28 are rejected under 35 U.S.C. 103 as being unpatentable over Wu in view of Liang.
Regarding Claim 21, Wu teaches a method (Paragraph [0002] methods taught) comprising:
forming a first device on a substrate (Paragraph [0014] a structure is formed that includes bit line (element 23), that can be considered the first device);
forming a second device disposed over the first transistor (Paragraph [0014] a structure is formed that includes cap layer (element 24), that is over the bit line (element 23) and can be considered the first device);
etching an opening extending through a dielectric layer disposed on the substrate, wherein the opening extends vertically adjacent the first device and the second device (Paragraph [0022] Figure 2F part of stop layer (element 28) and barrier layer (element 29) are removed to form an opening over the capacitor contact layer (element 27). This opening extends vertically. Paragraph [0023] barrier layer (element 29) can be silicon nitride which can be considered a dielectric material);
filling the opening with a conductive material (Paragraph [0025] Figure 2G conductive material layer (element 30) fills the opening created over the capacitor contact layer (element 27));
etching back the conductive material to form another opening (Paragraph [0026] Figure 2H conductive material layer (element 30) is etched to form an opening (element 32));
depositing a dielectric material in the another opening (Paragraph [0035] Figure 2J isolation material (element 34) is filled into the opening (element 32). Paragraph [0033] silicon oxide, which can be considered a dielectric material, can be an isolation material).
Wu fails to teach treating the dielectric material with a microwave plasma treatment.
Liang teaches methods of treating a silicon oxide material with a plasma (Paragraph [0005]). Liang teaches that the treatment of the silicon oxide material can densify the silicon oxide and make the properties of the material in areas that have different dimensions more similar than they would be otherwise (Paragraphs [0015-0018]). Liang teaches that the plasma treatment process utilizes microwave power (Paragraph [0036]).
It would have been obvious to one of ordinary skill in the art to have modified the method of modified Wu by conducting a microwave plasma treatment process on the dielectric material as taught by Liang.
One of ordinary skill in the art would have been motivated to make this modification because the treatment of the silicon oxide material can densify the silicon oxide and make the properties of the material in areas that have different dimensions more similar than they would be otherwise (Liang Paragraphs [0015-0018]). This could provide the benefit of modifying the properties of the dielectric material to be closer to target values, or could be useful in providing consistency in the properties of the dielectric material in cases where the dielectric would remain a part of the structure being formed in multiple places, with varied dimensions, on the substrate. Additionally, this modification would have been obvious to one of ordinary skill in the art as it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a microwave plasma treatment process that would densify a silicon oxide material. See MPEP 2143(I)(A).
Regarding Claim 27, modified Wu teaches all the limitations of claim 21 as outlined above.
Modified Wu fails to teach wherein the treating the dielectric material is performed at a temperature of less than 500 °C.
However, Liang further teaches that the temperature of the substrate can be 100°C or greater during the plasma treatment process (Paragraph [0037]).
It would have been obvious to one of ordinary skill in the art to have selected and incorporated a temperature during the treating of the dielectric material at a level within the disclosed range of 100°C or greater, including at amounts that overlap with the claimed range of less than 500°C. It has been held that obviousness exists where the claimed ranges overlap or lie inside ranges disclosed by the prior art. See MPEP 2144.05 (I).
Regarding Claim 28, modified Wu teaches all the limitations of claim 21 as outlined above.
Modified Wu fails to teach wherein the another opening has a depth to width aspect ratio greater than 1.
However, Wu further teaches that the depth of the opening (element 32) must be sufficient to divide the conductive material layer (element 30) into separate capacitor landing layers (elements 31) so that when the opening is filled with dielectric material that dielectric material can effectively act as a capacitor isolation layer (element 34) (Paragraphs [0027] and [0035] Figures 2G-2J). Wu shows in the figures an example that suggests that the opening would have an aspect ratio greater than 1 in order to accomplish the intended purpose (Figures 2G-2J).
It would have been obvious to one of ordinary skill in the art to have selected dimensions for this opening such that the aspect ratio would be greater than 1.
Examiner takes the position that this selection would have been obvious to one of ordinary skill in the art because the intended purpose of the opening is to separate the conductive layer and there is a taught embodiment, as shown in the figures, where multiple of the taught structures are formed immediately adjacent to each other in a row along one axis. In this situation, the formation of an opening with an aspect ratio greater than 1 would allow for these structures to be formed more closely together, allowing for increased density of structures on a substrate, without the etching forming the opening removing any of the material from the immediately adjacent structure. Additionally, by selecting an aspect ratio higher than 1 would allow for less material to be removed in the formation of the openings, which could result in a shorter processing time for the formation of the openings and less material for both the conductive layer and the isolation layer to accomplish the intended goal of the method. Additionally, this selection could be considered the selection from a finite number of predictable solutions. Every opening has an aspect ratio and therefore every opening must have an aspect ratio that is either less than 1, equal to 1, or greater than 1. One of ordinary skill in the art would have had to select some aspect ratio for the opening and could have pursued the use of different aspect ratios for this opening with a reasonable expectation of success since Wu teaches that the formation of an opening is suitable for the intended purpose. See MPEP 2143(I)(E).
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Wu in view of, as applied to claim 21 above, and further in view of Said.
Regarding Claim 22, modified Wu teaches all the limitations of claim 21 as outlined above.
Modified Wu fails to teach wherein the dielectric material has a relationship with a spin-coating process (Note: this claim is being examined under the interpretation outlined in the 112 rejection section). Wu teaches that the dielectric material can be silicon oxide (Paragraph [0033]), but is silent on the methods to be used in depositing this material.
Said teaches methods related to forming semiconductor devices (Paragraph [0001]). Said teaches that a dielectric material, that can be silicon oxide, can be deposited to fill a cavity in an existing structure, and that this dielectric material can be deposited using a spin coating process (Paragraph [0076]).
It would have been obvious to one of ordinary skill in the art to have modified the method of modified Wu by using a spin coating process to deposit the silicon oxide material as taught by Said.
This modification would have been obvious to one of ordinary skill in the art as it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a suitable process for depositing a silicon oxide material to fill a cavity on a substrate. See MPEP 2143(I)(A).
Claims 29 and 32-34 are rejected under 35 U.S.C. 103 as being unpatentable over Said in view of Liang and Huang et al. (US-20220165731-A1).
Regarding Claim 29, Said teaches a method (Paragraph [0001] methods taught), comprising:
forming a first transistor and a second transistor (Paragraph [0040] Figure 1 semiconductor device (element 700) can include field effect transistors that are formed on the substrate);
forming a conductive material in a first opening adjacent the first transistor or the second transistor (Paragraph [0058] Figure 4A memory openings (element 49) are etched. Paragraph [0066] and [0068] memory material layer (element 54) is deposited in the opening and can include conductive material. As the memory openings are on the same substrate as the transistors, they can be considered adjacent to the transistors);
providing a second opening over the conductive material in the first opening (Paragraph [0065] Figures 5C-5E a cavity (element 49') is provided over the conductive material of memory material layer (element 54));
using a spin-on deposition process to provide a dielectric material within the second opening (Paragraph [0076] a dielectric material (element 62L) is deposited in the cavity (element 49') using spin-coating).
Said fails to teach that the second transistor is formed over the first transistor.
Huang teaches semiconductor device structures that include field effect transistors (Paragraph [0018]). Huang teaches that field effect transistors can be stacked, such that one field effect transistor is over another (Paragraph [0058] second nanosheet transistors are stacked over the first nanosheet transistors). Huang teaches that the use of three-dimension designs such as those using nanosheet field effect transistors can allow for higher device density, higher performance, and lower costs (Paragraph [0002]).
It would have been obvious to one of ordinary skill in the art to have modified the method of Said by forming the second transistor over the first transistor as taught by Huang.
One of ordinary skill in the art would have been motivated to make this modification because the use of three-dimension designs such as those using nanosheet field effect transistors can allow for higher device density, higher performance, and lower costs (Huang Paragraph [0002]). Additionally, this modification could have been considered the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a design for the placement of the plurality of transistors described by Said as existing within the semiconductor device. See MPEP 2143(I)(A).
Modified Said fails to teach performing a microwave (MW) treatment of the dielectric material.
Liang teaches methods of treating a silicon oxide material with a plasma (Paragraph [0005]). Liang teaches that the treatment of the silicon oxide material can densify the silicon oxide and make the properties of the material in areas that have different dimensions more similar than they would be otherwise (Paragraphs [0015-0018]). Liang teaches that the plasma treatment process utilizes microwave power (Paragraph [0036]).
It would have been obvious to one of ordinary skill in the art to have modified the method of modified Said by conducting a microwave plasma treatment process on the dielectric material as taught by Liang.
One of ordinary skill in the art would have been motivated to make this modification because the treatment of the silicon oxide material can densify the silicon oxide and make the properties of the material in areas that have different dimensions more similar than they would be otherwise (Liang Paragraphs [0015-0018]). This could provide the benefit of modifying the properties of the dielectric material to be closer to target values, or could be useful in providing consistency in the properties of the dielectric material in cases where the dielectric would remain a part of the structure being formed in multiple places, with varied dimensions, on the substrate. Additionally, this modification would have been obvious to one of ordinary skill in the art as it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a microwave plasma treatment process that would densify a silicon oxide material. See MPEP 2143(I)(A).
Regarding Claim 32, modified Said teaches all the limitations of claim 29 as outlined above. Said further teaches wherein the spin-on deposition process fills the second opening (Paragraph [0076] dielectric core layer (element 62L) fills the opening of memory cavity (element 49')).
Regarding Claim 33, modified Said teaches all the limitations of claim 29 as outlined above. Said further teaches wherein the providing the second opening includes etching back the conductive material in the first opening (Paragraph [0072] Figure 5D the memory material layer (element 54) is etched to create an opening that is part of the memory cavity (element 49')).
Regarding Claim 34, modified Said teaches all the limitations of claim 29 as outlined above.
Modified Said fails to teach wherein the microwave treatment is performed at a temperature of less than 500°C.
However, Liang further teaches that the temperature of the substrate can be 100°C or greater during the plasma treatment process (Paragraph [0037]).
It would have been obvious to one of ordinary skill in the art to have selected and incorporated a temperature during the treating of the dielectric material at a level within the disclosed range of 100°C or greater, including at amounts that overlap with the claimed range of less than 500°C. It has been held that obviousness exists where the claimed ranges overlap or lie inside ranges disclosed by the prior art. See MPEP 2144.05 (I).
Allowable Subject Matter
Claims 16-20 and 30-31 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The closest prior art of record is Said, Wu, and Liang, as outlined in the rejections above. However, the cited prior art fails to teach: “wherein the etching back the conductive material leaves an L-shaped conductive feature”, “wherein the microwave plasma treatment is performed with a radiation frequency centered at approximately 2.45GHz” or that the depositing the dielectric material includes one of the molecules required by claims 18 and 30.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW KEELAN LAOBAK whose telephone number is (703)756-5447. The examiner can normally be reached Monday - Friday 8:00am - 5:30pm.
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/A.K.L./Examiner, Art Unit 1713 /DUY VU N DEO/Primary Examiner, Art Unit 1713
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