DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed 3/31/2026.
Claims 1-16 and 21-24 are pending. Claims 17-20 are cancelled. Claims 21-24 are new. Claims 1, 12 and 21 are independent.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/2/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on 3/31/2026 is acknowledged.
Claims 17-20, which have been canceled, were drawn to a nonelected Group, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 3/31/2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 12-16 and 21-24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 12 recites the abbreviation “STI” in line 3 of the claim, but does not provide the expanded form of the abbreviation. Thus, it is unclear what is necessarily required by the abbreviation “STI”.
Claim 21 recites the abbreviation “STI” in line 5 of the claim, but does not provide the expanded form of the abbreviation. Thus, it is unclear what is necessarily required by the abbreviation “STI”.
Note the dependent claims 13-16 and 22-24 necessarily inherit the indefiniteness of the claims on which they depend.
A. Prior-art rejections based at least in part by Chen
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4-8 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2020/0075342 A1, hereinafter “Chen”).
Regarding independent claim 1, Chen discloses a method comprising:
forming a semiconductor fin 22 (“fins”- ¶0015) extending from a substrate 20 (“substrate”- ¶0015) (see Figs. 1A-1B);
forming a shallow trench isolation (STI) region 24a, 24b (“isolation structures”- ¶0029) around a lower portion of the semiconductor fin 22 (see Figs. 2-6B);
forming an STI protection layer 26 (“dielectric material”- ¶0019, which physically covers surrounding elements and thereby physically protects the surrounding elements) over the STI region 24a, 24b (see Figs. 2-6B);
after forming the STI protection layer 26, etching source/drain recesses (i.e., “recesses”- ¶0042) in the semiconductor fin 22 (¶0042); and
forming source/drain epitaxial regions 52 (“epitaxial source/drain regions”- ¶0043) in the source/drain recesses (¶0043) (see Figs. 8B-8C).
Regarding claim 4, Chen discloses wherein the STI protection layer 26 has an unfilled void 30 (“seams”- ¶0029) within the STI protection layer 26 (see Fig. 6A).
Regarding claim 5, Chen discloses wherein the unfilled void 30 has a width varying as function of height (see Fig. 6A).
Regarding claim 6, Chen discloses wherein the unfilled void 30 has a topmost position lower than a topmost position of the semiconductor fin 22 (see Fig. 6A).
Regarding claim 7, Chen discloses wherein the unfilled void 30 is above the semiconductor fin 22, since the void 30 is above portions of fin 22 (i.e., the portions between 24a, 24b- as shown in Fig. 8B).
Regarding claim 8, Chen discloses the method further comprising:
forming gate structures 66 (“gate conductive fill material”- ¶0048) over the semiconductor fin 22, wherein the unfilled void 30 is in a position laterally between the gate structures 66 (see Figs. 8A-8C).
Regarding independent claim 12, Chen discloses a method, comprising:
forming a plurality of semiconductor fins 22 (“fins”- ¶0015) over a substrate 20 (“substrate”- ¶0015) (see Figs. 1A-1B);
forming an STI region 24a, 24b (“isolation structures”- ¶0029) between the plurality of semiconductor fins 22 (see Figs. 2-6B);
depositing a protection layer 26 (“dielectric material”- ¶0019, which physically covers surrounding elements and thereby physically protects the surrounding elements) over the STI region 24a, 24b, the protection layer 26 having a first unfilled void 30 (“seams”- ¶0029) between the plurality of semiconductor fins 20 after the deposition is completed (see Figs. 2-6B); and
forming source/drain epitaxial regions 52 (“epitaxial source/drain regions”- ¶0043) over the plurality of semiconductor fins 22 (¶0043) (see Figs. 8B-8C).
B. Prior-art rejections based at least in part by Chen 749
Claim Rejections - 35 USC § 102
Claims 1-2, 4-5 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0327749 A1, hereinafter “Chen 749”).
Regarding independent claim 1, Chen 749 discloses a method comprising:
forming a semiconductor fin 36 (“fins”- ¶0020) extending from a substrate 20 (“substrate”- ¶0015) (see Fig. 3);
forming a shallow trench isolation (STI) region 24 (“STI regions”- ¶0020) around a lower portion of the semiconductor fin 36 (see Fig. 3);
forming an STI protection layer 42 (“dummy gate electrode”- ¶0023, which physically covers surrounding elements and thereby physically protects the surrounding elements) over the STI region 24 (see Fig.5);
after forming the STI protection layer 42, etching source/drain recesses 50 (“recesses”- ¶0031) in the semiconductor fin 36 (see Fig. 10); and
forming source/drain epitaxial regions 54 (“epitaxy regions (source/drain regions)”- ¶0032) in the source/drain recesses 50 (see Fig. 11).
Regarding claim 2, Chen 749 discloses wherein the STI protection layer 42 is formed using a non-conformal deposition process (¶0024).
Regarding claim 4, Chen 749 discloses wherein the STI protection layer 42 has an unfilled void 41 (“void”- ¶0026) within the STI protection layer 42 (see Fig. 5).
Regarding claim 5, Chen 749 discloses wherein the unfilled void 41 has a width varying as function of height (see Fig. 5).
Regarding claim 7, Chen 749 discloses wherein the unfilled void 41 is above the semiconductor fin 36 (see Fig. 5).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Chen 749 in view of Edelstein et al. (US 2011/0266682 A1, hereinafter “Edelstein”).
Regarding claim 3, Chen 749 does not expressly disclose wherein the non-conformal deposition process is plasma enhanced chemical vapor deposition.
Edelstein discloses a non-conformal deposition technique such as plasma enhanced chemical vapor deposition (¶0037).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Chen 749 such that the non-conformal deposition process is plasma enhanced chemical vapor deposition as taught by Edelstein for the purpose of utilizing a suitable and typical non-conformal deposition technique (Edelstein ¶0037).
C. Prior-art rejections based at least in part by Chen 489
Claim Rejections - 35 USC § 102
Claims 21-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0265489 A1, hereinafter “Chen 489”).
Regarding independent claim 21, Chen 489 discloses a method, comprising:
forming a fin structure 66 (“fins”- ¶0010) extending from a substrate 50 (“substrate”- ¶0010) (see Fig. 3);
forming a plurality of semiconductor nanostructures 54A-C (“semiconductor layers”- ¶0018) over the fin structure 66, the plurality of semiconductor nanostructures 54A-C arranged one above another in a spaced apart manner (see Fig. 3);
forming an STI region 68 (“STI regions”- ¶0024) around the fin structure 66 (see Fig. 4);
forming a protection layer 81 (“spacers”- ¶0036, which physically covers surrounding elements and thereby physically protects the surrounding elements) over the STI region 68 (see Fig. 9A);
forming a first source/drain epitaxial region 92 (“epitaxial source/drain regions”- ¶0049, specifically source/drain regions formed on one end of the channel regions; see Fig. 1) over the fin structure 66 and interfacing first ends of the plurality of semiconductor nanostructures 54A-C, wherein the protection layer 81 has a top surface lower than a top surface of the first source/drain epitaxial region 92 (see Figs. 12A-12B); and
forming a gate structure 102 (“gate”- ¶0011) surrounding each of the plurality of semiconductor nanostructures 54A-C (see Figs. 1 and 27A-27B).
Regarding claim 22, Chen 489 discloses the method further comprising:
forming a second source/drain epitaxial region 92 (“epitaxial source/drain regions”- ¶0049, specifically source/drain regions formed on the other end of the channel regions; see Fig. 1) interfacing second ends of the plurality of semiconductor nanostructures 54A-C (see Figs. 12A-12B).
Allowable Subject Matter
Claims 9-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 9 (which claims 10-11 depend from), the prior art of record including Chen, Chen 479 and/or Chen 489, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “[the] method… further comprising: forming a spacer layer over the gate structures, wherein the STI protection layer is formed over the spacer layer; and performing a chemical mechanical polish (CMP) process on the STI protection layer until first portions of the spacer layer over top surfaces of the gate structures is exposed”.
Claims 13-16 and 23-24 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Regarding claim 13 (which claims 14-15 depend from), the prior art of record including Chen, Chen 479 and/or Chen 489, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “[the] method… further comprising: forming a plurality of gates over the plurality of semiconductor fins, wherein the protection layer is further deposited over the plurality of gates, and the protection layer has a second unfilled void between the plurality of gates”.
Regarding claim 16, the prior art of record including Chen, Chen 479 and/or Chen 489, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “[the] method… further comprising: etching source/drain recesses in the plurality of semiconductor fins, wherein bottoms of the source/drain recesses are lower than a bottommost position of the first unfilled void, and the source/drain epitaxial regions are formed in the source/drain recesses”.
Regarding claim 23 (which claim 24 depends from), the prior art of record including Chen, Chen 479 and/or Chen 489, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the protection layer has an unfilled void”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Lin et al. (US 2020/0395237 A1), which discloses a void formed within a semiconductor device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
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/JAY C CHANG/Primary Examiner, Art Unit 2817