Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-10, in the reply filed on 1/12/2026 is acknowledged.
Claim Rejections - 35 USC § 112
Claims 6 and 9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In regard to claims 6 and 9, the term “substantially level” is unclear as to the specific scope of the claim, such that it would not be clear as to when prior art would cross over the threshold to be “substantially level” or be considered just short of the threshold. Where exactly is the line between substantially level and not substantially level?
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 10 are rejected under 35 U.S.C. 102(a)(1) as being unpatentable by Song et al. (US-20180174971-A1 referred as Song).
Regarding claim 1. Song discloses a memory device, comprising:
a substrate ([0024], figure 2a, a substrate #100);
a word line buried in the substrate and extending in a first direction ([0024], figure 2a, a word line #WL buried in the substrate #100 and extending in a first (vertical) direction);
a word line cap layer over the word line ([0024], figure 2a, word line cap layers #110 over the word line #WL);
a landing pad over and in contact with the substrate and the word line cap layer ([0026], figure 2a, a landing pad #DCC is over and in contact with the substrate #100 (please note the source/drain regions #50 is part of the substrate #100 as described in [0049]) and with the word line cap layer #110);
a cell contact over and in contact with the landing pad ([0029], figure 2a, a cell contact #116 is seen over and in contact with the landing pad #DCC. Please note that #116 is a conductive layer that is part of a memory cell, therefore, can broadly be called a cell contact); and
a bit line over the word line and extending in a second direction perpendicular to the first direction ([0029], figure 2a, a bit line #118 (which is part of bit line #BL) is seen over the word line #WL and in a second (horizontal) direction perpendicular to the first (vertical) direction).
Regarding claim 2. Song discloses wherein the substrate and the landing pad are made of silicon ([0019, 0026], figure 2a, the substrate #100 and the landing pad #DCC contains silicon).
Regarding claim 10. Song discloses wherein a portion of the landing pad is between the cell contact and the word line cap layer ([0026], figure 2a, a portion of the landing pad #DCC is between the cell contact #116 and the word line cap layer #110).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over Song et al. (US-20180174971-A1 referred as Song) in view of Seo et al. (US-20230284439-A1 referred as Seo).
Regarding claim 3. Song discloses an isolation structure buried in the substrate ([0019], figure 2a, an isolation structure #102 is buried in the substrate).
Song lacks an isolation structure in contact with the landing pad.
Seo discloses an isolation structure in contact with the landing pad ([0072], figure 2, the isolation structure #105 is in contact with the landing pad #330. Please note that the landing pad #330 contains silicon which could be used as a landing pad).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Song to include an isolation structure in contact with the landing pad as taught by Seo in order to enhance electrical safety, distribute weight across the device, and to extend the devices lifetime.
Regarding claim 4. Song as modified discloses a dielectric layer covering the landing pad, the word line cap layer and the isolation structure ([0029], figure 2a, the dielectric layer #120 is seen entirely covering the landing pad #DCC, word line cap layer #110, and the isolation structure #102).
Regarding claim 5. Song as modified lacks wherein the dielectric layer is in contact with the cell contact and the landing pad.
Seo discloses wherein the dielectric layer is in contact with the cell contact and the landing pad ([0177, 0059], figure 2 with a clearer view in figure 14 and figure 18, the dielectric layer #351 (specifically, the one disposed over the landing pad #330) is seen with contact to the cell contact #340 and to the landing pad #330).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Song as modified to include the dielectric layer in contact with the cell contact and the landing pad as taught by Seo in order to reduce device failures, reduce manufacturing material, and to extend the devices lifetime.
Regarding claim 6. Song as modified lacks wherein a bottom of the landing pad is substantially level with a top surface of the isolation structure.
Seo discloses wherein a bottom of the landing pad is substantially level with a top surface of the isolation structure ([0047], figure 2, the bottom of the landing pad #330 is substantially level with a top surface of the isolation structure #105).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Song as modified to include the bottom of the landing pad is being leveled with a top surface of the isolation structure as taught by Seo in order to increase manufacturing speed, simplify the device design, and to maximize safety in the device.
Regarding claim 7. Song as modified lacks wherein the substrate has a portion protruding over a top surface of the isolation structure, and the landing pad is in contact with sidewalls of the portion of the substrate.
PNG
media_image1.png
860
832
media_image1.png
Greyscale
Seo discloses wherein the substrate has a portion protruding over a top surface of the isolation structure, and the landing pad is in contact with sidewalls of the portion of the substrate ([0184], figure 21 annotated above, in the intermediate stage of the device illustrated the substrate #100 is seen having a portion at #Ref1 protruding over a top surface #Ref2 of the isolation structure #105. The landing pad #330 is also seen in contact with sidewalls of the portion of the substrate #100 seen at #Ref1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Song as modified to include the substrate has a portion protruding over a top surface of the isolation structure with landing pad contacts as taught by Seo in order to reduce stress points, increase electrical safety, and to reduce total device weight.
Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Song et al. (US-20180174971-A1 referred as Song) in view of Yen (US-20230345703-A1).
Regarding claim 8. Song lacks a bit line contact below the bit line, wherein a bottom of the bit line contact is lower than a bottom of the landing pad.
Yen discloses a bit line contact below the bit line, wherein a bottom of the bit line contact is lower than a bottom of the landing pad ([0026], figure 2e, a bit line contact #122 is below the bit line #126 (please note that #126 includes both #128 and #130 as described in [0024]). The bottom of the bit line contact #122 is also seen lower than the bottom of the landing pad #116 (please not that the landing pad #116 is made of silicon)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Song as modified to include the bit line contact below the bit line with the bottom of the bit line contact being lower than the bottom of the landing pad as taught by Yen in order to reduce stress points, increase electrical safety, and to reduce total device weight.
Regarding claim 9. Song lacks wherein a bottom of the landing pad is substantially level with a top surface of the word line cap layer.
Yen discloses wherein a bottom of the landing pad is substantially level with a top surface of the word line cap layer ([0021], figure 2e, the bottom of the landing pad #116 is substantially level with a top surface of the word line cap layer #105).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Song as modified to include the bottom of the landing pad is substantially level with a top surface of the word line cap layer as taught by Yen in order to distribute the weight across the device, maximize contact to reduce device failure, and to enhance the devices integrity.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure includes Yan (US-20230345695-A1) and Moon et al. (US-20220173107-A1) for word lines, dielectric layers, and the cell contact.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB R MARIN whose telephone number is (571)272-5887. The examiner can normally be reached Monday to Friday from 8:30am - 5:00pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272 - 2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JACOB RAUL MARIN/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818